JPS6141420B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a microprogram control device,
In particular, the present invention relates to a microprogram control device that can efficiently store frequently used microinstructions written in short word lengths in a storage device.

FIG. 1 shows the configuration of a conventionally commonly used microprogram control device, including a microprogram initial address generator 11, an address selection circuit 12, a microprogram address register 13, and a microprogram storage device 1.
4, a microinstruction register 15, and a microinstruction decoder 16. Initial address generator 11
External signals such as instruction codes read from a main memory (not shown) or interrupts are supplied to the microprogram, and initial addresses of microprograms corresponding to these external signals are generated. The address information generated by the initial address generator 11 is stored in the microprogram address register 13 via the address selection circuit 12, and one word of the microinstruction corresponding to the address is read from the microprogram storage 14. The read microinstruction is stored in microinstruction register 1.
5 and is decoded by the microinstruction decoder 16 to generate various control signals. On the other hand, a part of the read microinstructions is returned to the microprogram address register 13 via the address selection circuit 12, and a series of microprograms are sequentially executed. In general, a microprogram includes many microinstructions whose processing content is the same except for the branch destination address information part of the microinstruction and some control bits. However, in the conventional microprogram control device shown in Fig. 1, even if the contents of the microinstruction processing are almost the same, if the contents of the branch destination address information field or some control bits are different, the microinstructions become different microinstructions. Therefore, there were a plurality of microinstructions in the microprogram storage device 14 that had a considerable portion of their bit patterns in common. As a result, the efficiency of the microprogram deteriorated and the storage device became large.

FIG. 2 shows an improved version of the conventional microprogram control device described above, which is known as the nanoprogram method. In this method, a microinstruction consists of a branch destination address information field, some control bits, and a nanoprogram address, and the nanoprogram storage device is activated by the nanoprogram address part of the microinstruction read into the microinstruction register 15. The corresponding nanoinstructions are read out and various control signals are generated. With this configuration, in nanoprograms with long words, the number of words can be reduced by avoiding duplication, and in microprograms with many words, by shortening the word length, the overall efficiency of the storage device can be improved. The purpose is to improve. However, this nanoprogramming method has a complicated hardware configuration and is inefficient unless the nanoinstruction word length is extremely long.
As a result, there was a problem that the capacity of the nanoprogram memory 21 became large. Furthermore, due to the additional time required to read the nanoprogram,
The disadvantage is that the processing time from the activation of the microprogram storage device to the generation of various control signals is long.

An object of the present invention is to provide a microprogram control device with high storage efficiency by writing frequently used microinstructions with short word lengths.

The gist of the present invention is to provide a microprogram storage device that stores microinstructions with a long word length that can be expressed in a general-purpose manner, and a microprogram storage device that stores microinstructions with a short word length that express frequently used limited processing. The present invention has a device that, when a microinstruction with a short word length is read out, drives a bit pattern generation circuit to generate a microinstruction with a long word length. Here, frequently used microinstructions include microinstructions for fetch processing for reading instruction words from the main memory, no-operation (N-OP) instructions, and the like. Among these commands, for example, fetch commands are further divided into several types.

FIG. 3 shows the configuration of a microprogram control device according to the present invention, including an initial address generator 11, an address selection circuit 12, a microprogram address register 13, a long word length microprogram storage device 31, and a short word length microprogram storage device 31. It consists of a microprogram storage device 32, a bit pattern generation circuit 33, a microinstruction selection circuit 34, a microinstruction register 15, and a microinstruction decoder 16. Here, the short word length microprogram storage device 32 and the bit pattern generation circuit 33 are according to the present invention. The initial address of the microprogram generated by the initial address generator 11 is stored in the microprogram address register 13 via the address selection circuit 12. The microprogram address stored in the microprogram address register 13 is sent to both the long word length microprogram storage device 31 and the short word length microprogram storage device 32, and one word of the microinstruction corresponding to that address is read out. . Here, the microinstruction read from the long word length microprogram storage device 31 is directly sent to the microinstruction selection circuit 34, whereas the microinstruction read out from the short word length microprogram storage device 32 is sent directly to the microinstruction selection circuit 34. The bit pattern generation circuit 33
The bit pattern generated there is sent to the microinstruction selection circuit 34 along with the rest of the microinstruction. The microinstruction selection circuit 34 selects either the long word length side or the short word length side microinstruction and stores it in the microinstruction register 15. As a method for determining which microinstruction to select in the microinstruction selection circuit 34, there is a method of using part of the read microinstruction information or part of the address information as a selection signal, or a method of using a special selection signal. Various methods can be considered, such as a method using a wired-OR connection without using a wired-OR connection. The microinstructions placed in the microinstruction register 15 are decoded by the microinstruction decoder 16 to generate control signals for each part, and at the same time, part of them is returned to the microprogram address register 13 via the address selection circuit 12. A series of microinstructions are executed sequentially. With such a configuration, the short word length microprogram storage device 32
The micro-instruction read from the micro-instruction is converted into a long-word micro-instruction and placed in the micro-instruction register 15, so that it can be decoded as just one type of micro-instruction in the following processing.

FIG. 4 shows definitions of three types of short word length microinstruction descriptions (microinstructions to microinstructions) that are frequently used in this embodiment. The word length is 8 bits,
S7-S6 are 2-bit control fields, S5-
S0 is a 6-bit branch destination address field
It is ADF. Here control fields S7-S6
(01) indicates a microinstruction, (10) indicates a microinstruction, and (11) indicates a microinstruction. The reason why (00) is not used as the control field is that in this embodiment, the short word length side microinstruction is selected only when S7 to S6 of the read short word length microinstruction are not (00). This is because the micro-instruction selection circuit 34 is controlled to select the longer micro-instruction.

On the other hand, the long word length microinstruction consists of 16 bits, as shown in one embodiment in FIG.
is a 10-bit control field, and L5 to L0 are 6-bit branch destination address fields. FIG. 5 shows definitions of long microinstruction descriptions for the three types of microinstructions shown in FIG. 4. In addition to these three types, there are many other patterns of long word length microinstructions, but these microinstructions are used relatively less frequently than microinstructions. 31.

In the configuration shown in FIG. 3, frequently used microinstructions are stored in the short word length microprogram storage device 32 using the description shown in FIG. The generation circuit converts it into the long word length microinstruction pattern shown in FIG.

FIG. 6 shows details of a bit pattern generation circuit that converts the three types of short word length microinstructions shown in FIG. 4 to the long word length microinstructions shown in FIG. Branch destination address field L5~
L0 corresponds directly to short word length microinstructions S5 to S0. A 0 signal is supplied to L15 and L9, and a 1 signal is supplied to L12, L10, and L6. Since each bit of L14, L11, and L8 becomes 0 in a microinstruction and becomes 1 in a microinstruction, S7 of a short word length microinstruction
The output is used as is. Since L7 becomes 1 for a microinstruction and 0 for a microinstruction, it is connected to S7 via an inverter 61.
Further, since L13 is a bit that becomes 1 only in response to a microinstruction, the S6 output and the S7 output are connected via the AND gate 62. The 16-bit signal L15 to L0 generated as described above is input to the microinstruction selection circuit 34 as the microinstruction output on the short word length side. On the other hand, S6 and S7 are OR
It is given as a microinstruction selection signal via the gate 63, and in the microinstruction selection circuit 34, when the selection signal is 1, the short word length side is set to 0.
When , it functions to select the long word length side.
Generally short word length microprogram storage device 32
Since the word length is shortened, the reading time is shorter than that of the long word length microprogram storage device 31. Therefore, the addition of a small number of gate circuits as shown in FIG. 6 does not impede the high speed performance of the microprogram control device. In addition, in the method of the present invention, only specific microinstructions have short word lengths, and conventional long word length microinstructions are also used, so by shortening the word length, the original microinstructions can be It does not lose its versatility or generality.

As described above, according to the illustrated embodiment, frequently used microinstructions can be written in short word lengths by adding a small amount of circuitry, and storage efficiency can be improved without reducing speed and versatility. can be improved.

As explained in detail above, according to the present invention,
A microprogram control device with high storage efficiency can be realized.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing a conventional microprogram control device, Fig. 2 is a block diagram showing a conventional nanoprogram method, Fig. 3 is a block diagram of a microprogram control device according to the present invention, and Fig. 4 is a short block diagram. Figure 5 explaining the description of the word length microinstruction.
This figure is a diagram explaining the description of a long word length microinstruction in correspondence with FIG. 4, and FIG. 6 is a detailed logical configuration diagram of the main part in the embodiment of the present invention. 31... Long word length microprogram storage device,
32...Short word length microprogram storage device, 3
3... Bit pattern generation circuit, 34... Micro instruction selection circuit.

Claims (1)

[Claims] 1. A first microprogram storage means for storing microinstructions; and a first microinstruction storage means that selects at least one specific microinstruction from among the microinstructions, encodes a specific bit area of the specific microinstruction, and then encodes the specific bit area of the specific microinstruction. a second microprogram storage means in which microinstructions with a short word length are stored; and addresses of the first and second microprogram storage means; The first step is to read the corresponding microinstruction from the corresponding address in
a bit pattern generating section configured to generate an original bit pattern before encoding for the encoded code portion of the microinstruction converted into a microinstruction with a short word length; The above bit pattern generation section is accessed based on the code section of the corresponding microinstruction, and
A microprogram control device comprising means for generating a corresponding bit pattern and reproducing the original microinstruction with the bit pattern and other code excluding the encoded code portion.