JPS6141197B2 - - Google Patents

Info

Publication number
JPS6141197B2
JPS6141197B2 JP15595879A JP15595879A JPS6141197B2 JP S6141197 B2 JPS6141197 B2 JP S6141197B2 JP 15595879 A JP15595879 A JP 15595879A JP 15595879 A JP15595879 A JP 15595879A JP S6141197 B2 JPS6141197 B2 JP S6141197B2
Authority
JP
Japan
Prior art keywords
telephone
output
input
information
dmab
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP15595879A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5679557A (en
Inventor
Makoto Ueno
Tsunetaka Sakata
Koreaki Hiraoka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Iwasaki Tsushinki KK
Original Assignee
Iwasaki Tsushinki KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Iwasaki Tsushinki KK filed Critical Iwasaki Tsushinki KK
Priority to JP15595879A priority Critical patent/JPS5679557A/ja
Publication of JPS5679557A publication Critical patent/JPS5679557A/ja
Publication of JPS6141197B2 publication Critical patent/JPS6141197B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q3/00Selecting arrangements
    • H04Q3/42Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Sub-Exchange Stations And Push- Button Telephones (AREA)
JP15595879A 1979-11-30 1979-11-30 Input and output system for button telephone device Granted JPS5679557A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15595879A JPS5679557A (en) 1979-11-30 1979-11-30 Input and output system for button telephone device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15595879A JPS5679557A (en) 1979-11-30 1979-11-30 Input and output system for button telephone device

Publications (2)

Publication Number Publication Date
JPS5679557A JPS5679557A (en) 1981-06-30
JPS6141197B2 true JPS6141197B2 (cg-RX-API-DMAC7.html) 1986-09-12

Family

ID=15617244

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15595879A Granted JPS5679557A (en) 1979-11-30 1979-11-30 Input and output system for button telephone device

Country Status (1)

Country Link
JP (1) JPS5679557A (cg-RX-API-DMAC7.html)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5640256Y2 (cg-RX-API-DMAC7.html) * 1976-11-29 1981-09-21
JPS5854904Y2 (ja) * 1977-01-27 1983-12-15 株式会社クボタ 回転抵抗装置

Also Published As

Publication number Publication date
JPS5679557A (en) 1981-06-30

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