JPS6137803B2 - - Google Patents

Info

Publication number
JPS6137803B2
JPS6137803B2 JP5743880A JP5743880A JPS6137803B2 JP S6137803 B2 JPS6137803 B2 JP S6137803B2 JP 5743880 A JP5743880 A JP 5743880A JP 5743880 A JP5743880 A JP 5743880A JP S6137803 B2 JPS6137803 B2 JP S6137803B2
Authority
JP
Japan
Prior art keywords
integrating
triplate
conductor
dielectric substrates
adhesive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP5743880A
Other languages
Japanese (ja)
Other versions
JPS56154804A (en
Inventor
Teruo Furuya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP5743880A priority Critical patent/JPS56154804A/en
Publication of JPS56154804A publication Critical patent/JPS56154804A/en
Publication of JPS6137803B2 publication Critical patent/JPS6137803B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01PWAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P3/00Waveguides; Transmission lines of the waveguide type
    • H01P3/02Waveguides; Transmission lines of the waveguide type with two longitudinal conductors
    • H01P3/08Microstrips; Strip lines
    • H01P3/085Triplate lines

Landscapes

  • Waveguides (AREA)

Description

【発明の詳細な説明】 この発明は機械的、電気的に優れたトリプレー
トストリツプラインの一体化方法に関するもので
ある。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for integrating triple-plate strip lines with excellent mechanical and electrical properties.

ここで、トリプレートストリツプライン部には
各種機能を有するマイクロ波回路が形成されてい
るものとする。
Here, it is assumed that a microwave circuit having various functions is formed in the triplate stripline section.

第1図は従来のトリプレートストリツプライン
の一体化方法を示す概略断面図であり、図中、1
は圧力、熱、2は地導体、3a,3bは誘電体基
板、4は内部導体、5は接着剤である。
FIG. 1 is a schematic cross-sectional view showing a conventional method of integrating triple-plate strip lines, and in the figure, 1
2 is a ground conductor, 3a and 3b are dielectric substrates, 4 is an internal conductor, and 5 is an adhesive.

この従来のトリプレートストリツプラインの一
体化方法について以下簡単に説明する。
This conventional method of integrating triplate strip lines will be briefly described below.

従来は片面に地導体2が被着されている誘電体
基板3a,3bで内部導体4と接着剤5をはさみ
込み、これら全体に熱、圧力1を加えてトリプレ
ートストリツプラインの一体化を計つていた。
Conventionally, an internal conductor 4 and an adhesive 5 are sandwiched between dielectric substrates 3a and 3b, each of which has a ground conductor 2 adhered to one side, and heat and pressure 1 are applied to the whole to integrate the triplate strip line. I was planning.

しかし、この一体化方法の欠点は接着剤5の厚
み誤差、損失、接着強度の影響で電気的及び機械
的性能に劣化が生じる事であり、この種の不具合
が製造過程で多発していることである。電気的性
能に劣化が生じる理由は接着剤5の厚みの不均一
によりトリプレートストリツプラインのインピー
ダンスにずれが生じ、又、接着剤5は誘電体基板
3a,3bよりも誘電体損失が大きいため、接着
剤5にマイクロ波電界がのると損失が増加するた
めである。
However, the disadvantage of this integration method is that electrical and mechanical performance deteriorates due to thickness errors, losses, and adhesive strength of the adhesive 5, and this type of failure occurs frequently during the manufacturing process. It is. The reason for the deterioration in electrical performance is that the impedance of the triplate strip line shifts due to the uneven thickness of the adhesive 5, and the dielectric loss of the adhesive 5 is greater than that of the dielectric substrates 3a and 3b. This is because loss increases when a microwave electric field is applied to the adhesive 5.

一方、機械的性能に劣化が生じる理由は、一般
的にトリプレートストリツプラインの誘電体基板
3a,3bは構成の容易性から四弗化エチレン系
の材質が多く、四弗化エチレン系の材質は表面を
化学処理したとしても接着強度が弱く、又やわら
かいため、曲げ、ひねり等のストレスで接着面に
はがれが生じ易いためである。
On the other hand, the reason why the mechanical performance deteriorates is that the dielectric substrates 3a and 3b of the triplate stripline are generally made of tetrafluoroethylene-based material for ease of construction; This is because even if the surface is chemically treated, the bonding strength is weak and the bonding surface is soft and easily peels off due to stress such as bending or twisting.

この発明のトリプレートストリツプラインの一
体化方法は前述の従来の欠点を除去したもので、
その目的は製造過程で生じる不具合の軽減にあ
る。
The method of integrating triplate strip lines of this invention eliminates the above-mentioned conventional drawbacks.
The purpose is to reduce defects that occur during the manufacturing process.

第2図はこの発明の一実施例のトリプレートス
トリツプラインの一体化方法を示す概略断面図で
あり、図中、1は圧力、熱、2は地導体、3a,
3bは誘電体基板、4は内部導体、6はスルホー
ル導体、7はハンダ層である。
FIG. 2 is a schematic cross-sectional view showing a method of integrating a triplate strip line according to an embodiment of the present invention, in which 1 is pressure and heat, 2 is a ground conductor, 3a,
3b is a dielectric substrate, 4 is an internal conductor, 6 is a through-hole conductor, and 7 is a solder layer.

以下、この発明によるトリプレートストリツプ
ラインの一体化方法について詳細に説明する。こ
の発明では片面に地導体2が被着されている誘電
体基板3a,3bで内部導体4をはさみ込むと共
に、誘電体基板3a,3b内には誘電体基板3
a,3b間で接触する地導体2と同電位のスルホ
ール導体6を多数設け、このスルホール導体6の
各接触面にはハンダ層7を設け、これらの全体に
圧力、熱1を加えてトリプレートストリツプライ
ンの一体化を実現した。
Hereinafter, the method for integrating triplate strip lines according to the present invention will be explained in detail. In this invention, an internal conductor 4 is sandwiched between dielectric substrates 3a and 3b each having a ground conductor 2 adhered to one side thereof, and a dielectric substrate 3 is disposed within the dielectric substrates 3a and 3b.
A large number of through-hole conductors 6 having the same potential as the ground conductor 2 that are in contact between a and 3b are provided, a solder layer 7 is provided on each contact surface of the through-hole conductors 6, and pressure and heat 1 are applied to the entirety of these conductors to form a tri-plate. Realized the integration of strip lines.

この一体化方法によると内部導体4がはさみ込
まれた誘電体基板3a,3b間は誘電体基板3
a,3b内に設けた地導体2と同電位のスルホー
ル導体6、及びハンダ層7で機械的に固定されて
おり、さらにハンダ層7で結合されたスルホール
導体6は誘電体基板3a,3bの補強材の役目も
成し、併せて誘電体基板3a,3b内で発生した
熱、異常共振に対しても効果があり、従来製造過
程で発生していたトリプレートストリツプライン
の一体化による不具合が大巾に軽減できる。
According to this integration method, between the dielectric substrates 3a and 3b between which the internal conductor 4 is sandwiched, the dielectric substrate 3
It is mechanically fixed by a through-hole conductor 6 which has the same potential as the ground conductor 2 provided in a, 3b, and a solder layer 7, and the through-hole conductor 6, which is further bonded by the solder layer 7, is connected to the dielectric substrates 3a, 3b. It also serves as a reinforcing material, and is also effective against heat generated within the dielectric substrates 3a and 3b, as well as abnormal resonance, and eliminates problems caused by the integration of triple-plate strip lines that previously occurred during the manufacturing process. can be significantly reduced.

なお、以上はトリプレートストリツプラインの
一体化方法について述べたが、この発明はこれに
限らずトリプレートストリツプラインの多層一体
化方法にも使用できる。
Although the method for integrating triplate striplines has been described above, the present invention is not limited to this, and can also be used for a method for integrating multilayer triplate striplines.

以上、この発明によるトリプレートストリツプ
ラインの一体化方法によると、誘電体基板内に設
けたスルホール導体とその接触面に設けたハンダ
層の効果で、製造過程で生じる電気的、機械的不
具合が大巾に軽減できる。
As described above, according to the method for integrating triplate strip lines according to the present invention, electrical and mechanical defects that occur during the manufacturing process can be prevented by the effect of the through-hole conductor provided in the dielectric substrate and the solder layer provided on the contact surface thereof. It can be reduced to a large extent.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はトリプレートストリツプラインの一体
化方法を示す概略断面図、第2図はこの発明のト
リプレートストリツプラインの一体化方法を示す
概略断面図である。 図中、1は圧力、熱、2は地導体、3a,3b
は誘電体基板、4は内部導体、5は接着剤、6は
スルホール導体、7はハンダ層である。なお、図
中、同一あるいは相当部分には同一符号を付して
示してある。
FIG. 1 is a schematic sectional view showing a method for integrating triplate striplines, and FIG. 2 is a schematic sectional view showing a method for integrating triplate striplines of the present invention. In the figure, 1 is pressure, heat, 2 is ground conductor, 3a, 3b
4 is a dielectric substrate, 4 is an internal conductor, 5 is an adhesive, 6 is a through-hole conductor, and 7 is a solder layer. In the drawings, the same or corresponding parts are denoted by the same reference numerals.

Claims (1)

【特許請求の範囲】[Claims] 1 トリプレートストリツプラインを形成してい
る2枚の誘電体基板内には誘電体基板間で接触す
る地導体と同電位のスルホール導体を多数設け、
上記スルホール導体の各接触面にはハンダ層を設
け、これら全体に圧力および熱を加えて一体化す
るようにしたことを特徴とするトリプレートスト
リツプラインの一体化方法。
1 Inside the two dielectric substrates forming the triplate stripline, a large number of through-hole conductors with the same potential as the ground conductor that contacts between the dielectric substrates are provided.
A method for integrating a triple plate strip line, characterized in that a solder layer is provided on each contact surface of the through-hole conductor, and the whole is integrated by applying pressure and heat.
JP5743880A 1980-04-30 1980-04-30 Uniting method for triplet strip line Granted JPS56154804A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5743880A JPS56154804A (en) 1980-04-30 1980-04-30 Uniting method for triplet strip line

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5743880A JPS56154804A (en) 1980-04-30 1980-04-30 Uniting method for triplet strip line

Publications (2)

Publication Number Publication Date
JPS56154804A JPS56154804A (en) 1981-11-30
JPS6137803B2 true JPS6137803B2 (en) 1986-08-26

Family

ID=13055653

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5743880A Granted JPS56154804A (en) 1980-04-30 1980-04-30 Uniting method for triplet strip line

Country Status (1)

Country Link
JP (1) JPS56154804A (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58155105U (en) * 1982-04-09 1983-10-17 三菱電機株式会社 triple plate strip line
JPS6285004U (en) * 1985-11-18 1987-05-30
US4891616A (en) * 1988-06-01 1990-01-02 Honeywell Inc. Parallel planar signal transmission system
JP5704144B2 (en) * 2012-10-10 2015-04-22 株式会社村田製作所 High frequency signal line and manufacturing method thereof

Also Published As

Publication number Publication date
JPS56154804A (en) 1981-11-30

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