JPS6135423U - power amplifier circuit - Google Patents

power amplifier circuit

Info

Publication number
JPS6135423U
JPS6135423U JP12107684U JP12107684U JPS6135423U JP S6135423 U JPS6135423 U JP S6135423U JP 12107684 U JP12107684 U JP 12107684U JP 12107684 U JP12107684 U JP 12107684U JP S6135423 U JPS6135423 U JP S6135423U
Authority
JP
Japan
Prior art keywords
power amplifier
amplifier circuit
electron tube
grid electrode
power amplification
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12107684U
Other languages
Japanese (ja)
Inventor
彰 伊藤
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP12107684U priority Critical patent/JPS6135423U/en
Publication of JPS6135423U publication Critical patent/JPS6135423U/en
Pending legal-status Critical Current

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  • Amplifiers (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の実施例の電力増幅回路を示すブロック
図、第2図は従来の陰極接地型の電子管電力増幅器のブ
ロック図、第3図は第2図に示した電力増幅器の入力部
分の等価回路図、第4図は従来用いられてきた疑似電子
管を用いた入力回路調整ブロック図である。 同図において、1・・・・・・励振電力入力端子、2・
・・・・・入力整合回路、3・・・・・・直流阻止コン
デンサ、4・・・・・・電子管、5・・・・・・出力整
合回路、6・・・・・・出力端、子、7・・・・・・電
子管入力インピーダンス、8・・・・・・入力容量(C
og)、9・・・・・・入力抵抗(Rg)、11・・・
・・・疑似電子管、12・・・・・・疑似入力抵抗、1
3・・・・・・固定抵抗器。
Fig. 1 is a block diagram showing a power amplifier circuit according to an embodiment of the present invention, Fig. 2 is a block diagram of a conventional cathode-grounded electron tube power amplifier, and Fig. 3 is an input section of the power amplifier shown in Fig. 2. FIG. 4 is an input circuit adjustment block diagram using a conventionally used pseudo-electron tube. In the figure, 1...excitation power input terminal, 2...
... Input matching circuit, 3 ... DC blocking capacitor, 4 ... Electron tube, 5 ... Output matching circuit, 6 ... Output end, 7...Electron tube input impedance, 8...Input capacitance (C
og), 9... Input resistance (Rg), 11...
...pseudo electron tube, 12...pseudo input resistance, 1
3...Fixed resistor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 陰極が接地された電子管と、この電子管の格子電極と入
力端子との間に接続された整合回路とを含む電力増幅回
路において、前記電子管の外部で、かつ前記格子電極と
接地との間または前記格子電極と前記陰極との間に着脱
可能な抵抗器を設けたことを特徴とする電力増幅回路。
In a power amplification circuit including an electron tube whose cathode is grounded and a matching circuit connected between a grid electrode of the electron tube and an input terminal, A power amplification circuit characterized in that a removable resistor is provided between a grid electrode and the cathode.
JP12107684U 1984-08-07 1984-08-07 power amplifier circuit Pending JPS6135423U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12107684U JPS6135423U (en) 1984-08-07 1984-08-07 power amplifier circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12107684U JPS6135423U (en) 1984-08-07 1984-08-07 power amplifier circuit

Publications (1)

Publication Number Publication Date
JPS6135423U true JPS6135423U (en) 1986-03-04

Family

ID=30679872

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12107684U Pending JPS6135423U (en) 1984-08-07 1984-08-07 power amplifier circuit

Country Status (1)

Country Link
JP (1) JPS6135423U (en)

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