JPS58135120U - amplifier boost circuit - Google Patents

amplifier boost circuit

Info

Publication number
JPS58135120U
JPS58135120U JP3056082U JP3056082U JPS58135120U JP S58135120 U JPS58135120 U JP S58135120U JP 3056082 U JP3056082 U JP 3056082U JP 3056082 U JP3056082 U JP 3056082U JP S58135120 U JPS58135120 U JP S58135120U
Authority
JP
Japan
Prior art keywords
boost circuit
amplifier
amplifier boost
bridge
type network
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3056082U
Other languages
Japanese (ja)
Inventor
泰輔 林
Original Assignee
オンキヨー株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by オンキヨー株式会社 filed Critical オンキヨー株式会社
Priority to JP3056082U priority Critical patent/JPS58135120U/en
Publication of JPS58135120U publication Critical patent/JPS58135120U/en
Pending legal-status Critical Current

Links

Landscapes

  • Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
  • Amplifiers (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のステレオプリメインアンプの構成図、第
2図は本考案のステレオプリメンアンプの構成図、第3
図は本考案増幅器のブースト回路の構成図、第4図はブ
リッジT型ネットワークの構成図、第5図はブリッジT
型ネットワークの伝達周波数特性図。 1は増幅器、2はブリッジT型ネットワーク、3は帰還
回路、4はスイッチ。
Fig. 1 is a block diagram of a conventional stereo pre-main amplifier, Fig. 2 is a block diagram of a stereo pre-main amplifier of the present invention, and Fig. 3 is a block diagram of a conventional stereo pre-main amplifier.
The figure is a block diagram of the boost circuit of the amplifier of the present invention, Figure 4 is a block diagram of the bridge T type network, and Figure 5 is the block diagram of the bridge T network.
Transfer frequency characteristic diagram of type network. 1 is an amplifier, 2 is a bridge T-type network, 3 is a feedback circuit, and 4 is a switch.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 終段増幅器1の出力端と帰還回路3の帰還抵抗端との間
にブリッジT型ネットワーク2を挿入し、ブリッジT型
ネットワーク2と接地間にスイッチ4を設けた増幅器の
ブースト回路。
This is an amplifier boost circuit in which a bridge T-type network 2 is inserted between the output end of a final stage amplifier 1 and a feedback resistor end of a feedback circuit 3, and a switch 4 is provided between the bridge T-type network 2 and ground.
JP3056082U 1982-03-03 1982-03-03 amplifier boost circuit Pending JPS58135120U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3056082U JPS58135120U (en) 1982-03-03 1982-03-03 amplifier boost circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3056082U JPS58135120U (en) 1982-03-03 1982-03-03 amplifier boost circuit

Publications (1)

Publication Number Publication Date
JPS58135120U true JPS58135120U (en) 1983-09-10

Family

ID=30042269

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3056082U Pending JPS58135120U (en) 1982-03-03 1982-03-03 amplifier boost circuit

Country Status (1)

Country Link
JP (1) JPS58135120U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5883412A (en) * 1981-11-12 1983-05-19 Matsushita Electric Ind Co Ltd Frequency characteristic compensating circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5883412A (en) * 1981-11-12 1983-05-19 Matsushita Electric Ind Co Ltd Frequency characteristic compensating circuit

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