JPS6134261B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an integrated circuit (MOS-IC) using an insulated gate field effect transistor that can achieve high-speed operation with a single power supply.

Conventionally, MOS-ICs have an electronic circuit consisting of a plurality of circuit elements that realize the required circuit operation on a common semiconductor substrate, and perform the circuit function by supplying an external power supply. In order to increase the operating speed, a large number of external power supplies such as +5V, +12V, GND, and -2 to -5V are required. However, the peripheral circuits and control system electronic circuit elements of MOS-IC are generally +
It is unified with a single power supply of 5V-GND, and MOS
-It is not desirable to add a power supply only for IC operation.

A way to partially solve this problem is to
As shown in the specification of No. 48-16325, the purpose is to generate a power source other than an external power source inside a MOS-IC, and according to this prior invention, a high voltage source is generated inside a MOS-IC by supplying a single external power source. can be caused to occur. However, for high-speed operation of a MOS-IC, it is necessary not only to increase the processing signal amplitude by generating a high voltage source, but also to secure a body bias source in order to reduce the PN junction capacitance.

Therefore, an object of the present invention is to provide a MOS-IC that achieves high-speed operation with a single power supply.

Another object of the present invention is to provide an integrated circuit in which a body bias source is housed inside a MOS-IC.

According to the present invention, in an integrated circuit in which an electronic circuit using an insulated gate field effect transistor (MOS-FET) that realizes a predetermined circuit function by supplying an external power supply is provided on a common semiconductor substrate, the semiconductor substrate oscillates due to the supply of the external power,
a self-excited oscillation circuit that generates a first clock and a second clock having an opposite phase;
two charge pump elements whose gate electrodes receive a clock and a second clock as input;
The output range of the charge pump type element is made common to the external power supply and the reference terminal of the electronic circuit, i.e.
A MOS-IC that is conductively coupled to GND is obtained.
Here, the common semiconductor substrate of the MOS-IC has no direct conductive coupling with an external power source, and the power source generated by the charge pump type element serves as the substrate bias source. As a charge pump type element, a structure in which a high concentration region of the same conductivity type as the semiconductor substrate is provided in the channel region as shown in Japanese Patent Application No. 48-30820 is preferable;
According to such a structure, the threshold value for forming a channel is increased, so that the efficiency as a substrate bias source can be further improved.

In addition to the original circuit function for signal processing, the MOS-IC of this invention includes a body bias source, and when an external power supply is applied, a bias with excellent voltage stability is generated in the power supply, reducing the PN junction capacitance. , circuit operations can be executed stably at high speed. Therefore, conventional MOS that requires an external body bias source
- Can achieve high-speed operation similar to IC with a single power supply.

Next, in order to better understand the characteristics of this invention,
Embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of one embodiment of the present invention. In this embodiment, a +5V DC power supply Vcc is supplied from outside the MOS-IC, and an input signal in is derived as an output signal out through a predetermined circuit function. Inside the MOS-IC, when a +5V power supply Vcc is supplied with respect to the reference terminal GND, approximately 1MHz rectangular wave outputs φ, which are opposite in phase to each other, are generated.
A self-excited oscillation circuit A that generates a rectangular wave output φ,
The circuit has a substrate bias source circuit B using a charge pump type element that generates a DC substrate bias of about -3 V when the voltage comes on, and a functional circuit C that performs a predetermined circuit operation. The body bias source circuit B has an output bias V _SB
is supplied to the self-excited oscillation circuit A and the functional circuit C, and the low level of the output φ from the self-excited oscillation circuit is lowered to substantially the base bias V _SB to increase the amplitude value and enhance the charge pump effect. . Also, the effect of the body bias V _SB on the functional circuit ensures high speed operation within this circuit.

FIG. 2 is a circuit diagram of the self-excited oscillation circuit of the embodiment shown in FIG. This circuit forms a ring oscillator circuit as shown in the figure, and the -output φ from the ring oscillator R OSC
and a negative phase output are respectively derived through amplification parts BF1 and BF2. The sources of the drive transistors of the ring oscillator R/OSC and the first-stage inverters of the amplifiers BF1 and BF2 are all connected to the reference terminal GND, and the sources of the drive transistors Q ₀₁ and Q ₀₂ of the output stages of the amplifiers BF1 and BF2 are connected to the reference terminal GND. is coupled to the body bias _VSB . As a result, the amplitude of the rectangular wave output φ increases as the body bias occurs.

3A and 3B show charge pump type elements of the substrate bias source circuit of the embodiment of FIG. 1. FIG. In this circuit, the output regions of the two charge pump type elements Q _P1 and Q _P2 are commonly connected to the reference terminal GND, and the gate electrodes receive outputs φ, which are opposite in phase to each other, from the ring oscillator circuit. The base is MOS-
This is common to other transistors in the IC. As shown in the cross section of the charge pump element in Figure 3B, the charge pump type elements Q _P1 and Q _P2 have a specific resistance of 10.
A common N-type output region N1 is provided on one surface of the P-type silicon single crystal SB of Ω-cm, and a conductive wiring to the reference terminal GND is led out. The area near this region N1 is 1000 Å for each transistor Q _P1 and Q _P2 .
There are insulating gate films 01 and 02 made of SiO ₂ and gate electrodes G1 and G2 made of aluminum. or,
The substrate surface of the inactive area surrounding these has a thickness of 1.0
There is a peripheral oxide film F0 of SiO ₂ of about μ and a P-type region DP1 immediately below with a surface concentration of 1.5×10 ¹⁶ cm ^-3 . The active region has the above-mentioned common output region N1 and surface concentration 1~
High concentration P-type region P as the output region of the charge pump element to generate Vsub of 10×10 ¹⁶ cm ^-3
1 and P2, and these P-type regions P1 and P2 are in PN junction contact with the N-type region N1, that is, rectifying coupling. These P-type regions P1 and P2 are located directly under the gate of the charge pump type element, and increase the efficiency by increasing the threshold for forming a conductive channel and accelerating the recombination speed of induced carriers.

Furthermore, as shown in this figure, since inputs of opposite phases are given to the two charge pump elements, stable operation is achieved with little power supply ripple, and excellent follow-up to transient loads is achieved. A charge pump type element is a constant current source when charging a load, but in a steady state it has a voltage stabilizing effect that suppresses voltage fluctuations in response to fluctuations in load current, so that sufficient characteristics can be obtained as a substrate bias source.

Furthermore, according to this embodiment, the output amplitude of the ring oscillator circuit that drives the charge pump type element is increased by lowering the base bias to a low level, so that the induced heavy load that contributes to the charge pump action is large. A sufficiently large base bias value can be obtained. Therefore, according to this embodiment, by supplying a single external power supply, an internal body bias is generated to reduce the PN junction parasitic capacitance, and the MOS-IC
A high-speed operation circuit function can be achieved.

Although the embodiments of the present invention have been described above, it is easy to change the operating conductivity type, material, device structure, etc. as necessary. can be used, and the circuit functions include memory,
Logic etc. can be configured.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is a circuit diagram of a ring oscillator circuit suitable for the embodiment of FIG. 1, and FIGS. 3A and B are suitable for the embodiment of FIG. 1. FIG. 2 is a circuit diagram and a cross-sectional view of a substrate bias source using a charge pump type element. In the figure, A is a self-oscillation circuit, B is a substrate bias source circuit using a charge pump type element, and C is a predetermined
This is the operating circuit required for MOS-IC.

Claims (1)

[Claims] 1. In an integrated circuit in which an electronic circuit using an insulated gate field effect transistor that receives external power supply through an external voltage terminal and an external reference voltage terminal and realizes a predetermined circuit function is provided on a common semiconductor substrate, the semiconductor an oscillation circuit that oscillates when the external power is supplied to the base; a charge pump type element whose gate electrode receives the output of the oscillation circuit as input; and an output region of the charge pump type element that is rectified and coupled to the external reference voltage terminal. means for generating a body bias voltage in an output region; An integrated circuit comprising: an output stage that outputs an oscillation signal that oscillates between a terminal voltage and the body bias voltage as an output of the oscillation circuit.