JPS6131631B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a structure of a semiconductor integrated circuit that is not destroyed even by high voltage noise applied from the outside.

Semiconductor integrated circuit devices used in automotive control systems, etc. are resistant to pulse-like abnormal inputs such as electrical noise generated by spark discharge in each cylinder and electrical noise generated from relays that control various electrical components. There is a growing demand for high reliability that cannot be destroyed.

In conventional semiconductor integrated circuits, current limiting is inserted between the input terminal and the base of the transistor as one of the measures to prevent damage due to abnormal pulse-like input applied to each electrode terminal with respect to the ground line. Resistance elements such as resistors, which are inevitably inserted into the circuit, limit the transient current flowing through the circuit.

However, this method is often insufficient in terms of breaking strength.

The present invention prevents damage when these pulse-like abnormal input voltages are applied to the ground line to terminal electrodes that directly connect various resistance elements through metal wiring inside the integrated circuit. The aim is to improve the reliability of semiconductor integrated circuit devices.

According to the present invention, a semiconductor substrate of one conductivity type is provided, and a circuit element including a region of another conductivity type is incorporated in the semiconductor substrate in a region defined by an insulating isolation region of the other conductivity type. In a semiconductor integrated circuit device, an input signal is applied to a circuit element via an input electrode terminal formed on an insulating film on a semiconductor substrate. A semiconductor integrated circuit device having a groove portion is obtained.

Next, the present invention will be explained in more detail using the drawings.

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In FIG. 1, according to a conventional semiconductor integrated circuit, a resistor element 2 is formed by diffusion in a region surrounded by an insulating isolation region 7 of a semiconductor epitaxial layer 6. As shown in FIG. The input signal is directly connected from the bonding pad 1 to the electrode portion 2' of the resistive element 2 through the metal wiring 4.
Electrical processing is then performed by active or passive elements. In such a semiconductor integrated circuit, when a pulse-like abnormal input is applied to the ground terminal of the bonding pad 1 along with a predetermined input signal, the input side electrode portion 2' of the resistive element 2 is connected to the insulation isolation region 7. Destruction occurs due to the current path to the semiconductor integrated circuit, and the reliability of the semiconductor integrated circuit is determined by the strength of destruction in this region. At this time, the resistor itself hardly played a role in limiting the current, and its destruction prevention effect was not outstanding.

Destruction between the input side resistance electrode 2' and the insulation isolation region 7 due to this abnormal pulse wave causes the epitaxial layer 6
Epitaxial Due to the current path that occurs in the interface between the layer and the insulating layer or in the epitaxial layer near the interface, an excessive current flows transiently and concentrates in that area, causing the temperature of the area to rise above the melting point and irreversibly. Destruction is happening. This irreversible destruction causes the circuit to lose its operational function. Since the temperature increase due to the current path is due to Joule heat, the power consumed in this region is proportional to the square of the applied input voltage and inversely proportional to the resistance value in that region. The resistance value of that region is proportional to the specific resistance ρ and the length l, and inversely proportional to its cross-sectional area. Here, the resistivity ρ is the resistivity of the epitaxial layer, and the distance 1 corresponds to X in FIG.
From this, it would be better to increase the distance X, but this would increase the substrate area and reduce the degree of integration.

Next, according to FIGS. 2a and 2b, which are embodiments of the present invention, a silicon epitaxial layer 16 of the opposite conductivity type (N type) is provided on a semiconductor substrate 10 made of, for example, P type silicon. 16 is partitioned by, for example, a P-type insulating isolation region 17. Various circuit elements such as a resistor 2 are formed within the divisions of the epitaxial layer 16, and an insulating film 15 made of silicon dioxide or the like is deposited on their surfaces. A predetermined portion of the insulating film 15 has an opening for taking out an electrode, and a metal wiring 14 including an electrode pad 11 is formed thereon. According to this embodiment, in order to effectively increase the distance X shown in FIG.
A groove 13 is formed by removing a portion of the epitaxial layer 16 near the interface between the two. The cross-sectional shape of the groove 13 is easily formed in a U-shape, but it goes without saying that other shapes such as a semi-cylindrical shape, a rectangle, a V-shape, etc. may also be used.

By forming this groove, the distance between the electrode portion 12' of the resistive element 12 and the insulation isolation region 17 can be effectively lengthened, and crystal dislocations existing in this region can also be cut off, thereby making it possible to cut off any crystal dislocations existing in this region. It is possible to prevent the formation of current paths that could lead to destruction, making it possible to further prevent destruction.

It goes without saying that this structure can be applied to all semiconductor integrated circuits, whether the circuit elements are MOS type or bipolar type.

[Brief explanation of the drawing]

Figure 1 is a plan view of a conventional semiconductor integrated circuit element.
FIGS. 2a and 2b are a plan view of a semiconductor integrated circuit element according to an embodiment of the present invention, and a sectional view taken along line XX in a. 1, 11... bonding pad, 2, 12...
...resistance element, 2'12'...electrode part of resistance element,
13... Groove, 4, 14... Wiring metal, 5, 15
...Insulating film, 6,16...Epitaxial layer,
7, 17...Insulating isolation region. 〓〓〓〓

Claims (1)

[Claims] 1 includes a semiconductor layer of one conductivity type, an insulating isolation region for separating the semiconductor layer into a plurality of island regions, and a resistance region of the opposite conductivity type formed in one island region, and one end of the resistance region. In a semiconductor integrated circuit device that is connected to an electrode pad formed on the semiconductor layer via an insulating film through a wiring conductor layer, the portion is located between the one end portion of the resistive region and the insulating isolation region. 1. A semiconductor integrated circuit device, characterized in that a groove is formed in one island region along the one end portion of the resistance region so as not to overlap with the wiring conductor layer.