JPS6130748B2 - - Google Patents
Info
- Publication number
- JPS6130748B2 JPS6130748B2 JP55119965A JP11996580A JPS6130748B2 JP S6130748 B2 JPS6130748 B2 JP S6130748B2 JP 55119965 A JP55119965 A JP 55119965A JP 11996580 A JP11996580 A JP 11996580A JP S6130748 B2 JPS6130748 B2 JP S6130748B2
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- substrate
- external terminal
- wiring
- integrated circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000004519 manufacturing process Methods 0.000 claims description 4
- 238000005530 etching Methods 0.000 claims description 2
- 238000000034 method Methods 0.000 claims description 2
- 238000003825 pressing Methods 0.000 claims description 2
- 239000002184 metal Substances 0.000 claims 1
- 239000000758 substrate Substances 0.000 abstract description 13
- 229910000679 solder Inorganic materials 0.000 abstract description 5
- 239000000853 adhesive Substances 0.000 abstract description 4
- 230000001070 adhesive effect Effects 0.000 abstract description 4
- 238000004299 exfoliation Methods 0.000 abstract 1
- 238000005516 engineering process Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 238000003466 welding Methods 0.000 description 2
- 238000004026 adhesive bonding Methods 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 230000001351 cycling effect Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000011120 plywood Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49548—Cross section geometry
- H01L23/49551—Cross section geometry characterised by bent parts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3405—Edge mounted components, e.g. terminals
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Geometry (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
この発明は、外部端子用リードフレームを直接
混成集積回路基板に接続せずに配線用リードフレ
ームを介して接続するように混成集積回路の製造
方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a hybrid integrated circuit in which a lead frame for external terminals is not directly connected to a hybrid integrated circuit board, but is connected via a lead frame for wiring.
従来は混成集積回路基板(以下単に基板とい
う)上に形成された混成集積回路の電気的な動作
時に発生する熱を放散させるためのヒートシンク
に上記基板を接着剤にて固定し、その後、外部端
子(配線)用リードフレームの混成集積回路へ接
続する端部を上記基板に形成した電極端子部へ位
置決めし、はんだにて接続を行つていたが、基板
の電極端子部が小さく(約1〜2mm2)、外部端子
用リードフレームとの位置決めが困難であつたこ
と、および外部端子用リードフレームは混成集積
回路の外部電気回路との接続端子となり、引つ張
り強度および折り曲げ試験の要求を満たすため形
状および材質が限定される。このため、外部端子
用リードフレームを混成集積回路へ接続した場
合、温度サイクル等の信頼性試験において、上記
基板と外部端子用リードフレームの熱膨脹の差に
よる応力と上記外部電気回路へ接続を行う時に与
えられる外部端子用リードフレームへの外力によ
り、上記基板に形成された接続端子部分が剥離を
生じ、混成集積回路と外部端子用リードフレーム
との接続部分が電気的に開放されるなどの欠点が
あつた。 Conventionally, a hybrid integrated circuit board (hereinafter simply referred to as a board) formed on a hybrid integrated circuit board is fixed with adhesive to a heat sink for dissipating the heat generated during electrical operation, and then external terminals are attached to the heat sink. The end of the (wiring) lead frame to be connected to the hybrid integrated circuit was positioned to the electrode terminal part formed on the above board, and the connection was made with solder, but the electrode terminal part of the board was small (approximately 2mm2 ), it was difficult to position it with the lead frame for external terminals, and the lead frame for external terminals serves as the connection terminal for the external electric circuit of the hybrid integrated circuit, and satisfies the requirements for tensile strength and bending tests. Therefore, the shape and material are limited. Therefore, when an external terminal lead frame is connected to a hybrid integrated circuit, during reliability tests such as temperature cycling, stress due to the difference in thermal expansion between the board and the external terminal lead frame and the stress caused by the difference in thermal expansion when connecting to the external electric circuit Due to the external force applied to the lead frame for external terminals, the connection terminal portion formed on the board may peel off, resulting in disadvantages such as the connection portion between the hybrid integrated circuit and the lead frame for external terminals becoming electrically open. It was hot.
この発明は、上記従来の製造方法の欠点を除去
するためになされたもので、基板を接着剤にて外
部端子用リードフレームに固定する際、同時に外
部配線用リードフレームと位置決めが完了できる
ことと、外部電気回路との接続端子となる外部端
子用リードフレームを混成集積回路の電極端子部
へ直接接続させず、配線用リードフレームを用い
て接続するようにして上記従来の製造方法で生ず
る圧力を軽減させたものである。以下、この発明
を図面に基づいて説明する。 The present invention was made to eliminate the drawbacks of the conventional manufacturing method described above, and it is possible to complete the positioning with the external wiring lead frame at the same time when fixing the board to the external terminal lead frame with an adhesive. The external terminal lead frame, which serves as the connection terminal for the external electric circuit, is not directly connected to the electrode terminal portion of the hybrid integrated circuit, but is connected using a wiring lead frame to reduce the pressure generated in the conventional manufacturing method described above. This is what I did. The present invention will be explained below based on the drawings.
第1図はこの発明に用いる外部端子用リードフ
レーム1の平面図で、基板を固定させる基底部2
を有し、合属板をプレスまたはエツチング加工技
術によつて成形したものである。第2図は同じく
配線用リードフレーム3の平面図で基板と接続す
る端部4を有し、第1図の外部端子用リードフレ
ーム1と同様にして成形されるが、厚さと幅は小
さくしてある。 FIG. 1 is a plan view of a lead frame 1 for external terminals used in the present invention, and shows a base portion 2 to which a substrate is fixed.
It is made from a plywood plate using pressing or etching technology. FIG. 2 is a plan view of the lead frame 3 for wiring, which has an end portion 4 to be connected to the board, and is molded in the same manner as the lead frame 1 for external terminals shown in FIG. 1, but with a smaller thickness and width. There is.
第3図a,bは第1図の外部端子用リードフレ
ーム1に第2図の配線用リードフレーム3を電気
溶接により固着した状態の平面図および側面図で
ある。 3A and 3B are a plan view and a side view of the wiring lead frame 3 shown in FIG. 2 fixed to the external terminal lead frame 1 shown in FIG. 1 by electric welding.
このようにあらかじめ外部端子用リードフレー
ム1に配線用リードフレーム3を固着した後、第
4図に示すように第3図の外部端子用リードフレ
ーム1の基板部2に基板5を接着剤6により固定
させる。その後配線用リードフレーム3の端部4
を基板5上に厚膜技術により形成された厚膜の電
極端子部7にはんだ8により電気的に接続させる
ことにより、外部端子用リードフレーム1と基板
5の厚膜の電極端子部7とを電気的に接続を完了
させることができる。この状態を第5図に示す。
なお、9は半導体素子である。その後、両リード
フレーム1,3の連絡部分を切断する。 After fixing the wiring lead frame 3 to the external terminal lead frame 1 in advance in this way, as shown in FIG. Fix it. Then the end 4 of the wiring lead frame 3
By electrically connecting the external terminal lead frame 1 and the thick film electrode terminal portion 7 of the substrate 5 with the solder 8 to the thick film electrode terminal portion 7 formed on the substrate 5 by thick film technology. The connection can be completed electrically. This state is shown in FIG.
Note that 9 is a semiconductor element. After that, the connecting portion between both lead frames 1 and 3 is cut.
以上詳細に説明したように、この発明は基底板
を有する外部端子用リードフレームにあらかじめ
基板と外部端子用リードフレームとを電気的に接
続するための前記外部端子用リードフレームより
幅と厚さの小さい配線用リードフレームを固定し
ておき、基底板に基板を接着した後、配線用リー
ドフレームを基板の電極端子部へ接続するように
したので、基板の装着時に配線用リードフレーム
と位置決めができるばかりでなく、外力が直接基
板に加わることがなく、したがつて従来のように
基板と外部端子用リードフレームとの接続部分が
剥離することがない混成集積回路が得られる利点
がある。 As described in detail above, the present invention provides an external terminal lead frame having a base plate having a width and a thickness larger than that of the external terminal lead frame for electrically connecting a board and the external terminal lead frame in advance. After fixing a small wiring lead frame and gluing the board to the base plate, the wiring lead frame is connected to the electrode terminal part of the board, so it can be positioned with the wiring lead frame when installing the board. In addition, there is an advantage that an external force is not directly applied to the substrate, and therefore a hybrid integrated circuit can be obtained in which the connecting portion between the substrate and the lead frame for external terminals does not peel off as in the conventional case.
第1図〜第5図はこの発明の一実施例を示すも
ので、第1図は外部端子線用リードフレームの平
面図、第2図は配線用リードフレームの平面図、
第3図a,bは外部配線用リードフレームに配線
用リードフレームを電気溶接により固定させた平
面図および側面図、第4図は外部端子用リードフ
レームに基板を固定させた時の側面図、第5図は
外部端子用リードフレームと基板の電極端子部を
はんだにて配線用リードフレームを介して電気的
に配線した時の側面図である。
図中、1は外部端子用リードフレーム、2は基
底部、3は配線用リードフレーム、4は端部、5
は基板、6は接着剤、7は電極端子部、8ははん
だ、9は半導体素子である。なお、図中の同一符
号は同一または相当部分を示す。
1 to 5 show an embodiment of the present invention, in which FIG. 1 is a plan view of a lead frame for external terminal wires, FIG. 2 is a plan view of a lead frame for wiring,
Figures 3a and b are a plan view and side view of the wiring lead frame fixed to the external wiring lead frame by electric welding, Figure 4 is a side view of the board fixed to the external terminal lead frame, FIG. 5 is a side view when the external terminal lead frame and the electrode terminal portion of the board are electrically wired with solder via the wiring lead frame. In the figure, 1 is a lead frame for external terminals, 2 is a base, 3 is a lead frame for wiring, 4 is an end, and 5
1 is a substrate, 6 is an adhesive, 7 is an electrode terminal portion, 8 is a solder, and 9 is a semiconductor element. Note that the same reference numerals in the figures indicate the same or corresponding parts.
Claims (1)
より成形した混成集積回路基板を載置する基底板
を有する外部端子用リードフレームにあらかじめ
前記混成集積回路基板と外部端子用リードフレー
ムとを電気的に接続するための前記外部端子用リ
ードフレームより幅と厚さの小さい配線用リード
フレームを固定させておき、前記基底板へ混成集
積回路基板を固定させた後、前記外部端子用リー
ドフレームに固定された配線用リードフレームを
混成集積回路基板の電極端子部へ接続することを
特徴とする混成集積回路の製造方法。1. To electrically connect the hybrid integrated circuit board and the external terminal lead frame in advance to an external terminal lead frame having a base plate on which a hybrid integrated circuit board formed by pressing or etching a metal plate is placed. After fixing a wiring lead frame smaller in width and thickness than the external terminal lead frame, and fixing the hybrid integrated circuit board to the base plate, the wiring lead frame fixed to the external terminal lead frame is fixed. A method for manufacturing a hybrid integrated circuit, comprising connecting a lead frame to an electrode terminal portion of a hybrid integrated circuit board.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55119965A JPS5743450A (en) | 1980-08-28 | 1980-08-28 | Manufacture of hybrid integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55119965A JPS5743450A (en) | 1980-08-28 | 1980-08-28 | Manufacture of hybrid integrated circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5743450A JPS5743450A (en) | 1982-03-11 |
JPS6130748B2 true JPS6130748B2 (en) | 1986-07-15 |
Family
ID=14774574
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55119965A Granted JPS5743450A (en) | 1980-08-28 | 1980-08-28 | Manufacture of hybrid integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5743450A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01261555A (en) * | 1988-04-06 | 1989-10-18 | Kubota Ltd | Lubrication structure for continuously variable transmission |
-
1980
- 1980-08-28 JP JP55119965A patent/JPS5743450A/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01261555A (en) * | 1988-04-06 | 1989-10-18 | Kubota Ltd | Lubrication structure for continuously variable transmission |
Also Published As
Publication number | Publication date |
---|---|
JPS5743450A (en) | 1982-03-11 |
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