JPS6130024A - Formation of soi - Google Patents

Formation of soi

Info

Publication number
JPS6130024A
JPS6130024A JP15049084A JP15049084A JPS6130024A JP S6130024 A JPS6130024 A JP S6130024A JP 15049084 A JP15049084 A JP 15049084A JP 15049084 A JP15049084 A JP 15049084A JP S6130024 A JPS6130024 A JP S6130024A
Authority
JP
Japan
Prior art keywords
film
thin film
heating
single crystal
soi
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15049084A
Other languages
Japanese (ja)
Inventor
Yasuo Ono
泰夫 大野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP15049084A priority Critical patent/JPS6130024A/en
Publication of JPS6130024A publication Critical patent/JPS6130024A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/268Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Optics & Photonics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

PURPOSE:To obtain SOI by stacking a film A which is not liquified at the melting point of Si, a film B which is more easily vaporized than the film A on a Si thin film and then stacking a film C which is more difficult to be vaporized than the film B to a part of said film B and then single-crystal-lizing a thin film around the region not covered with the film C with the heating during a short period of time. CONSTITUTION:A thin film 6 of poly-Si, a thin film 7 of SiO2A, a thin film 8 of poly-SiB and a thin film 9 of SiO2C are stacked on a quartz substrate 5. It is irradiated with laser beam during a short period of time, Si 6 is melted and heating is suspended. Heat of film 6 is not dispersed to the substrate 5, convection is not generated at the surface of substrate due to the heating within a short period of time, Si is vaporized from an aperture 10 getting the vaporization heat, cooling is effective and the aperture is cooled quicker than the other region. Thereby, the Si single crystal region can be obtained around the aperture 10. In the case of laser beam heating, use of SiO2 film in the thickness of about 850Angstrom is effective. According to this structure, the SOI single crystal can be formed at the desired region regardless of the underlayer structure.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は絶縁層上の半導体薄膜を一担加熱し浴融させ、
固まらせて単結晶化する方法に関する。
Detailed Description of the Invention (Industrial Application Field) The present invention involves heating a semiconductor thin film on an insulating layer to melt it in a bath;
It relates to a method of solidifying and forming a single crystal.

(従来技術とその問題点) 従来、絶縁膜上の多結晶またはアモルファス半導体薄膜
を加熱、溶融させ固まらせることにより単結晶または単
結晶に近い粒径の大きな結晶(SOI : 8emic
onductor On In5ulator )を得
るための方法としているいろな検討がなされているう一
般的には電子ビーム、レーザビーム、フラッシュランプ
、ストリップヒータ等を用いて基板の一部を短時間に加
熱し溶融させ、熱が基板中に伝導したり、熱発光による
輻射によって逃けることにより冷却し、凝固させるので
あるが種々の方法がある。
(Prior art and its problems) Conventionally, a polycrystalline or amorphous semiconductor thin film on an insulating film is heated, melted, and solidified to produce single crystals or crystals with large grain sizes close to single crystals (SOI: 8emic).
Various studies have been conducted on methods to obtain an inductor (on inductor).In general, a part of the substrate is heated and melted in a short time using an electron beam, laser beam, flash lamp, strip heater, etc. There are various methods for cooling and solidifying the material by conducting heat into the substrate or by radiating heat from emitted light.

一つは上記半導体膜を単結晶基板に接触する場所(シー
ド)設け、このシードから凝固させることにより基板と
連続した単結晶を成長させる方法(シーディングエピタ
キシャル成長法)がある。
One is a method (seeding epitaxial growth method) in which the semiconductor film is provided at a location (seed) in contact with a single crystal substrate, and a single crystal continuous with the substrate is grown by solidifying from this seed.

また加熱ビームの形状に細工全し、加熱溶融した部分と
固体部分の界面(固液界面)後部がビーム進向方向に向
りて凸となるようにして、ビームスキャン初期に発生し
た微小な結晶粒の結晶性を常に拡大するように伝播させ
ることにより大きな単結晶を得る方法(整形ビーム法)
がある。
In addition, the shape of the heating beam has been carefully modified so that the rear part of the interface between the heated and molten part and the solid part (solid-liquid interface) is convex in the direction of the beam, so that the microcrystals generated during the initial beam scan can be removed. A method to obtain large single crystals by propagating grains so that their crystallinity is constantly expanded (shaped beam method)
There is.

壕だ上記半導体薄膜の下部の形状に細工をして基板への
熱の逃は道を制御することにより所望の位置で凝固時に
鍛初に発生した結晶粒の性質をその近傍をこまで引き延
ばす方法(ヒートシンク法)がある。
This is a method of extending the properties of the crystal grains generated at the beginning of forging during solidification to a desired location by modifying the shape of the lower part of the semiconductor thin film mentioned above to control the path of heat escape to the substrate. (heat sink method).

シカシ、シーゲイングエビタキシャル法ではシードとい
う余分な面積を要し、1だLSI用のトランジスタを作
る場合には単結晶の必要なゲート部分とシードとの距離
がある程度必要で大きな単結晶を作る必要があり、現実
には良質の単結晶をゲート部分に作ることはむすかしい
Shikashi, SeegainingEbitaxial method requires an extra area called a seed, and when making a transistor for LSI, a certain distance between the necessary gate part of the single crystal and the seed is required to make a large single crystal. In reality, it is difficult to make a high-quality single crystal for the gate part.

整形ビーム法は、異なるビーム走行間での単結晶間に連
続性がなく、必ず粒界が入り、単結晶領域は常にビーム
走行したストライブ状にしかできないので、任意の所に
トランジスタを作るというようなLSIへの応用には不
都合である。
With the shaped beam method, there is no continuity between the single crystals between different beam paths, grain boundaries are always present, and the single crystal region can only be formed in the form of a stripe of beam travel, so it is possible to create a transistor anywhere. This is inconvenient for application to such LSIs.

ヒートシンク法は余分な面積を要さず、かつ下地にヒー
トシンク部を設けることにより任意の場所に単結晶が作
れるという長所はあるものの、下地構造に依存するとい
う欠点があり、多層にデバイスを作るような場合には単
結晶を作る場所に制限を受けたり、あるいは層間にバッ
ファ層を設ける必要があったりして、製造工程が複雑に
なるなどの欠点があった。
Although the heat sink method has the advantage that it does not require extra area and can create a single crystal in any location by providing a heat sink part on the base, it has the disadvantage that it depends on the base structure, and it is difficult to make devices in multiple layers. In such cases, there are limitations on where the single crystal can be made, or it is necessary to provide a buffer layer between layers, making the manufacturing process complicated.

第1図は従来のヒートシンク法によるSOI形成のため
の試料油面図である。熱伝導度の高いシリコン基板1の
上に、電気的に絶縁性の8i02膜2を付着し、その一
部を薄くして熱の逃けやすいヒートシンク4を設け、そ
の上に多結晶あるいは非晶質のシリコン薄膜3を成長さ
ゼる。光ビーム等によりヒートシンク4及びその周囲の
シリコン薄膜3を加熱溶融しそのあと加熱aを除去する
とヒートシンク4から多くの熱が基板1に逃けるために
ヒートシンク4の中心部の直上のシリコン薄膜3から凝
固し始め、順にその周囲が冷えて凝固するため、始めに
凝固した結晶粒を核としてエピタキシャル成長するため
少くともヒートシンク4より大きな単結晶が成長でへる
FIG. 1 is a sample oil surface diagram for SOI formation using the conventional heat sink method. An electrically insulating 8i02 film 2 is attached to a silicon substrate 1 with high thermal conductivity, a part of which is thinned to provide a heat sink 4 that allows heat to easily escape, and a polycrystalline or amorphous film is placed on top of the heat sink 4. A high quality silicon thin film 3 is grown. When the heat sink 4 and the silicon thin film 3 around it are heated and melted by a light beam, etc., and then the heating a is removed, a lot of heat escapes from the heat sink 4 to the substrate 1, so that the silicon thin film 3 directly above the center of the heat sink 4 is heated and melted. It begins to solidify, and as the surrounding area cools and solidifies, epitaxial growth occurs using the first solidified crystal grains as nuclei, so that at least a single crystal larger than the heat sink 4 is grown.

この方法は前にも述べたように、ヒートシンク部4のよ
うに、あらかじめ定められた場所に単結晶を作ることが
できるという長所はあるが、ヒートシンクは熱の逃けが
艮くなくてはならないので、下地にデバイスが作られて
いると熱伝導が悪くな゛るため、選択的にヒートシンク
を形成できなくなり単結晶は成長しない。
As mentioned earlier, this method has the advantage of being able to form a single crystal in a predetermined location, such as the heat sink part 4, but the heat sink must be able to easily dissipate heat. If a device is fabricated on the base, heat conduction will be poor, making it impossible to selectively form a heat sink and a single crystal will not grow.

(発明の目的) 本発明の目的は上記のような欠点を除去し、下地構造に
無関係で、かつ任意の場所に単結晶半導体膜を形成する
方法を提供することである。
(Objective of the Invention) An object of the present invention is to provide a method for eliminating the above-mentioned drawbacks and forming a single crystal semiconductor film at any location regardless of the underlying structure.

(発明の構成) 本発明は絶縁層上の半導体薄膜を加熱し溶融させ、固ま
らせて前記半導体薄膜を単結晶化させるSOI形成方法
において、前記半導体薄膜の表曲に、上記半導体の融点
においても液化しない膜(以下キャップ膜と称する)を
設け、その上にキャップ族より蒸発しやすい物質からな
る膜(以下蒸発膜と称する)を設け、蒸発膜の上の一部
に蒸発膜より蒸発しにくい腰て゛覆い、その後短時間の
加熱処理を行なって前記蒸発しにくい膜で覆っていない
部分を中心として前記半導体薄膜會単結晶化することに
より構成される。
(Structure of the Invention) The present invention provides an SOI forming method in which a semiconductor thin film on an insulating layer is heated, melted, and solidified to make the semiconductor thin film into a single crystal. A film that does not liquefy (hereinafter referred to as the cap film) is provided, and a film made of a substance that evaporates more easily than the cap group (hereinafter referred to as the evaporation film) is provided on top of the film, and a part of the film made of a substance that is more difficult to evaporate than the evaporation film is placed on top of the evaporation film. It is constructed by covering the semiconductor thin film, and then subjecting it to a short-time heat treatment to form a single crystal of the semiconductor thin film, centering on the portions not covered by the film that is difficult to evaporate.

(実施例) 以下本発明を実施例に基づき、図を用いて説明する。説
明には半導体としては通常用いられるシリコンを例とし
て用いる。
(Example) The present invention will be described below based on an example and with reference to the drawings. In the explanation, silicon, which is commonly used as a semiconductor, will be used as an example.

第2図は本発明による試料の断面構造である。FIG. 2 shows a cross-sectional structure of a sample according to the present invention.

ここで5は石英基板であるが熱伝導の悪いもので、下地
の構造に無関係に熱の逃けの悪いものて゛あれはよい。
Here, 5 is a quartz substrate, which has poor heat conduction, and regardless of the underlying structure, it is better to have poor heat dissipation.

例えば表面にP縁膜を形成した半導体基板でもよい。6
は単結晶化されるべき多結晶シリコン膜で、厚さは0.
5μmていどである。7はシリコン膜6を加熱中の汚染
、変形を防止するキャップ膜でSiO2やSi3N4で
あり、シリコンの融点においても液化しない。厚さは8
i0.なら0.5μmていどでよい。8はキャップ膜に
比べれば蒸発しやすい物質である多結晶シリコン膜(蒸
発膜)で厚さは約0.1μmである。9は蒸発膜8の蒸
発全防止するためのS I 02膜で、厚さは約05μ
mである。
For example, it may be a semiconductor substrate with a P film formed on its surface. 6
is a polycrystalline silicon film to be made into a single crystal, and its thickness is 0.
It is about 5 μm. A cap film 7 prevents contamination and deformation of the silicon film 6 during heating and is made of SiO2 or Si3N4, which does not liquefy even at the melting point of silicon. The thickness is 8
i0. If so, 0.5 μm is sufficient. Reference numeral 8 denotes a polycrystalline silicon film (evaporation film), which is a material that evaporates more easily than the cap film, and has a thickness of about 0.1 μm. 9 is an S I 02 film for completely preventing evaporation of the evaporation film 8, and its thickness is approximately 05 μm.
It is m.

この構造を1ノ−ザビーム、電子ビームあるいはランプ
アニールを用いて加熱し、シリコン膜6を溶融させて加
熱を止める。アニール条件はArm/−ザならば例えは
出力5W、ビーム径40μmである。
This structure is heated using a laser beam, electron beam, or lamp annealing to melt the silicon film 6 and then stop heating. The annealing conditions are, for example, an output of 5 W and a beam diameter of 40 μm in the case of Arm/-.

シリコン膜6の熱に、ひとつには、シリコン膜6を伝っ
て横方向に、もうひとつは輻射によって逃ける。しかし
石英基板5の万へは石英の熱伝導が悪いため逃はない。
The heat from the silicon film 6 escapes in one direction in the lateral direction through the silicon film 6, and in the other by radiation. However, the heat cannot escape to the quartz substrate 5 due to poor heat conduction of quartz.

また外部が空気などの気体又は真空であるため熱伝導度
は低くまた、加熱が非常に短時間であるため対流も起ら
ず、一般には試料の表面からは熱は逃けない。しかし、
開口f1510からは/リコンが蒸発するためlこ気化
熱全音い、この方法tは17−ザビームによる加熱の揚
台、蒸発防止膜9を反射防止膜たとえば厚さ850Xの
8i(J、膜とすること(こより、周囲の温度を上け、
さらに効率良く開口部10から冷却させることができる
Furthermore, since the outside is a gas such as air or a vacuum, thermal conductivity is low, and since heating is very short, convection does not occur, and generally heat does not escape from the surface of the sample. but,
Since the recon evaporates from the aperture f1510, there is a lot of heat of vaporization.This method is based on heating by the beam 17, and the evaporation prevention film 9 is an antireflection film, for example, an 8i (J, film with a thickness of 850X). (Increase the surrounding temperature,
Cooling can be further efficiently performed through the opening 10.

説明では半導体膜6としてシリコン、蒸発防止膜9とし
て8i0.かS i 、 N4.蒸発物質8としてはシ
リコンを用いて説明したが、半導体膜6の融点付近での
蒸発のしやすさの関係さえ満足すればどのような物質で
も良いことは明らかである。
In the explanation, silicon is used as the semiconductor film 6 and 8i0. or S i , N4. Although the description has been made using silicon as the evaporative substance 8, it is clear that any material may be used as long as it satisfies the relationship of ease of evaporation near the melting point of the semiconductor film 6.

(発明の効果) 本発明の方法により、下地の構造に無関係に、任意の場
所にSOI単結晶の形成が可能となる。
(Effects of the Invention) According to the method of the present invention, an SOI single crystal can be formed at any location regardless of the underlying structure.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のヒートシンク法による80I形成のため
の試料断面図で、1はシリコン基板、2Fi、8i0−
膜、3は多結晶シリコン膜、4σヒートシンクである。 第2図は本発明による80I形成のための試料断面図で
、5は石英基板、6は多結晶シリコン、7はSin、な
どのキャップ膜、8はキャップ膜7に比べて蒸発しやす
い膜であるシリコン、9は蒸発防止膜であるS10.ま
たは8i、N、、lOは開口部である。 工S技術院艮 龍1図
Figure 1 is a cross-sectional view of a sample for forming 80I using the conventional heat sink method, where 1 is a silicon substrate, 2Fi, 8i0-
The film 3 is a polycrystalline silicon film and is a 4σ heat sink. FIG. 2 is a cross-sectional view of a sample for forming 80I according to the present invention, in which 5 is a quartz substrate, 6 is polycrystalline silicon, 7 is a cap film such as Sin, and 8 is a film that evaporates more easily than cap film 7. 9 is an evaporation prevention film S10. Or 8i, N, , 1O are openings. Engineering S Technology Academy Aryu 1 diagram

Claims (1)

【特許請求の範囲】[Claims]  絶縁層の半導体薄膜を加熱し溶融させ、固まらせて前
記半導体薄膜を単結晶化させるSOI形成方法において
、前記半導体薄膜の表面に、上記半導体の融点において
も液化しない膜(以下キャップ膜と称する)を設け、そ
の上にキャップ膜より蒸発しやすい物質からなる膜(以
下蒸発膜と称する)を設け、蒸発膜の上の一部に蒸発膜
より蒸発しにくい膜で覆い、その後短時間の加熱処理を
行なって前記蒸発しにくい膜で覆っていない部分を中心
として前記半導体薄膜を単結晶化することを特徴とする
SOI形成方法。
In an SOI forming method in which a semiconductor thin film of an insulating layer is heated, melted, and solidified to single-crystallize the semiconductor thin film, a film (hereinafter referred to as a cap film) that does not liquefy even at the melting point of the semiconductor is provided on the surface of the semiconductor thin film. A film made of a substance that evaporates more easily than the cap film (hereinafter referred to as evaporation film) is provided on top of the cap film, and a part of the top of the evaporation film is covered with a film that evaporates more easily than the evaporation film, and then heat treatment is performed for a short time. A method for forming an SOI, characterized in that the semiconductor thin film is single-crystalized mainly in the portions not covered by the film that is difficult to evaporate.
JP15049084A 1984-07-21 1984-07-21 Formation of soi Pending JPS6130024A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15049084A JPS6130024A (en) 1984-07-21 1984-07-21 Formation of soi

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15049084A JPS6130024A (en) 1984-07-21 1984-07-21 Formation of soi

Publications (1)

Publication Number Publication Date
JPS6130024A true JPS6130024A (en) 1986-02-12

Family

ID=15498006

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15049084A Pending JPS6130024A (en) 1984-07-21 1984-07-21 Formation of soi

Country Status (1)

Country Link
JP (1) JPS6130024A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5525540A (en) * 1993-12-13 1996-06-11 Nec Corporation Method for manufacturing silicon layer having impurity diffusion preventing layer
US9206460B2 (en) 2004-10-12 2015-12-08 Bayer Healthcare Llc Concentration determination in a diffusion barrier layer

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5814524A (en) * 1981-07-17 1983-01-27 Fujitsu Ltd Manufacturing semiconductor device
JPS58184720A (en) * 1982-04-23 1983-10-28 Nec Corp Manufacture of semiconductor film

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5814524A (en) * 1981-07-17 1983-01-27 Fujitsu Ltd Manufacturing semiconductor device
JPS58184720A (en) * 1982-04-23 1983-10-28 Nec Corp Manufacture of semiconductor film

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5525540A (en) * 1993-12-13 1996-06-11 Nec Corporation Method for manufacturing silicon layer having impurity diffusion preventing layer
US9206460B2 (en) 2004-10-12 2015-12-08 Bayer Healthcare Llc Concentration determination in a diffusion barrier layer
US9546974B2 (en) 2004-10-12 2017-01-17 Ascensia Diabetes Care Holdings Ag Concentration determination in a diffusion barrier layer

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