JPS612976B2 - - Google Patents

Info

Publication number
JPS612976B2
JPS612976B2 JP57117887A JP11788782A JPS612976B2 JP S612976 B2 JPS612976 B2 JP S612976B2 JP 57117887 A JP57117887 A JP 57117887A JP 11788782 A JP11788782 A JP 11788782A JP S612976 B2 JPS612976 B2 JP S612976B2
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57117887A
Other versions
JPS5823377A (ja
Inventor
Goodon Riido Deebitsudo
Edowaado Riiku Richaado
Erusuwaasu Teiraa Jerarudo
Suteiiburu Uiriamuzu Jon
Hanto Kurisuchan Jon
Hawaado Haatangu Maikeru
Haabaato Noruta Aasaa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS5823377A publication Critical patent/JPS5823377A/ja
Publication of JPS612976B2 publication Critical patent/JPS612976B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0888—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using selective caching, e.g. bypass
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/31—Providing disk cache in a specific location of a storage system
    • G06F2212/312—In storage controller
JP57117887A 1981-08-03 1982-07-08 デ−タ記憶システム Granted JPS5823377A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US289631 1981-08-03
US06/289,631 US4430701A (en) 1981-08-03 1981-08-03 Method and apparatus for a hierarchical paging storage system

Publications (2)

Publication Number Publication Date
JPS5823377A JPS5823377A (ja) 1983-02-12
JPS612976B2 true JPS612976B2 (ja) 1986-01-29

Family

ID=23112365

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57117887A Granted JPS5823377A (ja) 1981-08-03 1982-07-08 デ−タ記憶システム

Country Status (4)

Country Link
US (1) US4430701A (ja)
EP (1) EP0071719B1 (ja)
JP (1) JPS5823377A (ja)
DE (1) DE3279187D1 (ja)

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JPS60229111A (ja) * 1984-04-26 1985-11-14 Fanuc Ltd 数値制御方式
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US5293595A (en) * 1990-12-17 1994-03-08 Unisys Corporation Paging system using extension tables for conflict resolution
US5274799A (en) * 1991-01-04 1993-12-28 Array Technology Corporation Storage device array architecture with copyback cache
JP3451099B2 (ja) * 1991-12-06 2003-09-29 株式会社日立製作所 外部記憶サブシステム
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US5341351A (en) * 1992-10-08 1994-08-23 International Business Machines Corporation Method and means for optimally accessing data residing on dual actuator DASDs
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US5826109A (en) * 1994-01-04 1998-10-20 Intel Corporation Method and apparatus for performing multiple load operations to the same memory location in a computer system
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US6073211A (en) * 1994-12-13 2000-06-06 International Business Machines Corporation Method and system for memory updates within a multiprocessor data processing system
US5606679A (en) * 1995-02-28 1997-02-25 International Business Machines Corporation Method for optimal retrieval of non-volume-specific data
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JP4646526B2 (ja) 2004-02-18 2011-03-09 株式会社日立製作所 記憶制御システム及び同システムの制御方法
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US8694715B2 (en) 2007-10-22 2014-04-08 Densbits Technologies Ltd. Methods for adaptively programming flash memory devices and flash memory systems incorporating same
US8321625B2 (en) 2007-12-05 2012-11-27 Densbits Technologies Ltd. Flash memory device with physical cell value deterioration accommodation and methods useful in conjunction therewith
US8359516B2 (en) 2007-12-12 2013-01-22 Densbits Technologies Ltd. Systems and methods for error correction and decoding on multi-level physical media
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US8825700B2 (en) * 2008-05-26 2014-09-02 Microsoft Corporation Paging hierarchical data
US8819385B2 (en) 2009-04-06 2014-08-26 Densbits Technologies Ltd. Device and method for managing a flash memory
US8458574B2 (en) * 2009-04-06 2013-06-04 Densbits Technologies Ltd. Compact chien-search based decoding apparatus and method
US9330767B1 (en) 2009-08-26 2016-05-03 Avago Technologies General Ip (Singapore) Pte. Ltd. Flash memory module and method for programming a page of flash memory cells
US8995197B1 (en) 2009-08-26 2015-03-31 Densbits Technologies Ltd. System and methods for dynamic erase and program control for flash memory device memories
US8730729B2 (en) 2009-10-15 2014-05-20 Densbits Technologies Ltd. Systems and methods for averaging error rates in non-volatile devices and storage systems
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US9037777B2 (en) * 2009-12-22 2015-05-19 Densbits Technologies Ltd. Device, system, and method for reducing program/read disturb in flash arrays
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US8510639B2 (en) 2010-07-01 2013-08-13 Densbits Technologies Ltd. System and method for multi-dimensional encoding and decoding
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Also Published As

Publication number Publication date
EP0071719A3 (en) 1986-06-11
US4430701A (en) 1984-02-07
DE3279187D1 (en) 1988-12-08
EP0071719A2 (en) 1983-02-16
JPS5823377A (ja) 1983-02-12
EP0071719B1 (en) 1988-11-02

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