JPS61290794A - Wiring board - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a wiring board used in electronic circuits, particularly high-speed, high-frequency electronic circuits such as electronic computers and communication devices.

[Background of the invention]

BACKGROUND ART Multilayer wiring boards are used in wiring for computers, communication devices, etc. in response to an increase in the number of wires. In particular, boards that handle high frequencies or pulses with a fast rise have a ground layer on the entire surface in addition to the signal layer, as shown in FIG. 5, to keep the characteristic impedance constant. In the figure, 1 is a signal pattern, 2 is a ground layer, and 3 is an insulating layer (dielectric layer).

However, if the number of wirings increases further, increasing the number of wiring layers correspondingly increases the thickness of the substrate, and there is actually an upper limit to the number of wiring layers. A more important problem is that although it is necessary to electrically connect each wiring layer using through-holes, the yield of through-holes decreases as the number of wiring layers increases due to limitations in through-hole production technology.

Furthermore, as the number of wiring layers increases, the length of the through-hole portion also increases, and the signal propagation delay in the through-hole portion cannot be ignored. In order to solve these problems, it is possible to reduce the thickness of the dielectric layer, but thinning the dielectric layer lowers the characteristic impedance of the wiring, and it is necessary to match the impedance of the semiconductor logic circuit and the wiring. For applications such as computers, a decrease in characteristic impedance is unacceptable. That is, in conventional wiring boards, I! with constant characteristic impedance and board thickness. However, there are problems in that a large number of wiring lines cannot be accommodated, and the yield of through-hole formation is not good.

In addition, as a known document regarding a multilayer wiring board that ensures appropriate characteristic impedance, for example, Japanese Patent Laid-Open No. 55-1
32773 is mentioned.

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above-mentioned drawbacks of the prior art and to provide a wiring board that can ensure an appropriate characteristic impedance even if the dielectric layer is thin.

[Summary of the invention]

In order to achieve the above object, the present invention provides slits in the ground layer at predetermined locations in place of the conventional full-surface ground layer, thereby making it possible to maintain a constant characteristic impedance even when the thickness of the dielectric is reduced. This is what was done.

[Embodiments of the invention]

The present invention will be explained below with reference to FIGS. 1 to 4.

First, FIG. 2 schematically shows, using electric lines of force 4, the electric field distribution in a wiring board using a conventional full-surface ground layer. In this case, it is a well-known fact that the characteristic impedance Zo can be expressed as Zo=Jgo,/C- if line loss is ignored, and the inductance L and capacitance C per unit length are determined by the line width W, dielectric It is determined by the body thickness and the dielectric constant ε1. Therefore, if the dielectric thickness is made smaller, C increases and the characteristic impedance zoka decreases, but it is necessary to reduce the dielectric thickness and prevent the characteristic impedance from decreasing and keep it constant. For this purpose, it is sufficient to make C essentially unchanged. This means that h
If is constant, it is equivalent to substantially decreasing C and increasing Zo without changing much L.

In order to effectively accomplish this, the present invention is designed to provide slits in the ground layer 2 directly below or directly above both ends of the signal wiring 1.

This will be qualitatively explained using FIGS. 2 and 1.

FIG. 2 schematically shows the charge distribution 5 on the signal wiring along with the electric field distribution, and it can be seen from this that the charges are concentrated at the ends of the wiring. It is well known that the charge distribution becomes as shown in FIG. 2. Due to such a charge distribution 5, the electric lines of force 4 are concentrated at the end of the signal wiring, and therefore the capacitance C of the wiring is mainly caused by the end of this side. It will depend on the effect. Therefore, the characteristic impedance Z is reduced by reducing the capacitance C.

In order to increase this, it is effective to reduce the capacitance formed at the end of the wiring. The basic configuration of an example of the wiring board according to the present invention shown in Fig. 1 is based on this principle, and the electric field distribution is changed using electric lines of force by the slit in the ground layer provided directly under the wiring side end. This makes it possible to reduce the capacitance formed at the wiring side end.

In order to quantify the points described qualitatively above, it is necessary to solve Laplace's equation, and Figure 3 shows the calculation results. This shows the rate of increase in the characteristic impedance Zo with respect to the slit width 5 (=St + 82).Even if h is smaller than this, the characteristic impedance Zo can be kept constant by appropriately setting the slit width S. This makes it possible.

Although FIG. 4 shows a cross section of the wiring board according to the present invention configured as a multilayer wiring board, no explanation is necessary for this.

〔Effect of the invention〕

As explained above, according to the present invention, the thickness of the dielectric layer can be reduced while keeping the characteristic impedance constant, which is effective in improving the yield when manufacturing wiring boards, especially multilayer wiring boards. Furthermore, since the length of the through-hole portion is shortened, the signal propagation time in this portion can be shortened. Furthermore, since the number of wiring layers can be increased, a large-scale circuit can be formed relatively compactly by accommodating a large number of wirings. In other words, it is possible to implement highly integrated systems, and it will be possible to meet the demands for faster calculation speeds. Moreover, in the present invention, it is possible to effectively increase the characteristic impedance with a relatively small slit width, so a wiring board with sufficient shielding effect and low leakage noise can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the basic configuration of an example of the wiring board according to the present invention, FIG. 2 is a diagram schematically showing the electric field distribution in a conventional wiring board, and FIG. 5 is a diagram showing the basic configuration of an example of the wiring board according to the present invention. FIG. 4 is a diagram showing a cross-sectional configuration of a multilayer wiring board according to the present invention, and FIG. 5 is a diagram showing a cross-sectional configuration of a conventional wiring board. It is. 1...Signal wiring 2...Earth layer 3...Dielectric layer

Claims (1)

[Claims] 1. In a wiring board with a structure in which a signal wiring and a ground layer are provided across a dielectric, the corresponding part of the ground layer on at least one side directly below or directly above both ends of the wiring along the signal wiring. A wiring board characterized by having a structure in which a slit is provided by removing the .