JPS61283240A - Coding system - Google Patents

Abstract

PURPOSE:To attain synchronous transmission while superimposing secondary information without losing the balance of a code being a feature of an AMI code by utilizing a F bit. CONSTITUTION:A violation operation circuit 12 applies the 1st violation operation V1 to the F bit being logical 1 at first. Then the 2nd violation operation V2 is applied to a code '1' (including F<9>) appearing up to the F-bit F<9> being the 4th '1' from the bit F<1> subjected to the 1st operation V1. That is, the operation V2 is performed by the following criterion. Then an odd number being >=1 and a minimum number of unoperated bits '1' exist in bits '1' applied with the 1st and 2nd operations and in response to the '0' of '1' of the secondary information (b) to be transmitted, the 2nd operation V2 is applied up to the F-bit F<5> (F<5> inclusive) being the 2nd '1' counted from the F<1> or applied up to the F<9> (not including F<5>, and F<9> inclusive) from the next bit to the F<5>. Thus, a transmission output (c) is given after the processing above.

Description

[Detailed Description of the Invention] [Scope of Industrial Application] The present invention is applicable to AMI (Alternate Mark I).
In a data transmission system using a (version) code,
It concerns the encoding method for simultaneously transmitting secondary information.

[Prior art and its problems]

In digital data networks, to connect data terminal equipment in the subscriber's premises to network exchanges, etc.

It is necessary to transmit data over subscriber cables.

Furthermore, in order to connect a computer and a terminal, it becomes necessary to transmit data using a cable within the subscriber's premises. In such cases, a transmission device (called a baseband modem or the like) that realizes pulse transmission in the baseband using a metallic cable is generally used.

As a baseband transmission method, it is often done to add some bits to data bits from a terminal to create an envelope format for transmission.

FIG. 3 is a diagram showing such an envelope format, where F is an added frame synchronization bit.

S is a control bit, and D (where i = 1 to n) is a terminal data bit. Note that there are examples of n being 6 or 8, but in the present invention, a relatively large value is used as will be explained later. One of the advantages of using envelope format
First, by periodically setting the F bit to It 1 pp, it is possible to easily recover the timing in Cruz transmission. For ease of envelope synchronization, the F bit is often an alternating code of tt 1 pp and u □ n.

Next, as a code actually used for base pantone pulse transmission, the AMI code (also called a bipolar code) is used, taking into consideration the DC component and bandwidth. Pseudo-ternary codes) are often used.

Figure 4 is a diagram explaining AMI code transmission with It l 71, It Q +3 alternating F bits, (1)
terminal data bits D1 to D6 and S bit are all 0
” shows the transmission pulse waveform when +1 l II,
Only the alternating F bits of IIQ11 are transmitted as positive and negative alternating signals. Also, (2) shows the state in which actual terminal data is being sent, and the AMI encoding rules are observed.

Generally, in a transmission system using AMI codes, a so-called violation operation, which intentionally violates the AMI encoding rules, is used as a method for transmitting low-speed secondary information by doubling it without impairing the original data transmission capacity. However, in such a method, secondary information can only be transmitted as status or sufficiently slow asynchronous information.

[Purpose of the invention]

Therefore, the object of the present invention is to utilize the above-mentioned F bit,
This is an attempt to obtain a coding method in which secondary information is superimposed and transmitted synchronously in an AMI code transmission system.

[Failure to solve the problem]

The principle of the invention is based on the AMI code rule violation operation, but by devising a method to add the violation operation, (
1) Minimize the fluctuation of the DC component of the code due to violation operations, (2) Transmit element timing information (bit synchronization) for synchronous transmission, and (
3) In addition to transmitting ``1'' and 0'' of secondary information, it is possible to determine on the receiving side whether or not secondary information is being transmitted.

That is, according to the present invention, in a transmission system in which data is transmitted and received in an envelope format with frame bits added, a plurality of periods of an envelope having frame bits that take the code tt 111 at 9 periodic intervals are used as secondary information. Match the element interval of .

The first frame bit of the AMI encoding rule is applied to the first frame bit of the section.
, the second violation is added to the other code "1" in the above interval, and the interval between these first and second violations is made smaller than half of the above interval, and the first The number of codes II 171 that do not add a violation during the second violation shall be an odd number of 1 or more and the minimum possible number, and the code It 017 of secondary information is still the second according to It 111. By choosing the position where the violation is applied to be on both hands or in the second half of the maximum possible interval between the first and second violation, respectively.

A coding method is obtained that is characterized by superimposing and synchronously transmitting low-speed secondary information.

〔Example〕

Figure 1 shows the old practice of implementing the method of the present invention. It is a diagram showing an example of a circuit configuration, and → indicates transmission (b). The meaning of the part is different from the receiving part.

FIG. 2 is a diagram for explaining the operation of the circuit of the embodiment shown in FIG. 1. It is a diagram depicting the Rus series.

The configuration and operation of this device will be described below with reference to FIGS. 1 and 2. The envelope generation/AMI encoding circuit 11 of the transmitter AMI encodes the terminal data a, and generates n=20 envelopes with the same period as one element section of the secondary information ((1) in Fig. 2). reference). For example, the speed of the transmission line code is f.

Then, the data rate of synchronous secondary information is fo/20
(n+2) and r fo =64 k b r t/s
becomes. As shown in Figure 3, if n = 6, then 400
bit/s.

The bio(/-) operation circuit 12 first performs a first violation operation on the F bit, which is the first It 171 in the above section. This violation operation is indicated by Vl in FIG. 2.Next As the second violation operation v2, the code 1 appearing between the bit (Fl) where the first violation operation Vl was performed and the F bit (F9) which is the fourth (t11j) (111 (including F)), and this is done in v2. This violation operation v2 is performed based on the following criteria. That is, the first violation operation and the second violation operation There is an odd number of 1 or more and a minimum number of non-violation bits ""1" between the bins) ("1") in which the violation is applied, and the secondary information to be transmitted is
I or II I II Depending on
The process is performed from the next bit of F9t (excluding F5, but including F9). After processing as described above, transmission output C is generated.

The frame synchronization (envelope synchronization)/decoding circuit 14 on the receiving side establishes correct frame synchronization (or envelope synchronization) from the received transmission power d, ignoring violations, and issues terminal data output e.

Still violation identification/secondary element synchronization circuit 1
4, we investigated the interval between two consecutive violations of the transmission force d, and found that while the first violation (V+) to the second violation (V2) was within 8 envelopes, the second violation Knowing that it is more than 12 envelopes from the violation to the first violation, and using this difference, the receiving side can distinguish between V and V2. The element synchronization information is obtained by detecting the F beep) (Fl must be Vl).

Further, the secondary information code identification circuit 15 receives the transmission power d and the above-mentioned element synchronization information, and counts the interval between vl and v2 in more detail, thereby determining the It Q II of the secondary information.
, II I II and issues a secondary information output f. Then, it is possible to know whether or not secondary information is being transmitted based on the presence or absence of a violation operation. Since the polarities of Naori 1 and V2 are always reversed, the deviation of the DC component due to the violation operation is quickly eliminated (within 8 envelopes at the most).

In the above, n is set to 20, but it is not limited to this. However, in reality, the quotient divided by 4 (4 frames) is set to be an odd number. Depending on the content of the secondary information, for example, 28, 36, 44. ...etc. are used. 12 is also used on the smaller side.

The content of secondary information to be applied is limited. Note that this odd number is used to prevent the length of the first half from being equal to the length of the second half when the secondary information is divided into element sections. Also, either the first half or the second half can be made longer.

〔Effect of the invention〕

As can be seen from the above description, there are two aspects of the present invention.

It becomes possible to superimpose and synchronously transmit secondary information without impairing code balance, which is a feature of AMI codes.

[Brief explanation of drawings]

Figure 1 is a diagram showing an example of a circuit configuration for implementing the method of the present invention, Figure 2 is a diagram for explaining an example of the operation of the circuit in Figure 1, and Figure 3 is an illustration of an envelope format. The figure of Sudame, Figure 4, is to 1 u. FIG. 4 is a schematic diagram illustrating AMI code transmission with alternating F bits. Explanation of symbols: 11 is envelope generation/AMI encoding circuit, 12 is violation operation circuit, frame synchronization (
Envelope synchronization)/decoding circuit. Reference numeral 14 represents a violation identification/secondary information element synchronization circuit, and reference numeral 15 represents a secondary information code identification circuit. Figure 1 Figure 3 Figure 4

Claims (1)

[Claims] 1. AM in envelope format with frame bit added
In a transmission system that sends and receives data using an I code, multiple periods of an envelope having frame bits that periodically take the code "1" are made to coincide with element sections of secondary information, and AMI is added to the first frame bit of the section. Add the first violation of the encoding rule, add the second violation to the other code "1" in the interval, and make the interval between these first and second violations smaller than half of the interval. None, and the number of codes "1" that do not add a violation between the first and second violations shall be an odd number of 1 or more and the minimum possible number, and the number of codes "1" for the secondary information is "0".
” or “1”, by selecting the position where the second violation is added in the first half or the second half of the maximum possible interval between the first and second violation, superimposing low-speed secondary information. A coding method characterized by synchronous transmission.