JP2806938B2 - Code reproduction method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a code reproduction system used when performing data communication by wire or wireless (radio wave, light, etc.).

[Prior art] Conventionally, when performing data communication by wire or wireless (radio wave, light, etc.), data is encoded by an encoding method (for example, NRZ, RZ, NRZI, etc.) having no synchronization component for each bit. There was something to transmit. By the way, in the case of performing data communication using such an encoding method, for example, when the same code “1” or “0” is continuous, the accuracy of the clock on the data sending side and the sampling period of the data receiving side are reduced. In some cases, synchronization deviation occurs due to accuracy or the like, and normal code reproduction cannot be performed on the receiving side. Therefore, conventionally, a synchronization bit for re-establishing synchronization at a certain interval of data is provided, and the synchronization is corrected at that time. FIG. 2 is a diagram for explaining the operation of a conventional example in which data transmission is performed by the NRZ method, and shows a case where a received signal having a bit width shorter than a normal bit width is input, and Bs indicates a synchronization correction. Bits. That is, on the data receiving side, the input signal is sampled every certain time, the input level is determined, the determination result is counted by the basic counter, and the code is reproduced depending on whether the count value is equal to or greater than the determination reference value. For example, the sampling period is set so that five samplings are performed for one bit.
For the third bits B _{1 to} B ₃ , the sign is determined every five samplings. In this sign determination, for example, the larger one of the count value Lcnt of the basic counter that counts when the level is “L” and the count value Hcnt of the basic counter that counts when the level is “H” is determined. The sign is determined by comparing with a reference value. Assuming that the determination reference value is “3”, the first to third bits B ₁
In .about.B _3, the count value of any level "L" Lcnt
Is “5” (≧ 3), the first to third bits B _{1 to} B ₃
Is determined to be "0". Further, in the fourth bit B _4, the level changes in the first 18 samples ( "L" → "H" )
Since there is to partition the bit B ₄ at the 17 sampling. At this time, the count values Lcnt and Hcnt of each basic counter do not exceed the judgment reference value “3”.
B ₄ is the error bit "E".

[Problems to be Solved by the Invention] As described above, in the above-described conventional example, synchronization may not be achieved in spite of the provision of the synchronization correction bit Bs. Requires that synchronization correction bits Bs be provided at short intervals. However, if the synchronization correction bits Bs are provided at short intervals, there is a problem that the number of bits in one frame increases and the data transmission speed decreases.

The present invention has been made in view of the above points, and an object thereof is to accurately reproduce a code without providing a synchronization correction bit at a short interval, and to reduce a data transmission speed. It is an object of the present invention to provide a code reproduction method capable of preventing the occurrence of a code.

[Means for Solving the Problems] The code reproduction method according to the present invention determines an input level by sampling an input signal coded by a coding method having no synchronization component for each bit at certain time intervals. The judgment result is counted by a basic counter, and a code is reproduced according to whether the count value is equal to or larger than a judgment reference value. In the case of claim 1, the judgment result obtained by sampling the latter half of the normal bit width is obtained. A second half counter for counting is provided. After the same sign continues, when a predetermined number of previously determined bits have the same sign in the bit determination immediately before inversion when the sign is inverted, the basic counter of the current bit is used. Sign determination is performed on the result of adding the count value of the second half counter of the immediately preceding bit to the count value.

[Operation] The present invention is configured as described above, and samples the input signal coded by the coding method having no synchronization component for each bit, determines the input level at certain intervals, and determines the determination result. Is counted by a basic counter, and in a code reproduction method for reproducing a code according to whether the count value is equal to or greater than a determination reference value, if a predetermined number of bits determined previously are the same code, the basic counter of the current bit Sign determination is performed on the result of adding the count value of the second half counter of the immediately preceding bit to the count value, and the code can be accurately reproduced without providing synchronization correction bits at short intervals. The transmission speed can be prevented from lowering.

[Embodiment] FIG. 1 is a diagram for explaining the operation of one embodiment of the present invention. In the same sign judgment system as in the above embodiment, a latter half counter for counting the judgment result obtained by sampling the latter half of a normal bit width. In the bit determination just before the inversion when the sign is inverted after the same sign continues, if the predetermined number of bits determined before is the same sign, the count value of the basic counter in the current bit is added to the last bit. Sign determination is performed on the result of adding the count value of the second half counter of the bit.

Now, in the case of performing the code determination of the fourth bit B _4,
From the 17 sampling and state changes toward the 18 sampling ( "L" → "H" ) occurs, classification of the previous bit B ₃ is first
Since 15 sampling count value Lcnt in the 4-bit B ₄ is "2". At this time, if the same code is obtained continuously (for example, the number of continuous bits is C or more), the count value Lcnt of the basic counter of the current bit or
And performs a determination by adding the count value of the second half portion counter before the bit B ₃ to hcnt. That is, in the first diagram, the count value of the basic counter fourth bit B ₄ of level "L" Lcnt is is a "2", the count value of the second half portion counter before the bit B ₃ Lcnt '"3 (The count value of the counter that starts counting from the third sampling of the normal bit is added) to make the determination. In this case, the added count value Lcnt ″ is “5”, If the criterion value is set to “5”,
"0" is obtained as the determination result. In this case, the count value Hcnt level "H" of the current bit, counted value Hcnt 'addition of the second half portion counter before the bit B ₃
Hcnt ″ is “0”. Further, in this embodiment, the sampling number at the normal bit width is set to "5", but it is needless to say that the sampling number may be set to another value.

[Effects of the Invention] As described above, according to the present invention, an encoded input signal having no synchronization component for each bit is sampled at certain time intervals, the input level is determined, and the determination result is determined by the basic counter. Counting, in an encoding and reproducing method for reproducing a code depending on whether the count value is equal to or greater than a determination reference value, if a predetermined number of bits determined before are the same code, the count value of the basic counter in the current bit is Sign determination is performed on the result of adding the count value of the second half counter of the linear bit, and the code can be accurately reproduced without providing synchronization correction bits at short intervals. This has the effect of preventing a reduction in transmission speed.

[Brief description of the drawings]

FIG. 1 is an operation explanatory diagram of one embodiment of the present invention, and FIG. 2 is an operational explanatory diagram of a conventional example.

Claims (1)

(57) [Claims] An input signal coded by a coding method having no synchronization component for each bit is sampled every certain time, an input level is determined, and a determination result is counted by a basic counter. In a code reproduction method for reproducing a code according to whether a value is equal to or greater than a determination reference value, a second half counter is provided for counting a determination result obtained by sampling a second half of a normal bit width, and after the same code continues,
When a predetermined number of previously determined bits have the same sign at the time of bit determination immediately before inversion when the sign is inverted, the count value of the latter half counter of the immediately preceding bit is added to the count value of the basic counter of the current bit. A code determination method for performing a code determination on the result of the code reproduction.