JPS6128215B2 - - Google Patents

Description

[Detailed Description of the Invention] Conventionally, in electronic devices such as semiconductor devices such as transistors and ICs, in which a plurality of identical patterns are repeatedly formed on a single substrate until the mid-manufacturing stage, electrical The conventional tests relied on the method of measuring the characteristics by applying a probe to each individual device, and at this stage, long-term electrical stress application tests were rarely performed. This is because when applying the method using a probe, which was used for short-time tests (measurements) as described above, to conduct long-term electrical stress application tests on each device, contact between the probe and the device instability, attaching the probe with the same regularity as the device on the substrate. Or, because of the complexity involved in continuous operation, it was considered impossible, or even if it was possible, it was not economically effective.

The aim of the invention is to provide an economical test method which does not have these drawbacks. According to the present invention, there is provided a method for testing an electronic device characterized by applying electrical stress to the electronic device at the wafer stage.

A feature of the present invention is that, at the wafer stage where a plurality of electronic devices are formed on one main surface side of a semiconductor wafer, a desired voltage is applied to a desired electrode of each of the plurality of electronic devices. When applying electrical stress, a voltage applying electrode having a flat upper surface corresponding to each of the electrodes of the plurality of electronic devices is provided on one main surface of the semiconductor substrate via an insulator, and the voltage applying electrode is preparing an electrical stress applying device section connected to the semiconductor substrate through a wiring section thinner than the plane;
The upper surface of each electrode of the plurality of electronic devices and the upper surface of the voltage applying electrode of the electrical stress applying device section are brought into contact with each other, and the other main surface of the semiconductor wafer and the semiconductor substrate of the electrical stress applying device section are brought into contact with each other. The method for testing an electronic device includes providing an electrode for applying electrical stress on each of the other main surfaces, and applying electrical stress to the plurality of electronic devices in this state. In particular, according to the present invention, this method can be applied to a desired electrode of an electronic device such as a semiconductor device such as a transistor or an IC, in which a plurality of devices with the same pattern are regularly and repeatedly formed on a single substrate until the mid-manufacturing stage. A method for testing an electronic device is obtained, which is characterized in that electrical stress is applied via a conductor device having the same repeating rule as an electrode. The requirements necessary for an apparatus for realizing the test method according to the present invention are as follows: (a) The electrodes for electrical connection between the apparatus and the device under test must repeat with the same regularity as the electrodes of the device under test. What is being done.

(b) It is easy to connect the device to an external power source.

(c) Even if a part of the device under test exhibits unexpected characteristics, measures must be taken to ensure that it does not affect other devices during the test. It is.

Hereinafter, using a semiconductor monolithic IC as an example, an embodiment that satisfies these three requirements will be described in detail with reference to the drawings. As shown in the conceptual diagram in Figure 1 during the manufacturing stage of a semiconductor monolithic IC, each of them is made up of regular "chips" 11 that can perform their functions by electrically connecting them to the outside. There is a stage of "wafer" 10 (hereinafter abbreviated as wafer) that is repeated. Furthermore, if we look at each of the chips 11, as shown in the conceptual diagram in FIG. It is divided into 22 parts. This embodiment relates to a method for testing a semiconductor monolithic IC at the wafer 10 stage, but in order to satisfy the above requirement (a) with the equipment used in this test, the bonding pad 22 and the bonding pad 22 as shown in FIG. It is necessary to form electrodes 32 having the same rules on the electrical stress applying device side in correspondence with each chip 11.
Part 31 of the electrode chip for applying electrical stress can be partially omitted or modified depending on the purpose of the test. By creating a pattern in which the electrode chip portions 31 shown in FIG. 3 are repeated in accordance with the regularity of the chips 11 on the wafer 10,
An electrical stress applying device 40 is configured as conceptually shown in the figure.

FIG. 5 is an enlarged view of a part of the cross section of the state in which the wafer 10 of FIG. 1 and the electrical stress applying device 40 shown in FIG. 4 are electrically connected. Structure of the electrical stress applying device section 40 and the above-mentioned requirements (a)
can be easily implemented using the technology for manufacturing the device under test section 10. That is, the insulator 5 is placed on the semiconductor substrate 51.
The structure is such that an electrode 32 is provided through the electrode 3. The above-mentioned requirement (c) is satisfied by inserting the thin wiring portion 64 between the wide electrode portion 65 and the contact portion 66 to the semiconductor substrate 51, as shown in the enlarged plan view of the electrode 32 (FIG. 6). . In other words, the cause of the greatest effect on other devices by a part of the device under test 10 is heat generation due to overcurrent, but by providing the thin wiring section 64, the thin wiring section 64 will melt if an overcurrent flows. Therefore, it is possible to instantly disconnect devices that have overcurrent flowing through them, and prevent unexpected heat generation. In addition, the above-mentioned requirement (b) requires that metal flat plates 54 (electrical stress application side) and 55 (ground side) be installed on the electrical stress application unit 40 and the substrate side of the device under test, as shown in FIG. This can be easily achieved by simply arranging them and mechanically adhering them from the outside. The reason why a semiconductor substrate is used here as the substrate 51 is that this allows the electrical stress applying device 40 to be manufactured using normal semiconductor wafer processing technology. For example, insulator 5
3 can be a thermal oxide film formed on one main surface of the semiconductor substrate by thermally oxidizing the semiconductor substrate. The hole in this insulator 53 and the electrode 32 above it are the same as the normal PR.
It can be formed using technology. On the other hand, when this substrate is made of an insulator, a through hole connecting the back electrode 54 on the other main surface of the substrate and each electrode 32 on one main surface is provided in the insulator substrate for each electrode, and the through hole It is necessary to connect the back surface electrode 54 and each electrode 32 through the wire, which makes manufacturing difficult. According to the present invention, for example, the back electrode 55 of a semiconductor wafer
is grounded, and a voltage for stress application is applied to the back electrode 54 on the other main surface of the electrical stress application device 40. This voltage is transmitted from the back electrode 54 to the semiconductor substrate 51 to each electrode 32.
2, the stress voltage is applied to each electrode 32 of the semiconductor wafer 10. Comparing the case where the method according to the invention as described above is implemented and the case where the electrical stress application test is performed after the case sealing etc. is assembled in the conventional life test, screening, etc., (a) Assembly There is no need to wait until later to conduct the test.
Defects in devices can be discovered early and corrective action can be taken quickly.

(b) If the test is a destructive test, the man-hours and materials required for assembling the device under test, which were previously necessary, are no longer required.

(c) For tests conducted after assembly, there were restrictions on test temperature due to assembly materials and jigs, but these will be relaxed.

(d) The space (location) used for testing is reduced.

There are other effects.

[Brief explanation of the drawing]

Figure 1 is a conceptual diagram of a wafer as a device under test. Figure 2 is a conceptual diagram of the chips inside the wafer, Figure 3
The figure is a conceptual diagram of the part corresponding to the chip on the side of the electrical stress applying device according to the present invention. FIG. 4 is a conceptual diagram of an apparatus for applying electrical stress according to the present invention. FIG. 5 is a schematic sectional view enlarging a part of the bonded state between the electrical stress applying device and the device under test according to an embodiment of the present invention. FIG. 6 is an enlarged plan view of an electrode according to the present invention. 10...wafer, 11...chip, 21...
Internal element and circuit section, 22... Bonding pad (electrode), 31... Electrode chip portion on the electrical stress applying device side, 32... Electrode, 40... Electrical stress applying device, 51... Semiconductor substrate, 5
3... Insulator, 54, 55... Electrode for applying electrical stress, 64... Thin wiring part, 65...
Wide electrode part, 66...Contact part with the substrate.

Claims (1)

[Claims] 1. At the wafer stage where a plurality of electronic devices are formed on one main surface side of a semiconductor wafer, a desired voltage is applied to a desired electrode of each of the plurality of electronic devices to provide long-term electrical power to the plurality of electronic devices. When applying stress, a voltage applying electrode having a flat upper surface corresponding to each of the electrodes of the plurality of electronic devices is provided on one main surface of the semiconductor substrate via an insulator, and the voltage applying electrode is An electrical stress applying device section connected to the one main surface of the semiconductor substrate by a wiring section thinner than a plane is prepared, and a voltage is applied between the upper surface of each electrode of the plurality of electronic devices and the electrical stress applying device section. electrodes for applying electrical stress are respectively provided on the other main surface of the semiconductor wafer and the other main surface of the semiconductor substrate of the electrical stress applying device section, and in this state, the An electronic device testing method characterized by applying long-term electrical stress to multiple electronic devices.