JPS6128112A - Three-phase high voltage controller - Google Patents

Three-phase high voltage controller

Info

Publication number
JPS6128112A
JPS6128112A JP14986384A JP14986384A JPS6128112A JP S6128112 A JPS6128112 A JP S6128112A JP 14986384 A JP14986384 A JP 14986384A JP 14986384 A JP14986384 A JP 14986384A JP S6128112 A JPS6128112 A JP S6128112A
Authority
JP
Japan
Prior art keywords
phase
signal
circuit
high voltage
zero
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14986384A
Other languages
Japanese (ja)
Other versions
JPH0746290B2 (en
Inventor
Akira Hisayoshi
久芳 明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Healthcare Manufacturing Ltd
Original Assignee
Hitachi Medical Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Medical Corp filed Critical Hitachi Medical Corp
Priority to JP59149863A priority Critical patent/JPH0746290B2/en
Publication of JPS6128112A publication Critical patent/JPS6128112A/en
Publication of JPH0746290B2 publication Critical patent/JPH0746290B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10Regulating voltage or current
    • G05F1/12Regulating voltage or current wherein the variable actually regulated by the final control device is ac
    • G05F1/40Regulating voltage or current wherein the variable actually regulated by the final control device is ac using discharge tubes or semiconductor devices as final control devices
    • G05F1/44Regulating voltage or current wherein the variable actually regulated by the final control device is ac using discharge tubes or semiconductor devices as final control devices semiconductor devices only

Abstract

PURPOSE:To simplify the circuit by applying sequentially a voltage given to each three-phase line based on the zero phase detected for each line voltage while applying limitation to the direction so as to prevent overshoot due to transient phenomenon and eliminating the adjusting position. CONSTITUTION:Each line voltage of U-V-W-U is detected by photocouplers 1PC 3PC as an isolated signal and a zero phase timing pulse is formed by a zero phase detection storage circuit 3. When a signal (a) among zero phase timing signals (a)-(f) at a phase of high voltage is given to a gate of a thyristor 1SCR, it is conductive, the anode goes to an L potential, all signal input/output terminals B-F go to L potential, no signals (b)-(f) are generated and only the signal (a) is generated. Thus, the signals (a)-(f) are ORed by an OR gate circuit OR, only the signal (a) appears as the zero phase timing signal of the high voltage applied phase being an input of an image pickup timer circuit 5 and an image pickup switching signal XST is given to the circuit 5 synchronously with the signal (a).

Description

【発明の詳細な説明】 〔技術分野〕 本発明は、三相高電圧制御装置に係り、特に、高電圧波
形の過渡現象を極力押さえ、かつ、高電圧発生装置の鉄
心の偏磁化が防止でき、また、調整の容易な三相高電圧
投入機構を備えた高電圧制御装置に関するものである。
[Detailed Description of the Invention] [Technical Field] The present invention relates to a three-phase high voltage control device, and particularly to a three-phase high voltage control device that suppresses transient phenomena in a high voltage waveform as much as possible and prevents biased magnetization of the iron core of a high voltage generator. The present invention also relates to a high voltage control device equipped with a three-phase high voltage turning-on mechanism that is easy to adjust.

〔背景技術〕[Background technology]

一次側制御方式の三相X線高電圧制御装置において、そ
の高電圧投入方法としては、従来、(1)三相を同時投
入し、ある一つの相のみ一定期間制動抵抗を入れる方式
と、(2)単相で投入し一定期間制動抵抗りの一相も導
入させて三相運転とする方式とがある。そのうち、前者
の(1)の方式では、X線負荷条件により制動抵抗の抵
抗値および制動時間をこまかく切り替える必要があるた
め、その制御回路も複雑となり、調整も容易ではない。
In a three-phase X-ray high-voltage control system using a primary side control system, the high voltage application methods have conventionally been: (1) simultaneous application of three phases and a braking resistor applied for a certain period of time in only one phase; 2) There is a method in which a single phase is turned on and one phase of braking resistance is also introduced for a certain period of time, resulting in three-phase operation. Among them, in the former method (1), the resistance value of the braking resistor and the braking time must be changed in detail depending on the X-ray load conditions, so the control circuit is complicated and adjustment is not easy.

また、大電流を直接制御しなけれはならないという問題
がある。また、後者の(2)の方式においても、三相運
転に移行する点が理論上は単相投入後90°の点が最適
となるが、実際には高圧系の浮遊容量、電源設備のイン
ピーダンス等の影響を受けて多少のずれが生じるため調
整が難しくなり、特に、後述する逆位相投入を行う場合
には各回の投入相が異なるため、各相のインピーダンス
の差の影響を受けて調整が極めて困鼎になるという問題
がある。
Another problem is that a large current must be directly controlled. Also, in the latter method (2), the optimal point for transitioning to three-phase operation is theoretically 90° after the single-phase is turned on, but in reality the stray capacitance of the high voltage system and the impedance of the power supply equipment Adjustment becomes difficult because a slight deviation occurs due to the influence of factors such as The problem is that it is extremely difficult.

次に、高電圧発生装置の偏磁化防止方法としては、撮影
の前にあらかじめ直流磁化を与え、その磁化を打ち消す
方向で投入する方式と、前回の終γ相を検出して記憶し
2、その磁化を打ち消す方向で投入する方式とがあり、
前者は偏磁化の防1ヒはほぼ完全にできるが、そのため
には機構が複雑となり、また、調整個所も増え、特に、
不用なX線が放射されるという問題点がある。また、後
者は構造は簡略化できるが、特定の撮影時間では偏磁化
が完全に防止できないという問題点がある。
Next, as methods for preventing biased magnetization in high voltage generators, there are two methods: applying direct current magnetization in advance before imaging and then applying it in a direction that cancels out the magnetization. There is a method in which the magnet is introduced in a direction that cancels out the magnetization.
The former can almost completely prevent biased magnetization, but this requires a complicated mechanism and an increase in the number of adjustment points.
There is a problem that unnecessary X-rays are emitted. Further, although the latter can simplify the structure, it has the problem that polarized magnetization cannot be completely prevented at a certain imaging time.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、一次側制御方式の三相高電圧制御装置
において、過渡現象によるオーバーシュートを押さえて
高電圧波形リップルを改善し5、また、高電圧発生装置
の鉄心の偏磁化防止機構も安価で調整が容易にできる技
術を提供することにある。
The purpose of the present invention is to improve high voltage waveform ripple by suppressing overshoot caused by transient phenomena in a three-phase high voltage control device using a primary side control method. The objective is to provide technology that is inexpensive and easy to adjust.

本発明の前記ならびにその他の目的と新規な特徴は、本
明細書の記述及び添付図面によって明らかになるであろ
う。
The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

〔発明の概要〕 本願において開示される発明のうち、代表的なものの概
要を簡単に説明すれば、下記のとおりである。
[Summary of the Invention] Among the inventions disclosed in this application, a brief outline of typical inventions is as follows.

すなわち、一次側制御方式の三相電高圧制御装置におい
て、過渡現象によるオーバーシュート防止方法゛として
は、単相投入後三相へ移行する方式を採用して回路構成
を簡略化したものであり、毎回各線に流れる電流に制限
を加えながら線間電圧U−V、W−U、V−Wのそれぞ
れの零位相もしくは略零位相で順次投入し、過渡現象に
よるオーバーシュートを防止し、かつ、調整個所をなく
したものである。
In other words, in a three-phase electrical high-voltage control device using a primary side control system, the method for preventing overshoot due to transient phenomena is to simplify the circuit configuration by adopting a method of switching on a single phase and then switching to three phases. Each time, while limiting the current flowing through each line, the line voltages U-V, W-U, and V-W are sequentially turned on at zero phase or nearly zero phase to prevent overshoot due to transient phenomena and adjust. It's missing parts.

〔発明の構成〕[Structure of the invention]

以下、本発明の構成について、実施例とともに説明する
Hereinafter, the configuration of the present invention will be explained along with examples.

なお、実施例を説明するための全図において、同一機能
を有するものは同一符号を付け、その繰り返しの説明は
省略する。
In addition, in all the figures for explaining the embodiment, parts having the same functions are given the same reference numerals, and repeated explanations thereof will be omitted.

第1図乃至第3図は、本発明の一実施例の三相X線高電
圧制御装置を説明するための図であり。
1 to 3 are diagrams for explaining a three-phase X-ray high voltage control device according to an embodiment of the present invention.

第1図は、その三相X線高電圧制御装置の主回路の概略
構成を宗す回路図、第2図は、第1図に示す主回路の三
相高電圧投入制御装置の構成を示す回路図、第3図は、
第2図の三相高電圧投入制御装置の動作を説明するため
のタイムチャートである。
Fig. 1 is a circuit diagram showing the schematic configuration of the main circuit of the three-phase X-ray high voltage control device, and Fig. 2 shows the configuration of the three-phase high voltage turning-on control device of the main circuit shown in Fig. 1. The circuit diagram, Figure 3, is
3 is a time chart for explaining the operation of the three-phase high voltage closing control device of FIG. 2. FIG.

第1図乃至第3図において、U−V’、V−W。In FIGS. 1 to 3, U-V', V-W.

W−Uはそれぞれ線間電圧、lは三相電源、S+。W-U is the line voltage, l is the three-phase power supply, and S+.

S2.S3は電源スィッチ、5CR−U、5CR−V、
SC,R−W、5CR−X、5CR−Y及び5CR−Z
は主回路開閉用サイリスタであり、サイリスタ5CR−
Uとサイリスタ5CR−X、サイリスタ5CR−Vとサ
イリスタ5CR−Y、サイリスタ5CR−Wとサイリス
タ5CR−Zはそれぞれ逆並列に接続されている。2は
高電圧発生装置、IPC乃至9PCはフォトカプラ、3
は零位相検出記憶回路、INTは信号反転用インバータ
、3Aは微分回路、ICはコンデンサ、IRは抵抗、l
Dはダイオード、l5CR乃至SC,RL2はサイリス
タ、3Bは遅延回路、vCCは定電圧、A乃至Fは信号
入出力端子である。
S2. S3 is the power switch, 5CR-U, 5CR-V,
SC, R-W, 5CR-X, 5CR-Y and 5CR-Z
is a main circuit switching thyristor, and thyristor 5CR-
Thyristor U and thyristor 5CR-X, thyristor 5CR-V and thyristor 5CR-Y, and thyristor 5CR-W and thyristor 5CR-Z are each connected in antiparallel. 2 is a high voltage generator, IPC to 9PC are photocouplers, 3
is a zero phase detection storage circuit, INT is an inverter for signal inversion, 3A is a differential circuit, IC is a capacitor, IR is a resistor, l
D is a diode, l5CR to SC and RL2 are thyristors, 3B is a delay circuit, vCC is a constant voltage, and A to F are signal input/output terminals.

a乃至fは高電圧投入相の零位相タイミング信号、OR
は高電圧投入相の零位相タイミング信号a乃至fを入力
するオア(OR)ゲート回路、XSTは撮影開閉信号、
4はアンド(AND)ゲート回路、5は撮影タイマ回路
、6はSCRゲート制御回路である。
a to f are zero phase timing signals of high voltage application phase, OR
is an OR gate circuit that inputs the zero-phase timing signals a to f of the high voltage application phase, XST is the photographing opening/closing signal,
4 is an AND gate circuit, 5 is a photographing timer circuit, and 6 is an SCR gate control circuit.

次に1本実施例の動作を説明する。Next, the operation of this embodiment will be explained.

第1図乃至第3図におイテ、U−V、V−W。Ite, U-V, V-W in FIGS. 1 to 3.

W−Uの各線間電圧をフォトカプラIPC,2PC,3
PCで絶縁した信号として検出し、零位相検出記憶回路
3により零位相タイミングパルスが作られる。この時、
撮影開閉信号XSTがくるまでの間は、サイリスタl5
CR乃至6SCRのカソードはロー(L o w)電位
になっており、導通可能な状態になっている。いま、サ
イリスタl5CARのゲートに高電圧投入相の零位相タ
イミング信号aが送られたとすると、サイリスタI S
CRは導通状態となり、サイリスタl5CRのアノード
はロー(Low)電位となる。したがって、ダイオード
を通して接続されている信号入出力端子B、C,D、E
、、Fの各点も全てロー(L o w)電位となり、高
電圧投入相の零位相タイミング信号す乃至fの零位相タ
イミングパルスは発生せず、高電圧投入相の零位相タイ
ミング信号aのみが発生している。よって、高電圧投入
相の零位相タイミンク信号a乃至fの論理和(OR)を
オアゲート回路ORで取って、撮影タイマ回路5の入力
となっている高電圧投入相の零位相タイミング信号とし
て、この場合、高電圧投入相の零位相タイミング信号a
の零位相タイミングパルスのみが現われることになり、
撮影開閉信号XSTが実際に撮影タイマ回路5に伝えら
れるのは、この高電圧投入相の零位相タイミング信号a
のタイミングパルスに同期して行われる。そして、撮影
タイマ回路5が動作し、所定の撮影時間信号を発生する
と、サイリスタl5CR乃至6SCRのカソードがハイ
(Hi g h)電位となり、全てのサイリスタは非導
通となる。このサイリスタl5CR乃至6SC,Rが5
次に導通可能となるのは、撮影タイマ回路5の動作が終
了して一定の時間が経過(遅れ)した後であり、その後
、最初にくる高電圧投入相の零位相タイミング信号a乃
至fの零位相タイミングパルスにより、サイリスタl5
CR乃至6SCRのいづれか一つが魂通し、前述した例
と同様に他の5個のサイリスタは非導通の状態に保たれ
る。
Each line voltage of W-U is connected to photocouplers IPC, 2PC, 3
It is detected as an isolated signal by a PC, and a zero-phase timing pulse is generated by the zero-phase detection and storage circuit 3. At this time,
Until the shooting opening/closing signal XST comes, thyristor l5
The cathodes of CR to 6SCR are at low potential and are in a conductive state. Now, suppose that the zero-phase timing signal a of the high voltage application phase is sent to the gate of thyristor I5CAR.
CR becomes conductive, and the anode of thyristor l5CR becomes a low potential. Therefore, signal input/output terminals B, C, D, and E are connected through diodes.
, , F are all at low potential, and the zero-phase timing pulses of the high-voltage application phase zero-phase timing signals 0 to f are not generated, and only the high-voltage application phase zero-phase timing signal a is generated. is occurring. Therefore, the logical sum (OR) of the zero-phase timing signals a to f of the high-voltage application phase is taken by the OR gate circuit OR, and this is used as the zero-phase timing signal of the high-voltage application phase that is input to the imaging timer circuit 5. In this case, the zero phase timing signal a of the high voltage application phase
Only the zero-phase timing pulse of will appear,
The photographing opening/closing signal XST is actually transmitted to the photographing timer circuit 5 through this zero phase timing signal a of the high voltage application phase.
This is done in synchronization with the timing pulse of Then, when the photographing timer circuit 5 operates and generates a predetermined photographing time signal, the cathodes of the thyristors 15CR to 6SCR become high potential, and all the thyristors become non-conductive. This thyristor l5CR to 6SC,R is 5
Next, conduction becomes possible after a certain period of time has elapsed (delayed) after the operation of the imaging timer circuit 5 is completed, and then the zero-phase timing signals a to f of the first high voltage application phase are activated. The zero phase timing pulse causes thyristor l5
Any one of CR to 6SCR conducts, and the other five thyristors are kept in a non-conducting state as in the previous example.

次に、撮影タイマ回路5の他方の出力は、インバータI
NTで反転されてSCRゲート制御回路6に送られ、サ
イリスタ7SCR乃至1.2SCRが導通可能な状態と
なる。いま、前述した例と同様に初期にサイリスタl5
CRがオン(ON)L。
Next, the other output of the photographing timer circuit 5 is connected to the inverter I
The signal is inverted by NT and sent to the SCR gate control circuit 6, and the thyristors 7SCR to 1.2SCR become conductive. Now, as in the above example, thyristor l5 is initially
CR is on (ON) L.

ており、零位相タイミング信号aのみが発生している場
合を考える。サイリスタ7SCR乃至12SCRが導通
可能となった時、各サイリスタのゲートに高電圧投入相
の零位相タイミング信号がくれば、実際にサイリスタは
オンする。この時、最初にくるパルスは高電圧投入相の
零位相タイミング信号aであり、この高電圧投入相の零
位相タイミング信号aはサイリスタ7SCR及びtos
cRのゲートにのみ送られるため、フォトカプラ4PC
及び7PCのみがオンし、第1図に示す主回路開閉用サ
イリスタのうち、サイリスタ5CR−U及び5CR−Y
のみが導通する。また、引き続いてくる高電圧投入相の
零位相タイミング信号fのタイミングパルスでサイリス
タ5CR=Zが導通し、高電圧投入相の零位相タイミン
グ信号Cのタイミングでサイリスタ5CR−Vも導通し
て完全な三相運転になる。
Consider the case where only the zero-phase timing signal a is generated. When thyristors 7SCR to 12SCR become conductive, if a zero-phase timing signal of the high voltage application phase is applied to the gate of each thyristor, the thyristors are actually turned on. At this time, the first pulse that comes is the zero-phase timing signal a of the high-voltage application phase, and this zero-phase timing signal a of the high-voltage application phase is applied to the thyristor 7SCR and tos.
Since it is sent only to the gate of cR, photocoupler 4PC
and 7PC are turned on, and among the main circuit switching thyristors shown in Fig. 1, thyristors 5CR-U and 5CR-Y are turned on.
Only conducts. Further, the thyristor 5CR=Z is made conductive by the timing pulse of the zero-phase timing signal f of the subsequent high-voltage application phase, and the thyristor 5CR-V is also made conductive at the timing of the zero-phase timing signal C of the high-voltage application phase, making it complete. It becomes three-phase operation.

すなわち、U−V、V−W、W−U(7)各線間電圧を
フォトカプラーIPC,2PC,3PCで絶縁された信
号として検出し、零位相検出記憶回路3により零位相タ
イミングパルスが作られる。
That is, each line voltage between U-V, V-W, and W-U (7) is detected as a signal insulated by the photocouplers IPC, 2PC, and 3PC, and a zero-phase timing pulse is generated by the zero-phase detection memory circuit 3. .

そして、撮影用ハンドスイッチなどにより撮影開始信号
XSTが送られると、零位相検出記憶回路3により予め
記憶された投入すべき線間電圧の零位相タイミング信号
が撮影タイマ回路5に送られる。この信号が撮影タイマ
回路5により受は付けられたという信号と、零位相タイ
ミング信号とのA I’jDを取りSCRゲート制御回
路6へ送られる。SCRゲート制御回路6ではこの信号
をそれぞれに対応する主回路開閉用サイリスタにのみ送
る。したがって、三相の各線は完全な導通状態にはなら
ず、逆並列につながれた主回路開閉用サイリスタの内の
一方のみが導通状態となり、電流の向きに制限が加えら
れる。ただし、これはもちろん投入初期のみであって、
三相運転に移行した後は、三相の線間電圧図を見ても明
らかなように、逆並列の主回路開閉用サイリスタか同時
に導通する期間が存在し、各線は見かけ上完全な導通状
態になっている。
Then, when a photographing start signal XST is sent by a photographing hand switch or the like, a zero phase timing signal of the line voltage to be turned on, which is stored in advance by the zero phase detection storage circuit 3, is sent to the photographing timer circuit 5. A signal indicating that this signal has been accepted by the photographing timer circuit 5 and the zero-phase timing signal are combined and sent to the SCR gate control circuit 6. The SCR gate control circuit 6 sends this signal only to the corresponding main circuit switching thyristors. Therefore, each line of the three phases is not completely conductive, and only one of the main circuit switching thyristors connected in antiparallel is conductive, and the direction of the current is restricted. However, this is of course only at the initial stage of introduction,
After shifting to three-phase operation, as is clear from the three-phase line voltage diagram, there is a period in which the anti-parallel main circuit switching thyristors conduct simultaneously, and each line appears to be completely conductive. It has become.

また、撮影タイマ回路5からの終了信号により、零位相
検出記憶回路3により、次回の投入相を記憶し、逆位相
投入を行っている。
Furthermore, in response to the end signal from the photographing timer circuit 5, the zero phase detection and storage circuit 3 stores the next input phase and performs reverse phase input.

〔効果〕〔effect〕

以上説明したように、本願において開示された新規な技
術手段によれば、以下に述るような効果を得ることがで
きる。
As explained above, according to the novel technical means disclosed in this application, the following effects can be obtained.

(1)三相の各線間電圧の零位相を検出し、この検出信
号により三相の各線に流九る電圧の向きに制限を加えな
がら順次投入して、管電圧投入時の過渡現象によるオー
バーシュートを押さえるようにしたので、電源、高圧系
のインピーダンスの影響を受けにくくすることができる
(1) Detects the zero phase of each three-phase line voltage, and uses this detection signal to sequentially apply voltage while limiting the direction of the voltage flowing to each three-phase line. Since the chute is held down, it can be made less susceptible to the impedance of the power supply and high voltage system.

(2)前記(1)により、調整も不要にすることができ
る。
(2) According to (1) above, adjustment can also be made unnecessary.

(3)前記(1)により、回路構成が安価に組める逆位
相投入方式と組み合わせても、各線のインピーダンスの
影響を受けにくくすることができる。
(3) According to (1) above, the circuit structure can be made less susceptible to the influence of the impedance of each line even when combined with an anti-phase input method that can be assembled at low cost.

以上、本発明を実施例にもとすき具体的に説明したが、
本発明は、前記実施例に限定されるものでなく、その要
旨を逸脱しない範囲において種々変更可能であることは
言うまでもない。
The present invention has been specifically explained above using examples, but
It goes without saying that the present invention is not limited to the embodiments described above, and can be modified in various ways without departing from the spirit thereof.

例えば、前記実施例では、偏磁化の防出方法としては、
逆位相投入方式を採用したが、もちろん直流磁化方式と
組み合わせることもできる。ただし、逆位相投入のよう
に投入相が毎回異なる場合には、前記実施例の方式がそ
の効果を顕著に現わす。
For example, in the above embodiment, the method for preventing biased magnetization is as follows:
Although we adopted the reverse phase input method, it can of course be combined with the DC magnetization method. However, when the input phase is different each time, such as in reverse-phase input, the method of the above-described embodiment exhibits a remarkable effect.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図乃至第3図は、本発明の一実施例の三相X線高電
圧制御装置を説明するための図であり、第1図は、その
三相X線高電圧制御装置の主回路の概略構成を示す回路
図、第2図は、第1図に示す主回路の三相高電圧投入制
御装置の構成を示す回路図、第3図は、第図の三相高電
圧投入制御装置の動作を説明するためのタイムチャート
である。 図中、1−・・三相電源、5CR−U、SC:R−V。 5CR−W、5CR−X、5CR−Y、5CR−Z・・
・主回路開閉用サイリスタ、2・・・高電圧発生装置、
3・・・零位相検出記憶回路、4・アントゲ−1−回路
、5・・・撮影タイマ回路、6・・・SCRゲー1−制
御回路である。
1 to 3 are diagrams for explaining a three-phase X-ray high voltage control device according to an embodiment of the present invention, and FIG. 1 shows the main circuit of the three-phase X-ray high voltage control device. 2 is a circuit diagram showing the configuration of the three-phase high voltage power-on control device of the main circuit shown in FIG. 1, and FIG. 3 is a circuit diagram showing the configuration of the three-phase high voltage power-on control device of the main circuit shown in FIG. FIG. 2 is a time chart for explaining the operation of FIG. In the figure, 1-... three-phase power supply, 5CR-U, SC: R-V. 5CR-W, 5CR-X, 5CR-Y, 5CR-Z...
・Main circuit switching thyristor, 2...High voltage generator,
3... Zero phase detection storage circuit, 4. Ant game 1-circuit, 5... Shooting timer circuit, 6... SCR game 1-control circuit.

Claims (1)

【特許請求の範囲】[Claims] (1)一次側制御方式の三相高電圧制御装置において、
三相の各線間電圧の零位相を検出する線間電圧検出手段
と、該線間電圧検出手段の出力にもとずいて三相の各線
に流れる電圧の向きに制限を加えながら順次投入する高
電圧投入手段を具備したことを特徴とする三相高電圧制
御装置。
(1) In a three-phase high voltage control device using the primary side control method,
Line-to-line voltage detection means for detecting the zero phase of each line-to-line voltage of the three phases, and a high voltage detection means for sequentially applying voltage to each line of the three phases while limiting the direction of the voltage flowing to each line based on the output of the line-to-line voltage detection means. A three-phase high voltage control device characterized by being equipped with voltage input means.
JP59149863A 1984-07-18 1984-07-18 Three-phase high voltage controller Expired - Lifetime JPH0746290B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59149863A JPH0746290B2 (en) 1984-07-18 1984-07-18 Three-phase high voltage controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59149863A JPH0746290B2 (en) 1984-07-18 1984-07-18 Three-phase high voltage controller

Publications (2)

Publication Number Publication Date
JPS6128112A true JPS6128112A (en) 1986-02-07
JPH0746290B2 JPH0746290B2 (en) 1995-05-17

Family

ID=15484297

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59149863A Expired - Lifetime JPH0746290B2 (en) 1984-07-18 1984-07-18 Three-phase high voltage controller

Country Status (1)

Country Link
JP (1) JPH0746290B2 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS538753A (en) * 1976-07-13 1978-01-26 Chino Works Ltd Threeephase power regulator circuit
JPS5399445A (en) * 1977-02-14 1978-08-30 Toshiba Corp Three-phase ac power unit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS538753A (en) * 1976-07-13 1978-01-26 Chino Works Ltd Threeephase power regulator circuit
JPS5399445A (en) * 1977-02-14 1978-08-30 Toshiba Corp Three-phase ac power unit

Also Published As

Publication number Publication date
JPH0746290B2 (en) 1995-05-17

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