JPS6127897B2 - - Google Patents

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Publication number
JPS6127897B2
JPS6127897B2 JP50053682A JP5368275A JPS6127897B2 JP S6127897 B2 JPS6127897 B2 JP S6127897B2 JP 50053682 A JP50053682 A JP 50053682A JP 5368275 A JP5368275 A JP 5368275A JP S6127897 B2 JPS6127897 B2 JP S6127897B2
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JP
Japan
Prior art keywords
atoms
temperature
boron
region
resistance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP50053682A
Other languages
Japanese (ja)
Other versions
JPS51129191A (en
Inventor
Nobuo Sasaki
Takashi Iwai
Yoshiiku Togei
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP50053682A priority Critical patent/JPS51129191A/en
Publication of JPS51129191A publication Critical patent/JPS51129191A/en
Publication of JPS6127897B2 publication Critical patent/JPS6127897B2/ja
Granted legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/167Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table further characterised by the doping material

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Thermistors And Varistors (AREA)
  • Semiconductor Integrated Circuits (AREA)

Description

【発明の詳細な説明】[Detailed description of the invention]

本発明は、低温に於ける物質の温度或いは比熱
を正確に測定したい場合に使用して好適な半導体
装置の製造方法に関する。 従来、低温に於ける物質の温度或いは比熱を測
定することは甚だ困難であつた。例えば、熱電対
を使用して測定することが考えられるが、低温で
は熱電対の温度変化に対する起電力変化が微小な
ものとなるので、その測定は容易ではない。 近年、半導体に不純物を所定濃度で導入する
と、低温に於ける良い温度計となることが判つ
た。 例えば、シリコン(Si)に対して、燐(P)を
2.6×1018〔原子個/cm3〕程度の濃度で添加する
と、4.2〔゜K〕近傍では、通常の測定器で抵抗
の絶対値を測定できる程度の抵抗としても、温度
に対して抵抗値が大きく変化するので、非常に敏
感な温度計を構成することができる。 第1図は、斯かる温度計を構成する従来の半導
体装置の要部断面図である。 第1図において、1はシリコン基板、2及び2
Aは二酸化シリコン(SiO2)膜、3はn+型不純物
濃度を拡散した電極コンタクト領域、4は燐を
2.6×1018〔原子個/cm3〕の濃度で拡散した温度
或いは比熱測定用抵抗変化領域、5はアルミニウ
ム(A)電極をそれぞれ示す。尚、シリコン基
板1は不純物として燐を5×1015〔原子個/cm3
程度添加したものを使用することができ、また、
電極コンタクト領域3は燐を5×1020〔原子個/
cm3〕程度の濃度で拡散したものであつて良い。 更にまた、抵抗変化領域4の形成にはイオン注
入法を適用し、適当なドーズ量の燐を注入するこ
とに依り容易に実現できる。 第1図に見られる半導体装置を1チツプ上に2
個形成することは容易であるから、そのうちの1
個をヒータ、他の1個を温度計として使用するこ
とに依り、微量の物質の低温における比熱の温度
変化を精密に測定することができる。実際には、
比熱を測定すべき物質を半導体装置に例えばグリ
スを介して貼付して測定を行なう。この場合、半
導体装置自体の比熱も測定することになるが、そ
の補正は容易に行なうことができる。 ところで、本発明者等は、斯かる半導体装置に
於ける抵抗変化領域4を形成するのに導入される
不純物濃度としては燐が最良のものではない事を
多くの実験から見出した。 本発明は、低温に於ける温度或いは微量の物質
の比熱を測定し得る半導体装置の特性を安定に、
また素子間の特性不同を解消し、更にまた製造が
容易であるようにすることを目的とし、低濃度の
n型不純物を含有した半導体基板、該半導体基板
にp型不純物濃度を導入して形成された電極コン
タクト領域、一対の該電極コンタクト領域間に硼
素をイオン注入して形成した低温度側定用抵抗変
化領域を備える半導体装置の製造方法を提供しよ
うとするもので、以下これを詳細に説明する。 なお、本発明方法を適用して得られる半導体装
置の構造は第1図の従来例として示した半導体装
置の要部断面構造と同様であるので、以下の説明
では第1図の符号を引用して説明する。 本発明では、先に第1図において説明した素子
の抵抗変化領域4を形成するために導入される不
純物として硼素(B)を使用することが絶対条件
となつている。その抵抗変化領域4を形成するに
は、硼素をイオン注入し、そのアニール温度を
300℃以上800℃以下の温度とし、該イオン注入工
程による硼素の不純物濃度の範囲をピーク濃度で
3×1018〔原子個/cm3〕以上1.7×1019〔原子個/
cm3〕以下とするものである。 ここで3×1018〔原子個/cm3〕以上のイオン注
入を行なう場合、イオン注入工程のスループツト
を上げるため4mA程度以上の注入電流で注入が
行なわれる。通常、ウエーハ基板温度は300℃近
くまで上昇している。従つて、イオン注入後にお
ける300℃以下のアニールは、注入層の特性を何
ら変化させず、300℃以上においてアニールの効
果が得られる。そのことからアニール温度の下限
は300℃である。液体ヘリウム温度付近に於い
て、3×1017〔原子個/cm3〕以下の不純物濃度の
半導体は実質的に絶縁体と看做し得る程の高い比
抵抗を持つようになるが、不純物濃度が3×1018
〔原子個/cm3〕以上であれば極低温下でも充分低
い低抗を持つ。また、硼素の不純物濃度が高過ぎ
ると抵抗値が温度に対して一定となつてしまい、
温度計として使用できなくなり、温度計として使
用するための上限は1.7×1013〔原子個/cm3〕で
ある。尚、電極コンタクト領域3もp型にする。 第2図は、硼素を3×1018〔原子個/cm3〕以上
の濃度にイオン注入して抵抗変化領域4を形成し
た場合に於ける表面抵抗ρsのアニール温度依存
性を表す線図である。但し、この場合のシリコン
基板1の面指数は(111)であり、不純物濃度は
5×1015〔原子個/cm3〕でn型である。また硼素
イオンは厚さ1500〔A゜〕の二酸化シリコン膜2
Aを介して70〔KeV〕で注入され、ドーズ量は5
×1014〔イオン/cm3〕であり、深さ方向の不純物
濃度は、二酸化シリコン膜2Aとシリコン基板1
との界面から730〔A゜〕の部分がピーク、即
ち、3.9×1019〔原子個/cm3〕となる、標準偏差
510〔A゜〕のガウス型分布を示す。そして、ア
ニールは窒素(N2)中で20〔分〕間行なつたもの
である。 第3図は、第2図のデータを得た試料のうち、
750〔℃〕の温度でアニールしたものの表面抵抗
ρsの低温に於ける温度依存性を表した線図であ
る。 さて、前記の如く、抵抗変化領域4をイオン注
入法に依り形成する場合、比抵抗が104〔Ωcm〕
以上になる場合があるので、抵抗変化領域4が薄
いと抵抗の絶対値が大きくなつて測定が困難とな
る。従つて、抵抗変化領域4を厚く、即ち深さ方
向に広く分布するように形成すると良いが、それ
には、イオン注入の注入エネルギを何段階かに亘
つて変化させ、イオンの飛程を変えて注入を実施
することに依り、抵抗変化領域4の厚さを増し、
低抵抗化することができる。 次に、前記本発明の一実施例、即ち、硼素を使
用したものと、前記従来例、即ち燐を使用したも
のとを比較して検討する。 従来例では、シリコン基板1、電極コンタクト
領域3、抵抗変化領域4が全て同導電型であるた
め、電流が、常温ではシリコン基板1と抵抗変化
領域4の両方に流れ、低温では抵抗変化領域4の
みに流れるので、常温に近い温度範囲では、素子
の安定性に問題があり、素子間の特性に不同が生
じ易く、完成された素子の特性チエツクは低温に
冷却した状態で行なう必要がある。 本発明実施例では、シリコン基板1がn型、電
極コンタクト領域3及び抵抗変化領域4がp型で
あるから、全ての温度範囲に亘つて抵抗変化領域
4のみに電流が流れる。従つて、常温に近い温度
範囲での素子の安定性は良好になり、素子間の特
性不同は少なく、また完成された素子の特性チエ
ツクは、そのための冷却を行なうことはなく、常
温で実施することが可能である。 本発明の製造方法の実施の結果得られる素子で
あると従来例とであると問わず、不純物濃度が所
定濃度を越えると、抵抗値が温度に対して一定と
なつてしまうので、温度計として使用するには、
不純物濃度を所定値以下に維持する必要がある。 そして、その境界は、 燐 6.6×1018〔原子個/cm3〕 硼素 1.7×1019〔原子個/cm3〕 であり、硼素の方が大である。ところで、斯かる
半導体装置に於ける抵抗変化領域4の抵抗値の温
度依存性は、不純物濃度に対して極めて敏感であ
る。従つて、不純物濃度の制御は厳密を要する
が、一般に、この制御を行なう場合、目標とする
不純物濃度が高いと制御し易い。その点、硼素を
使用する本発明の方が有利である。 この種装置では、低温の温度の微少変化に対
し、出来る限り、抵抗値変化の大きいものが望ま
しいことは当然である。そのためには、不純物濃
度を低くすると良いが、その結果、比抵抗の絶縁
値はかなり大となる。尚、一般に1〔MΩ〕以上
の高抵抗を精密に測定することは困難である。
今、抵抗変化領域4が、長さL、幅W、厚さ(深
さ)tなる直方体であつて、電流がその長手方向
に流れるものと仮定すると、抵抗Rは比抵抗ρに
対し、 R=L/Wtρ の関係にある。従つて、比抵抗ρが高くても、
L/Wtを小さくすれば、抵抗Rの値は小さくするこ とができる。しかしながら、Lは現今のフオト・
エツチング技術に依り、2〔μ―m〕が限界であ
る。また、Wを大にすると、チツプ内に於ける素
子占有面積増加し、集積度が低下する。そこで、
残された手段は、tを大にすることである。この
tは、イオン注入する場合に於けるイオンの飛程
Rp、標準偏差ΔRpに関係する。即ち、注入エネ
ルギー定の場合、ΔRpが大であればtは大とな
り、注入エネルギを何段かに変化させてtを大に
する場合にはRpが大である程、tは大になる。
ここで、飛程Rp及び標準偏差ΔRpを硼素と燐と
に関して比較すると、
The present invention relates to a method of manufacturing a semiconductor device suitable for use when it is desired to accurately measure the temperature or specific heat of a substance at low temperatures. Conventionally, it has been extremely difficult to measure the temperature or specific heat of a substance at low temperatures. For example, it is conceivable to measure using a thermocouple, but at low temperatures, the change in electromotive force of the thermocouple with respect to temperature changes is minute, so this measurement is not easy. In recent years, it has been found that introducing impurities into a semiconductor at a predetermined concentration makes it a good thermometer at low temperatures. For example, phosphorus (P) is used for silicon (Si).
When added at a concentration of about 2.6×10 18 [atoms/cm 3 ], at around 4.2 [°K], the resistance value changes with respect to temperature, even though the absolute value of the resistance can be measured with a normal measuring instrument. can vary greatly, making it possible to construct a very sensitive thermometer. FIG. 1 is a sectional view of a main part of a conventional semiconductor device constituting such a thermometer. In FIG. 1, 1 is a silicon substrate, 2 and 2
A is a silicon dioxide (SiO 2 ) film, 3 is an electrode contact region with diffused n + type impurity concentration, and 4 is a phosphorus film.
A resistance change region for temperature or specific heat measurement diffused at a concentration of 2.6×10 18 [atoms/cm 3 ], and 5 indicate an aluminum (A) electrode. The silicon substrate 1 contains 5×10 15 [atoms/cm 3 ] of phosphorus as an impurity.
It is possible to use a substance with a certain degree of addition, and
The electrode contact area 3 contains 5×10 20 [atoms/
It may be diffused at a concentration of about 1 cm 3 ]. Furthermore, the variable resistance region 4 can be easily formed by applying an ion implantation method and implanting an appropriate dose of phosphorus. The semiconductor device shown in Figure 1 is placed two times on one chip.
It is easy to form individuals, so one of them is
By using one as a heater and the other as a thermometer, it is possible to accurately measure temperature changes in the specific heat of a trace amount of a substance at low temperatures. in fact,
The measurement is performed by attaching a substance whose specific heat is to be measured to a semiconductor device via, for example, grease. In this case, the specific heat of the semiconductor device itself is also measured, but this can be easily corrected. By the way, the present inventors have found through many experiments that phosphorus is not the best concentration of impurities to be introduced to form the variable resistance region 4 in such a semiconductor device. The present invention stably stabilizes the characteristics of a semiconductor device that can measure the temperature at low temperatures or the specific heat of a minute amount of material.
In addition, with the aim of eliminating disparities in characteristics between devices and further facilitating manufacturing, semiconductor substrates containing a low concentration of n-type impurities and p-type impurity concentrations introduced into the semiconductor substrates are formed. The present invention aims to provide a method for manufacturing a semiconductor device including a low temperature side constant resistance change region formed by implanting boron ions between a pair of electrode contact regions, and this will be described in detail below. explain. The structure of the semiconductor device obtained by applying the method of the present invention is similar to the cross-sectional structure of the main part of the semiconductor device shown as the conventional example in FIG. 1, so the reference numerals in FIG. I will explain. In the present invention, it is an absolute condition that boron (B) be used as the impurity introduced to form the variable resistance region 4 of the element described above with reference to FIG. To form the variable resistance region 4, boron ions are implanted and the annealing temperature is adjusted to
The temperature is 300°C or higher and 800°C or lower, and the range of boron impurity concentration due to the ion implantation process is 3×10 18 [atoms/cm 3 ] or higher and 1.7×10 19 [atoms/cm 3 ] at the peak concentration.
cm 3 ] or less. When performing ion implantation of 3×10 18 [atoms/cm 3 ] or more, the implantation is performed with an injection current of about 4 mA or more in order to increase the throughput of the ion implantation process. Typically, wafer substrate temperatures rise to nearly 300°C. Therefore, annealing at 300° C. or lower after ion implantation does not change the characteristics of the implanted layer, and the effect of annealing at 300° C. or higher is obtained. Therefore, the lower limit of the annealing temperature is 300°C. At around the temperature of liquid helium, a semiconductor with an impurity concentration of 3×10 17 [atoms/cm 3 ] or less has a resistivity so high that it can essentially be considered an insulator, but the impurity concentration is 3×10 18
If it is [atoms/cm 3 ] or more, it has a sufficiently low resistance even at extremely low temperatures. Additionally, if the impurity concentration of boron is too high, the resistance value will remain constant with respect to temperature.
It can no longer be used as a thermometer, and the upper limit for use as a thermometer is 1.7×10 13 [atoms/cm 3 ]. Note that the electrode contact region 3 is also made p-type. Figure 2 is a diagram showing the annealing temperature dependence of the surface resistance ρs when the variable resistance region 4 is formed by implanting boron at a concentration of 3×10 18 [atoms/cm 3 ] or more. be. However, the plane index of the silicon substrate 1 in this case is (111), the impurity concentration is 5×10 15 [atoms/cm 3 ], and it is n-type. In addition, boron ions are contained in a silicon dioxide film 2 with a thickness of 1500 [A°].
A is injected at 70 [KeV], and the dose is 5
×10 14 [ions/cm 3 ], and the impurity concentration in the depth direction is between the silicon dioxide film 2A and the silicon substrate 1.
The standard deviation is 730 [A°] from the interface, that is, 3.9×10 19 [atoms/cm 3 ].
It shows a Gaussian distribution of 510 [A°]. The annealing was performed in nitrogen (N 2 ) for 20 minutes. Figure 3 shows the samples from which the data in Figure 2 was obtained.
FIG. 2 is a diagram showing the temperature dependence of the surface resistance ρs at low temperatures when annealed at a temperature of 750 [° C.]. Now, as mentioned above, when the variable resistance region 4 is formed by ion implantation, the specific resistance is 10 4 [Ωcm]
Therefore, if the variable resistance region 4 is thin, the absolute value of resistance becomes large and measurement becomes difficult. Therefore, it is preferable to form the variable resistance region 4 to be thick, that is, to be widely distributed in the depth direction, but this can be done by changing the implantation energy of the ion implantation in several steps to change the range of the ions. By performing the implantation, the thickness of the variable resistance region 4 is increased,
The resistance can be lowered. Next, one embodiment of the present invention, ie, one using boron, and the conventional example, ie, one using phosphorus, will be compared and discussed. In the conventional example, since the silicon substrate 1, the electrode contact region 3, and the variable resistance region 4 are all of the same conductivity type, current flows in both the silicon substrate 1 and the variable resistance region 4 at room temperature, and in the variable resistance region 4 at low temperatures. Therefore, in a temperature range close to room temperature, there is a problem with the stability of the device, and variations in characteristics between devices tend to occur, so characteristics checks of completed devices must be performed in a state where they are cooled to a low temperature. In the embodiment of the present invention, the silicon substrate 1 is of the n-type, and the electrode contact region 3 and the variable resistance region 4 are of the p-type, so that current flows only in the variable resistance region 4 over the entire temperature range. Therefore, the stability of the device is good in a temperature range close to room temperature, there is little variation in characteristics between devices, and the characteristics of the completed device are checked at room temperature without cooling. Is possible. Regardless of whether the device is a device obtained as a result of implementing the manufacturing method of the present invention or a conventional device, when the impurity concentration exceeds a predetermined concentration, the resistance value becomes constant with respect to temperature, so it can be used as a thermometer. To use,
It is necessary to maintain the impurity concentration below a predetermined value. The boundaries are 6.6×10 18 [atoms/cm 3 ] for phosphorus and 1.7×10 19 [atoms/cm 3 ] for boron, and boron is larger. Incidentally, the temperature dependence of the resistance value of the variable resistance region 4 in such a semiconductor device is extremely sensitive to the impurity concentration. Therefore, strict control of impurity concentration is required, but in general, when performing this control, it is easier to control when the target impurity concentration is high. In this respect, the present invention using boron is more advantageous. It goes without saying that in this type of device, it is desirable to have as large a change in resistance value as possible in response to minute changes in low-temperature temperature. For this purpose, it is better to lower the impurity concentration, but as a result, the insulation value of specific resistance becomes considerably large. Incidentally, it is generally difficult to accurately measure a high resistance of 1 [MΩ] or more.
Now, assuming that the resistance change region 4 is a rectangular parallelepiped with length L, width W, and thickness (depth) t, and that the current flows in the longitudinal direction, the resistance R is relative to the specific resistance ρ, and R is =L/Wtρ. Therefore, even if the specific resistance ρ is high,
By reducing L/Wt, the value of the resistance R can be reduced. However, L is the current photo
Depending on the etching technology, the limit is 2 [μ-m]. Furthermore, when W is increased, the area occupied by the elements within the chip increases and the degree of integration decreases. Therefore,
The only remaining option is to increase t. This t is the range of ions during ion implantation.
Rp, related to standard deviation ΔRp. That is, in the case of constant implantation energy, if ΔRp is large, t will be large, and if t is increased by changing the implantation energy in several steps, the larger Rp is, the larger t will be.
Here, when comparing the range Rp and standard deviation ΔRp for boron and phosphorus,

【表】 であつて、これからすると、tを大にする場合、
硼素の方が燐よりも遥かに有利であることが理解
できよう。 例えば、0〜200〔KeV〕まで注入エネルギが
可変であるイオン注入装置では、注入エネルギを
変えることに依り、t〓Rp+ΔRpとして、燐で
はt=3100〔A〕、硼素ではt=6600〔A゜〕と
なり、硼素は燐の2倍のtが得られる。そして、
tを大に成し得ることは、抵抗値を低減できるこ
との外に、素子の大きさ(面積を除く)を大にす
ることができることであり、素子間の抵抗値の不
同を小さく抑えることが可能となり、しかも、集
積度も低下しない。 以上の説明で判るように、本発明方法に依れ
ば、温度計として使用する半導体装置に於ける抵
抗変化領域の形成に硼素を使用することに依り、
燐を使用したのと比較すると、特性の向上、特性
不同の解消、製造の容易性等の諸点で著しい効果
が得られる。
[Table] From now on, when t is made large,
It can be seen that boron is far more advantageous than phosphorus. For example, in an ion implanter whose implantation energy is variable from 0 to 200 [KeV], by changing the implantation energy, t = Rp + ΔRp, t = 3100 [A] for phosphorus, t = 6600 [A゜] for boron. ], boron has twice as much t as phosphorus. and,
Being able to increase t means that in addition to being able to reduce the resistance value, it is also possible to increase the size of the element (excluding area), and it is possible to keep the disparity in resistance value between elements small. It is now possible to do so without reducing the degree of integration. As can be seen from the above explanation, according to the method of the present invention, boron is used to form a variable resistance region in a semiconductor device used as a thermometer.
Compared to the use of phosphorus, remarkable effects can be obtained in various aspects such as improved properties, elimination of disparities in properties, and ease of production.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来例の半導体装置の要部側断面図、
第2図及び第3図は本発明実施例に於ける表面抵
抗の温度依存性を説明する線図をそれぞれ表す。 図に於いて、1は基板、2.2Aは二酸化シリ
コン、3は電極コンタクト領域、4は抵抗変化領
域、5は電極をそれぞれ示す。
FIG. 1 is a side sectional view of the main part of a conventional semiconductor device.
FIGS. 2 and 3 each represent a diagram illustrating the temperature dependence of the surface resistance in the embodiment of the present invention. In the figure, 1 is a substrate, 2.2A is silicon dioxide, 3 is an electrode contact region, 4 is a variable resistance region, and 5 is an electrode.

Claims (1)

【特許請求の範囲】 1 3×1017〔原子個/cm3〕以下のn型不純物を
含有した半導体基板にp型不純物を導入して電極
コンタクト領域を形成する工程と、該半導体基板
にイオン注入層を形成し、該電極コンタクト領域
と接続された、液体ヘリウム温度付近の低温度側
定用抵抗変化領域を形成する工程とを含む半導体
装置の製造方法において、 該イオン注入層の形成は、硼素をイオン注入
し、そのアニール温度を300℃以下となし、該イ
オン注入層の硼素の不純物濃度の範囲をピーク濃
度で3×1013〔原子個/cm3〕以上1.7×1019〔原子
個/cm3〕以下とすることを特徴とする半導体装置
の製造方法。
[Claims] A step of forming an electrode contact region by introducing a p-type impurity into a semiconductor substrate containing an n-type impurity of 1 3×10 17 [atoms/cm 3 ] or less; A method for manufacturing a semiconductor device comprising the steps of: forming an implantation layer; and forming a constant resistance change region on a low temperature side near a liquid helium temperature connected to the electrode contact region, the formation of the ion implantation layer comprising: Boron ions are implanted, and the annealing temperature is set to 300°C or less, and the boron impurity concentration range of the ion-implanted layer is set to a peak concentration of 3×10 13 [atoms/cm 3 ] or more to 1.7×10 19 [atoms]. /cm 3 ] or less.
JP50053682A 1975-05-02 1975-05-02 Semiconductor device Granted JPS51129191A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50053682A JPS51129191A (en) 1975-05-02 1975-05-02 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50053682A JPS51129191A (en) 1975-05-02 1975-05-02 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS51129191A JPS51129191A (en) 1976-11-10
JPS6127897B2 true JPS6127897B2 (en) 1986-06-27

Family

ID=12949577

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50053682A Granted JPS51129191A (en) 1975-05-02 1975-05-02 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS51129191A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS616881A (en) * 1984-06-21 1986-01-13 Tohoku Metal Ind Ltd Semiconductor temperature sensor element

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49114382A (en) * 1973-02-28 1974-10-31

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49114382A (en) * 1973-02-28 1974-10-31

Also Published As

Publication number Publication date
JPS51129191A (en) 1976-11-10

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