JPS6126704B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention is provided between a higher-level general-purpose device and a lower-level device. This invention relates to an interface conversion device that does not require immediate abandonment.

Conventional information processing systems use V.24, V.28, and V.35 between upper general-purpose devices and lower-level terminal devices.
Although connections are made in accordance with the recommendations given in
If you want to connect using an interface that operates at higher speeds, an interface conversion device may be inserted. As shown in Figure 1, the interface clock signal CLK from a lower-level terminal device, such as a graphic display DSP, is converted into a transmission/reception timing signal by the interface converter ITF.
ST and RT are input to a higher-level general-purpose device, such as a communication control processing device CCP. In synchronization with the interface clock CLK, that is, the transmission/reception timing signals ST and RT, transmission data SD from the communication control processing unit CCP is transmitted to the display DSP, and reception data RD from the display side is transmitted to the communication control processing unit CCP. In some types of display DSPs, when processing operations for various data such as transmission data SD cannot proceed at the specified timing, an interface conversion device for the interface clock CLK is used.
The configuration is such that sending to the ITF is stopped, and this operation is called interface freeze IRF in the operation time chart shown in FIG. In this interface frozen IRF state, the interface clock CLK does not arrive, so the transmission and reception timing signals ST and RT are not transmitted, and the transmission and reception data
There was no change in SD and RD. Transmission/reception timing signal
When ST and RT are no longer being transmitted, the communication control processing unit CCP of the host device detects that the connection with the terminal device has become abnormal, and monitors it for a certain period of time, for example, 1 second. When the transmission/reception timing signals ST and RT are obtained again, the operation continues. If the transmission/reception timing signal is still not obtained even after the predetermined period of time has elapsed, the communication control processing device CCP abandons the connection with the interface conversion device ITF. In this case, it is extremely difficult to set the monitoring time, and if it is for a short period of time, it is necessary to activate the line frequently, but if it is for a long period of time, it is not possible to distinguish it from a failure that is not a frozen interface.
In either case, there was a drawback that the operating efficiency of the system was extremely reduced.

SUMMARY OF THE INVENTION An object of the present invention is to provide an interface conversion device that improves the above-mentioned drawbacks and does not cause a higher-level device to immediately abandon a connection when the interface freezes due to the processing status of a lower-level device.

Embodiments of the present invention shown in the drawings will be described below. FIG. 3 is a configuration diagram showing interface freeze detection means and pseudo information generation means provided in an interface conversion device as an embodiment of the present invention.
CLKT indicates an interface clock input terminal and applies the clock CLK from the terminal device. T is an output application terminal of a pulse oscillator (not shown) provided in the interface converter, CNT1,
CNT2,...CNTn indicate counters. Terminal T
Pulse period to <interface clock CLK
, and each counter is connected so as to be set by an interface clock. When the terminal device is operating normally, a clock pulse with a period of, for example, 13 microseconds is input to the interface converter. The output of the pulse oscillator is at terminal T.
cascaded counters CNT1,
…CNTn counts, but terminal BKC at CNTn
(Backup clock BKCL output from this pin.
The number of counter stages is selected so that all counters are reset simultaneously by the clock CLK from the terminal device before an output is generated at the terminal. Therefore, since the clock CLK applied to the interface clock terminal CLKT is taken out via the AND circuit AND, the signals at the terminals that obtain the transmission/reception timing signals ST and RT are the interface clock signals.
It has become CLK itself. (See CLK, ST, and RT in the time chart in Figure 4.) If the terminal device becomes in an interface frozen state, the clock CLK from the terminal device is no longer applied, the counter is not reset, and the terminal Counting of pulses to T continues. i.e. interface clock
The fact that CLK is not applied to the reset terminal of the counter and the counter continues counting indicates that the terminal device interface has been frozen. Backup clock BKCLK can be obtained when the counter has counted a predetermined number of pulses applied to the terminal. Since this signal is pseudo information for the conventional interface clock CLK, this signal is used as the transmission/reception timing signals ST and RT for the communication control processing unit CCP. Therefore, as shown in Fig. 4, the transmission/reception timing signals ST and RT have waveforms that are slightly different from the signals when the terminal equipment is operating normally, but since they are transmitted to the communication control processing unit CCP, the waveform switching time is If t ₁ →t ₂ does not reach the predetermined time, for example, 1 second, no action is taken to abandon the connection. Since the pseudo information is generated here, the communication control processing device enters a state of waiting for operation recovery, and the display DSP freezes the interface, so there is no change in the received data RD. When the interface clock CLK is input again, normal transmission and reception timings ST and RT can be obtained.

It should be noted that a device for detecting failures other than the interface frozen state is provided in the communication control processing device as in the prior art.

In this way, according to the present invention, when a lower-level device causes a malfunction such as a delay in information processing and the interface freezes, the interface conversion device detects the occurrence of the interface freeze and generates pseudo information. , the host device cannot determine that the interface is frozen, so it does not abandon the connection.
This eliminates the need for frequent line activation operations by the operator. Moreover, even when the interface becomes frozen, it is sufficient to wait under the same interface conditions as before without changing the physical interface conditions. Therefore, the operating efficiency of the system is less likely to deteriorate.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the configuration of an information processing system having an interface conversion device, FIG. 2 is an operation time chart of FIG. 1, and FIG. 3 is a diagram showing the configuration of an embodiment of the present invention provided in the interface conversion device. The figure shown in FIG. 4 is an operation time chart of FIG. 3. CCP...communication control processing device, ITF...interface conversion device, DSP...display, CLK...interface clock, ST, RT...transmission/reception timing signal, SD...transmission data, RD...reception data,
CNT1, CNTn...Counter, CLKT...Interface clock input terminal, T...Pulse oscillator output application terminal, BKCLK...Backup clock.

Claims (1)

[Claims] 1. In an information processing system in which an interface conversion device is inserted between a communication control device and a terminal device with which the interface conditions do not match, the interface conversion device has an error when the processing operation of the terminal device becomes malfunctioning. 1. An interface conversion device for an information device system, comprising means for detecting freezing of an interface with a communication control device, and pseudo information generating means that operates when the detecting means detects freezing.