JPS61263124A - 半導体装置製造用のマスク板 - Google Patents

半導体装置製造用のマスク板

Info

Publication number
JPS61263124A
JPS61263124A JP60105310A JP10531085A JPS61263124A JP S61263124 A JPS61263124 A JP S61263124A JP 60105310 A JP60105310 A JP 60105310A JP 10531085 A JP10531085 A JP 10531085A JP S61263124 A JPS61263124 A JP S61263124A
Authority
JP
Japan
Prior art keywords
wafer
mask
pattern
mask plate
plate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60105310A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0466094B2 (enrdf_load_stackoverflow
Inventor
Yutaka Kadonishi
門西　裕
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP60105310A priority Critical patent/JPS61263124A/ja
Publication of JPS61263124A publication Critical patent/JPS61263124A/ja
Publication of JPH0466094B2 publication Critical patent/JPH0466094B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)
JP60105310A 1985-05-16 1985-05-16 半導体装置製造用のマスク板 Granted JPS61263124A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60105310A JPS61263124A (ja) 1985-05-16 1985-05-16 半導体装置製造用のマスク板

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60105310A JPS61263124A (ja) 1985-05-16 1985-05-16 半導体装置製造用のマスク板

Publications (2)

Publication Number Publication Date
JPS61263124A true JPS61263124A (ja) 1986-11-21
JPH0466094B2 JPH0466094B2 (enrdf_load_stackoverflow) 1992-10-22

Family

ID=14404129

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60105310A Granted JPS61263124A (ja) 1985-05-16 1985-05-16 半導体装置製造用のマスク板

Country Status (1)

Country Link
JP (1) JPS61263124A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1278236A1 (en) * 2001-07-09 2003-01-22 Sanyo Electric Co., Ltd. Method of dicing a compound semiconductor wafer and compound semiconductor substrate thereby formed

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1278236A1 (en) * 2001-07-09 2003-01-22 Sanyo Electric Co., Ltd. Method of dicing a compound semiconductor wafer and compound semiconductor substrate thereby formed
US6897126B2 (en) 2001-07-09 2005-05-24 Sanyo Electric, Co., Ltd. Semiconductor device manufacturing method using mask slanting from orientation flat
CN100466170C (zh) * 2001-07-09 2009-03-04 三洋电机株式会社 掩模以及使用该掩模的化合物半导体装置的制造方法

Also Published As

Publication number Publication date
JPH0466094B2 (enrdf_load_stackoverflow) 1992-10-22

Similar Documents

Publication Publication Date Title
US5904548A (en) Trench scribe line for decreased chip spacing
US5827394A (en) Step and repeat exposure method for loosening integrated circuit dice from a radiation sensitive adhesive tape backing
US5684333A (en) Wafer structure in a semiconductor device manufacturing process
US5136354A (en) Semiconductor device wafer with interlayer insulating film covering the scribe lines
ATE512490T1 (de) Verfahren zur herstellung von halbleitervorrichtungen mit mesastruktur und mehreren passivierungsschichten
JP2003133708A (ja) 電子部品及びその転写方法、回路基板及びその製造方法、並びに表示装置及びその製造方法
US4967229A (en) Process for forming dicing lines on wafer
JPS61263124A (ja) 半導体装置製造用のマスク板
DE102019204457B4 (de) Substratbearbeitungsverfahren
US6043134A (en) Semiconductor wafer alignment processes
US4102732A (en) Method for manufacturing a semiconductor device
JPH02278781A (ja) 半導体レーザダイオード
JPH0444285A (ja) 半導体発光素子
JPS61263117A (ja) 半導体装置製造用のマスク板
JP2663945B2 (ja) レジストパターン形成方法
JPH0645690A (ja) 半導体レーザの製造方法
KR0186077B1 (ko) 반도체 웨이퍼의 주변노광용 마스크 및 이를 이용한 주변노광방법
JPS6118955A (ja) レテイクルマスク
JPS58207621A (ja) 半導体ウエ−ハ
JPS62149149A (ja) 半導体装置
JP2737141B2 (ja) 半導体装置およびその製造方法
KR20000027045A (ko) 반도체 웨이퍼 검사용 키
JPH0282679A (ja) 半導体発光装置の製造方法
JPS6161436A (ja) 半導体基板分割方法
JP2003197610A (ja) マスク体