JPS61230316A - Manufacture of semiconductor substrate - Google Patents
Manufacture of semiconductor substrateInfo
- Publication number
- JPS61230316A JPS61230316A JP60070991A JP7099185A JPS61230316A JP S61230316 A JPS61230316 A JP S61230316A JP 60070991 A JP60070991 A JP 60070991A JP 7099185 A JP7099185 A JP 7099185A JP S61230316 A JPS61230316 A JP S61230316A
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- Prior art keywords
- crystal
- seed crystal
- substrate
- crystal orientation
- orientation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/02433—Crystal orientation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02488—Insulating materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02587—Structure
- H01L21/0259—Microstructure
- H01L21/02598—Microstructure monocrystalline
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02609—Crystal orientation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02689—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using particle beams
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02691—Scanning of a beam
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Materials Engineering (AREA)
- Recrystallisation Techniques (AREA)
Abstract
Description
【発明の詳細な説明】 〔発明の利用分野〕 本発明は半導体基板の製造方法に係り、特に。[Detailed description of the invention] [Field of application of the invention] The present invention relates to a method for manufacturing a semiconductor substrate, and more particularly to a method for manufacturing a semiconductor substrate.
非晶質絶縁層上に半導体単結晶層を形成する方法に関す
る。The present invention relates to a method of forming a semiconductor single crystal layer on an amorphous insulating layer.
絶縁物上にシリコン単結晶層を形成する5OI(Sil
icon on In5ulator)技術は、その高
集積化の可能性や、薄膜トランジスタ等への応用面から
、近年、急速にその必要性が高まっている技術である。5OI (Sil), which forms a silicon single crystal layer on an insulator
2. Description of the Related Art In recent years, the need for this technology has rapidly increased due to its potential for high integration and its application to thin film transistors and the like.
現在、この研究は、様々の構造・技術を駆使して進めら
れているが、いずれも、十分な面積・結晶性を有するシ
リコン単結晶を与えるまでには至っていない。Currently, this research is progressing by making full use of various structures and techniques, but none of them has reached the point where silicon single crystals with sufficient area and crystallinity can be obtained.
前記結晶性向上の一方法であるラテラルシーディング法
は、再成長させる領域内に種結晶を形成しておき5.こ
の部分から情報をもとに、ラテラル方向に結晶成長させ
るものである。The lateral seeding method, which is one method of improving crystallinity, involves forming seed crystals in the region to be regrown.5. Based on information from this part, crystal growth is performed in the lateral direction.
以下、アプライド・フイジクス・レターズ(Appl、
Phys、Latt、の第43巻第11号(1983)
の第1048−1050頁に記載された論文rsio、
層間で種結晶を用いて再結晶化させた厚いSi膜におけ
る小傾角粒界の削除(Suppresion of l
owangle grain boundaries
in 5eedad thick Sifilms r
ecrystallized between Sin
、 1ayars) Jと題する論文に記載されている
例をもと、代表的なラテラルシーディング・ゾーンメル
ティング法の概略と、その問題点について述べる。The following is Applied Physics Letters (Appl,
Phys, Latt, Vol. 43, No. 11 (1983)
The paper rsio published on pages 1048-1050 of
Suppression of small-angle grain boundaries in thick Si films recrystallized using seed crystals between layers
owangle grain boundaries
in 5eedad thick sifilms r
ecrystallized between Sin
Based on the example described in the paper entitled J., 1ayars), we will provide an overview of a typical lateral seeding zone melting method and its problems.
第2図は1置方位(100)のシリコン基板1上に形成
された種結晶部2と、SOI構造予備部3の概略断面図
である。この構造は、シリコン基板1上に市松模様にシ
リコン酸化膜4を形成し、さらにシリコン層を堆積させ
ることにより形成され、この時、基板シリコンの露出部
上には単結晶シリコンが形成されて種結晶部2となり、
シリコン酸化膜4上には多結晶シリコンが形成される。FIG. 2 is a schematic cross-sectional view of a seed crystal portion 2 formed on a silicon substrate 1 with a unidirectional orientation (100) and a preliminary SOI structure portion 3. This structure is formed by forming a silicon oxide film 4 in a checkered pattern on a silicon substrate 1 and then depositing a silicon layer. At this time, single crystal silicon is formed on the exposed portion of the silicon substrate and seeds It becomes crystal part 2,
Polycrystalline silicon is formed on silicon oxide film 4.
さらに、シリコン酸化膜5を全面に形成して、シリコン
面2,3を保護する。第3図は、上記を種結晶部2、及
び、SOI構造予備部をゾーンメルティング法により、
溶融再結晶化して、SOI構造予備部3を、単結晶化す
るための装置の一種のグラファイトストリップヒータの
概略である。サンプル基板10を下部の固定ストリップ
ヒータ6で1100℃〜1300℃に熱し、さらに上部
より可動ストリップヒータ7を1〜2■/ s e c
の速度でウェハより1mm程度離して掃引し、2部分的
にさらに高温にし、結晶成長を行なう。Furthermore, a silicon oxide film 5 is formed over the entire surface to protect the silicon surfaces 2 and 3. FIG. 3 shows that the above-mentioned seed crystal part 2 and SOI structure preliminary part are formed by zone melting method.
This is a schematic diagram of a graphite strip heater, which is a type of apparatus for melting and recrystallizing the SOI structure preliminary portion 3 to single-crystallize it. The sample substrate 10 is heated to 1100° C. to 1300° C. with the fixed strip heater 6 at the bottom, and then the movable strip heater 7 is heated at 1 to 2 seconds/sec from the top.
The wafer is swept at a speed of about 1 mm away from the wafer, and two parts are heated to an even higher temperature to perform crystal growth.
このようにして形成されるSOI領域の結晶性は、種結
晶の結晶情報がいかに伝達されるかに依存している。し
かし、この場合熱的なゆらぎや、溶融の不完全な領域か
ら種結晶の結晶方位とは異なる結晶方位の領域が発生し
、結晶粒界が生ずるという問題があった。これを防止す
るため種結晶部を増加する方法2があるが、SOI構造
部が少なくなり、集積度、設計時の煩雑さを考慮すると
。The crystallinity of the SOI region thus formed depends on how the crystal information of the seed crystal is transmitted. However, in this case, there is a problem that a region with a crystal orientation different from that of the seed crystal occurs due to thermal fluctuations or an incompletely melted region, resulting in the formation of grain boundaries. In order to prevent this, there is a method 2 of increasing the number of seed crystal parts, but this reduces the number of SOI structure parts and takes into account the degree of integration and complexity at the time of design.
好ましくない。Undesirable.
本発明の目的は、ラテラルシーディング法と溶融再結晶
化法の特性を考慮し、より結晶性の良好なSO工構造を
形成する半導体基板の製造方法を提供することにある。An object of the present invention is to provide a method for manufacturing a semiconductor substrate that takes into account the characteristics of the lateral seeding method and the melt recrystallization method and forms an SO-processed structure with better crystallinity.
本発明の特徴は、結晶が立方晶系特に面心立方晶のダイ
ヤモンド構造である物質の多結晶あるいは非晶質領域を
、種結晶を使用した溶融再結晶化により単結晶化する工
程において、溶融部分の移動方向を、種結晶の結晶方位
に対して(100>方向とすることにある。A feature of the present invention is that in the step of single-crystallizing polycrystalline or amorphous regions of materials whose crystals have a cubic crystal system, particularly a face-centered cubic diamond structure, by melt recrystallization using a seed crystal, The moving direction of the portion is set in the (100> direction with respect to the crystal orientation of the seed crystal).
第4図は、多結晶シリコンを溶融再結晶化させる際に、
同一面内に面方位(100)の種結晶部2を用意し、そ
の結晶方位に対して<110>方向に溶融部分を移動さ
せて、再結晶を行なったものについて1面内における結
晶軸の回転を調べてその分布を示したものである。Figure 4 shows that when polycrystalline silicon is melted and recrystallized,
A seed crystal part 2 with plane orientation (100) is prepared in the same plane, and the molten part is moved in the <110> direction with respect to the crystal orientation, and the crystal axis in one plane is recrystallized. This shows the distribution of rotation.
同図に示した正方形の各辺は、その結晶粒における<1
10>方向と等価な方向を、矢印は溶融部分の移動方向
を示す。これより、固液界面でのゆらぎ等により種結晶
と異なる方位の情報が入った場合に、種結晶の結晶方位
を有する領域20は減衰し、これより約45°傾いた結
晶方位の領域200が優勢に再結晶することがわかる。Each side of the square shown in the figure is <1 in the crystal grain.
10> direction, the arrow indicates the direction of movement of the molten part. From this, when information on an orientation different from that of the seed crystal is received due to fluctuations at the solid-liquid interface, the region 20 with the crystal orientation of the seed crystal is attenuated, and the region 200 with the crystal orientation tilted approximately 45 degrees from this is attenuated. It can be seen that recrystallization occurs predominantly.
この実験結果より溶融領域の移動方向を<100>方向
とする結晶方位が優勢に再結晶することを発見した。From the results of this experiment, it was discovered that recrystallization occurs predominantly in crystal orientations in which the moving direction of the molten region is the <100> direction.
本発明は、上記発見にもとづき、種結晶の結晶方位を優
勢な結晶方位と一致させることにより、シーディングに
よって与えた初期情報を優勢に持続させることを目的と
したものである。Based on the above discovery, the present invention aims to maintain the initial information provided by seeding in a dominant manner by making the crystal orientation of the seed crystal coincide with the dominant crystal orientation.
以下1本発明の一実施例を第1図により説明する。 An embodiment of the present invention will be described below with reference to FIG.
第1図において、石英管9の中に、石英冶具11により
支えられたカーボンサセプタ12を配置し、これらをと
りま<RFコイル13により加熱する。カーボンサセプ
タ12上にセットされた第2図と同様な構造のサンプル
基板10は、石英棒14に押されて、高周波加熱の発熱
体であるカーボンサセプタ12の高温度15を通過する
瞬間に再結晶化される。さらに詳しくは、サンプル基板
10は、第1図(b)にA部を拡大して示すように、そ
の基板面を上にして、石英基板102上にセットされて
いる。In FIG. 1, a carbon susceptor 12 supported by a quartz jig 11 is placed in a quartz tube 9, and heated by an RF coil 13 surrounding them. A sample substrate 10 having a structure similar to that shown in FIG. 2 set on a carbon susceptor 12 is pushed by a quartz rod 14 and recrystallized at the moment it passes through the high temperature 15 of the carbon susceptor 12, which is a heating element for high-frequency heating. be converted into More specifically, the sample substrate 10 is set on the quartz substrate 102 with the substrate surface facing upward, as shown in FIG. 1(b) in which part A is enlarged.
上記構造の装置により、サンプル基板10中のシリコン
層を溶融再結晶化させる際、第5図に示すようにサンプ
ル基板10の移動に伴う高温部15の相対的移動は、種
結晶の結晶方位に対しく100>方向となるようにした
。また、本装置中、カーボンサセプタ上の高温部15は
1種結晶の結晶方位に対しく010>方向に横たわるよ
うにしたため、単結晶化時の溶融端は、サンプル基板1
0において種結晶の結晶方位に対し、(010)方向に
平行である。When the silicon layer in the sample substrate 10 is melted and recrystallized by the apparatus having the above structure, the relative movement of the high temperature part 15 as the sample substrate 10 moves, as shown in FIG. 5, is caused by the crystal orientation of the seed crystal. On the other hand, the direction is set to 100>. In addition, in this apparatus, the high-temperature part 15 on the carbon susceptor was arranged to lie in the 010> direction with respect to the crystal orientation of the first seed crystal, so that the molten edge during single crystallization was
0, parallel to the (010) direction with respect to the crystal orientation of the seed crystal.
本実施例によれば、サンプル基板10の中の帯状溶融部
分が、種結晶の方位(100>方向に移動するため、こ
の移動方向に依存して優勢となる結晶方位と種結晶の結
晶方位とが一致し、両者の相乗効果が得られて、より結
晶性の良い再結晶化シリコン層が、歩留り高く得られる
。According to this embodiment, since the belt-shaped melted portion in the sample substrate 10 moves in the direction of the seed crystal (100> direction, the dominant crystal orientation and the crystal orientation of the seed crystal depend on the direction of movement). match, a synergistic effect between the two can be obtained, and a recrystallized silicon layer with better crystallinity can be obtained at a high yield.
なお、本実施例では、サンプル基板10と高温部15と
の熱的接触を向上するために、上から石英ガラス103
を乗せである。In this example, in order to improve the thermal contact between the sample substrate 10 and the high temperature section 15, the quartz glass 103 is placed from above.
It is a ride.
第6図には1本発明の第2の実施例を示した。FIG. 6 shows a second embodiment of the present invention.
カーボン製治具17の上にサンプル基板1oを再結晶化
したい面を上にして乗せ、電子ビームガン18より線状
の電子ビームを照射して溶融させ。The sample substrate 1o is placed on a carbon jig 17 with the surface to be recrystallized facing upward, and a linear electron beam is irradiated from the electron beam gun 18 to melt it.
再結晶化を図る。この時、治具17をサンプル基板10
の内の種結晶に対しく100>方向に移動させ、サンプ
ル基板10全面にわたる再結晶化層を得る。また、電子
ビーム照射による溶融端16は、移動方向<100>に
対し垂直な、(010>方向に横たわるようにした。Attempt recrystallization. At this time, the jig 17 is attached to the sample substrate 10.
100> direction relative to the seed crystal to obtain a recrystallized layer covering the entire surface of the sample substrate 10. Further, the melted end 16 due to electron beam irradiation was arranged to lie in the (010> direction, which is perpendicular to the moving direction <100>).
本実施例においても第一の実施例と同様な効果が得られ
るため、再結晶化シリコン層の結晶性及び歩留まりの大
幅な向上が得られる。In this example, the same effects as in the first example can be obtained, so that the crystallinity and yield of the recrystallized silicon layer can be significantly improved.
上記2つの実施例では、対象としてシリコンを取り扱っ
たが、この他にも同様な結晶方位の優勢を示す面心立方
晶物質Go、Sn、GaAs。In the above two embodiments, silicon was used as the target, but other face-centered cubic materials exhibiting a similar predominance of crystal orientation, such as Go, Sn, and GaAs.
A Q A II * A Q S b @ G a
P * G a S b t I n P tInAs
、InSb等の溶融再結晶化に適用できる。A Q A II * A Q S b @ G a
P * G a S b t I n P tInAs
, InSb, etc. can be applied to melt recrystallization.
また、溶融再結晶化の手段もランプやレーザ等を適用で
きる。Furthermore, a lamp, a laser, or the like can be used as a means for melting and recrystallizing.
本発明によれば、溶融再結晶化の際の原子の配向性がシ
ーディングを用いることにより制御できるので1種結晶
に習って一様に配向した単結晶が得られ、再結晶化にお
ける歩留まりを大幅に向上させることができる。According to the present invention, since the orientation of atoms during melt recrystallization can be controlled by using seeding, a uniformly oriented single crystal can be obtained, similar to the type 1 crystal, and the yield in recrystallization can be improved. can be significantly improved.
第1図(a)は本発明の第一の実施例に用いられる高周
波加熱ゾーンメルティング再結晶化装置の概略図、(b
)は(a)のA部拡大図、(Q)は高温部付近の温度分
布を示す図、第2図は従来例に用いられたSOI基板の
断面図、第3図は従来例に用いられたカーボンストリッ
プヒータの概略図、第4図は本発明のきっかけとなった
実験結果の略図、第5図は第一の実施例に用いられた高
温度とサンプル基板の位置関係の概説図、第6図は第二
の実施例である電子ビームアニールによる溶融再結晶化
方法の概説図である。
1・・・シリコン基板、2・・・種結晶部、3・・・S
OI構造予備部、4・・・シリコン酸化膜、5・・・シ
リコン酸化膜、9・・・石英管、10・・・サンプル基
板、12・・・カーボンサセプタ、13・・・RFコイ
ル、14・・・石”llI’l、\
;冨・ノFIG. 1(a) is a schematic diagram of a high-frequency heating zone melting recrystallization apparatus used in the first embodiment of the present invention, and FIG. 1(b)
) is an enlarged view of part A in (a), (Q) is a diagram showing the temperature distribution near the high temperature part, Fig. 2 is a cross-sectional view of the SOI substrate used in the conventional example, and Fig. 3 is an enlarged view of the SOI substrate used in the conventional example. FIG. 4 is a schematic diagram of the experimental results that led to the invention, FIG. 5 is a schematic diagram of the high temperature used in the first embodiment and the positional relationship of the sample substrate, and FIG. FIG. 6 is a schematic diagram of a melt recrystallization method using electron beam annealing, which is a second embodiment. DESCRIPTION OF SYMBOLS 1...Silicon substrate, 2...Seed crystal part, 3...S
OI structure spare part, 4... silicon oxide film, 5... silicon oxide film, 9... quartz tube, 10... sample substrate, 12... carbon susceptor, 13... RF coil, 14 ...Stone"llI'l, \ ; Tomi No
Claims (1)
種結晶を用意し、同一面内に形成された多結晶あるいは
非晶質半導体の溶融再結晶化を図る半導体基板の製造方
法において、溶融領域を、種結晶の結晶方位に対し、〈
100〉方向に移動させることを特徴とする半導体基板
の製造方法。 2、特許請求の範囲第1項において、ウェハの溶融領域
とは、〈010〉方向に平行な帯域であり、この領域が
、基板、あるいはヒータの移動に伴い、ウェハ面内を種
結晶の結晶方位に対し、〈100〉方向に移動すること
を特徴とする半導体基板の製造方法。[Claims] 1. A semiconductor substrate in which a semiconductor seed crystal is prepared on at least a portion of an insulator or an insulating film, and a polycrystalline or amorphous semiconductor formed in the same plane is melted and recrystallized. In the manufacturing method, the molten region is set to <
A method for manufacturing a semiconductor substrate, the method comprising moving the semiconductor substrate in the 100> direction. 2. In claim 1, the melting region of the wafer is a zone parallel to the <010> direction, and this region is caused by the movement of the seed crystal within the plane of the wafer as the substrate or heater moves. A method for manufacturing a semiconductor substrate, characterized by moving in the <100> direction with respect to the azimuth.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60070991A JP2656466B2 (en) | 1985-04-05 | 1985-04-05 | Semiconductor substrate manufacturing method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60070991A JP2656466B2 (en) | 1985-04-05 | 1985-04-05 | Semiconductor substrate manufacturing method |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS61230316A true JPS61230316A (en) | 1986-10-14 |
JP2656466B2 JP2656466B2 (en) | 1997-09-24 |
Family
ID=13447516
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP60070991A Expired - Lifetime JP2656466B2 (en) | 1985-04-05 | 1985-04-05 | Semiconductor substrate manufacturing method |
Country Status (1)
Country | Link |
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JP (1) | JP2656466B2 (en) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4731368U (en) * | 1971-04-30 | 1972-12-08 | ||
JPS5036477U (en) * | 1973-07-27 | 1975-04-17 | ||
JPS5133552Y2 (en) * | 1971-12-29 | 1976-08-19 | ||
JPS536422Y1 (en) * | 1970-07-17 | 1978-02-18 |
-
1985
- 1985-04-05 JP JP60070991A patent/JP2656466B2/en not_active Expired - Lifetime
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS536422Y1 (en) * | 1970-07-17 | 1978-02-18 | ||
JPS4731368U (en) * | 1971-04-30 | 1972-12-08 | ||
JPS5133552Y2 (en) * | 1971-12-29 | 1976-08-19 | ||
JPS5036477U (en) * | 1973-07-27 | 1975-04-17 |
Also Published As
Publication number | Publication date |
---|---|
JP2656466B2 (en) | 1997-09-24 |
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