JPS61226952A - Monolithic integrated light-receiving element - Google Patents
Monolithic integrated light-receiving elementInfo
- Publication number
- JPS61226952A JPS61226952A JP60068008A JP6800885A JPS61226952A JP S61226952 A JPS61226952 A JP S61226952A JP 60068008 A JP60068008 A JP 60068008A JP 6800885 A JP6800885 A JP 6800885A JP S61226952 A JPS61226952 A JP S61226952A
- Authority
- JP
- Japan
- Prior art keywords
- impurity concentration
- recessed section
- fet
- photodiode
- recessed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000012535 impurity Substances 0.000 claims abstract description 17
- 239000004065 semiconductor Substances 0.000 claims abstract description 13
- 239000000758 substrate Substances 0.000 claims abstract description 8
- 238000000034 method Methods 0.000 abstract description 2
- 239000012808 vapor phase Substances 0.000 abstract description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 230000031700 light absorption Effects 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 230000010365 information processing Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000013307 optical fiber Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0605—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits made of compound material, e.g. AIIIBV
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Optical Integrated Circuits (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Light Receiving Elements (AREA)
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明は、光フアイバ伝送や光情報処理システムに於い
て用いられるモノリシック集積受光素子に関する。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a monolithically integrated light receiving element used in optical fiber transmission and optical information processing systems.
（従来の技術）
Ｐ工Ｎフォトダイオードと、電界効果トランジスタ（Ｆ
ＩＴ）から成る前置増幅回路とを同一半導体基板上に形
成したモノリシック集積受光素子は、や多機能機器を実
現する上で欠くことのできないデバイスである。モノリ
シック集積受光素子の従来例としては、例えばエレクト
ロニクスレターズ（Ｅｌｅｃｔｒｏｎ、 Ｌｅｔｔ、、
Ｉ Ｌ ３５３ （１９８０））に報告されてい
るようなＰ工Ｎ−ＩＦＥＴが知られている。第２図は従
来例の断面図を示したものである。(Prior technology) P-N photodiode and field effect transistor (F
A monolithic integrated light-receiving element in which a preamplifier circuit (IT) and a preamplifier circuit are formed on the same semiconductor substrate is an indispensable device for realizing multifunctional equipment. As a conventional example of a monolithically integrated photodetector, for example, Electronics Letters (Electron, Lett,
A P-type N-IFET as reported in I L 353 (1980) is known. FIG. 2 shows a sectional view of a conventional example.
半絶縁性半導体基板２１の上にＩｎ ０．５３ ＧａＯ
，４７Ａ８２２がエピタキシャル成長で形成されており
、その一部が拡散によりｐ型領域２３１及び２３２に変
換されている。２４１，２４２，２４３及び２４４は電
極である。ｐ型交換領域２３１とその下の工ｎＯ，５３
Ｇ＆０．４７Ａａ２２で作られる領域が１μｍ波長帯の
フォトダイオードとして機能する。又、２４２Ｆｉゲー
ト電極、２４３及び２４４はそれぞれソース及びドレイ
ン電極である。In 0.53 GaO on the semi-insulating semiconductor substrate 21
, 47A822 are formed by epitaxial growth, and a portion thereof is converted into p-type regions 231 and 232 by diffusion. 241, 242, 243 and 244 are electrodes. P-type exchange region 231 and the area below it, 53
A region made of G&0.47Aa22 functions as a photodiode in the 1 μm wavelength band. Further, 242Fi gate electrode, 243 and 244 are source and drain electrodes, respectively.
（発明が解決しようとする問題点）
しかしながら、この構造ではフォトダイオードとＦＩＴ
とを共に最適に設計することが難しい。(Problem to be solved by the invention) However, in this structure, the photodiode and FIT
It is difficult to optimally design both.
何故ならば、フォトダイオードとしては、ＩｎＯ，５３
Ｇａ０．４７Ａｓ２２の不純物濃度は応答速度を高める
ためにできるだけ低くすることが望ましいし、一方、Ｆ
ＥＴの導電層としては、余り濃度が低くなると電流駆動
能力が低下してしまうからである。This is because InO, 53 is used as a photodiode.
It is desirable that the impurity concentration of Ga0.47As22 be as low as possible in order to increase the response speed.
This is because if the concentration of the conductive layer of ET is too low, the current driving ability will decrease.
そこで、本発明は、上記欠点に鑑みなされたものであり
、フォトダイオード及びＦＥＴの半導体層の不純物濃度
が共に最適化できる構造のモノリシック集積受光素子の
提供を目的とする。SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned drawbacks, and it is an object of the present invention to provide a monolithically integrated light-receiving element having a structure in which the impurity concentrations of both the photodiode and the FET semiconductor layers can be optimized.
（問題点を解決するための手段）
前述の問題点を解決するために本発明が提供するモノリ
シック集積受光素子は、半絶絶性半導体基板上に形成さ
れた複数個の凹部に不純物を含む半導体層が形成され、
少なくとも１つの前記凹部にフォトダイオードが形成さ
れ、別の少なくとも１つの前記凹部にＦ］ｌ［ｔＴが形
成され、前記不純物の濃度は前記フォトダイオードが形
成された前記凹部と前記ＰＦｔＴが形成された前記凹部
とでは互いに異なることを特徴とする。(Means for Solving the Problems) In order to solve the above-mentioned problems, the monolithic integrated light receiving element provided by the present invention includes a semiconductor device containing impurities in a plurality of recesses formed on a semi-continuous semiconductor substrate. layers are formed,
A photodiode is formed in at least one of the recesses, F]l[tT is formed in at least one other recess, and the concentration of the impurity is equal to the concentration of the impurity in the recess in which the photodiode is formed and in the PFtT. The recessed portion is different from the recessed portion.
（作用）
フォトダイオードの光吸収層とＦＥＴの導電層とは別々
に形成されるので、それぞれの半導体層の不純物濃度を
最適化できる。又、半導体層の厚さも個々に最適化もで
きるようになり、予め凹部の深さを調節しておけば素子
表面を平坦化することも可能となる。(Function) Since the light absorption layer of the photodiode and the conductive layer of the FET are formed separately, the impurity concentration of each semiconductor layer can be optimized. Furthermore, the thickness of the semiconductor layer can be individually optimized, and by adjusting the depth of the recess in advance, it is also possible to flatten the surface of the element.
（実施例）
第１図は本発明の一実施例の断面図である。同図に於い
て、１１は半絶縁性ＩｎＰ基板、１５１及び１５２はそ
こに形成された凹部で深さはそれぞれ３μｍ及び２μｍ
である。気相エピタキシャルによる選択成長法によシ、
２個の凹部１５１及び１５２に別々にＩｎＯ，５３Ｇａ
Ｏ，４７Ａ８１２１及び１２２をそれぞれ成長させる。(Embodiment) FIG. 1 is a sectional view of an embodiment of the present invention. In the figure, 11 is a semi-insulating InP substrate, 151 and 152 are recesses formed there, and the depths are 3 μm and 2 μm, respectively.
It is. By selective growth method using vapor phase epitaxial,
InO and 53Ga are separately placed in the two recesses 151 and 152.
0, 47A8121 and 122, respectively.
凹部１５１にフォトダイオードが、又、凹部１５２にＦ
ＥＴが形成される。ＩｎＯ，５３ＧａＯ，４７Ａｇ １
２１の不純物濃度はできるだけ低濃度とし、ｌ’ｌ＝ｌ
ＸＩ Ｏ”ｃＩＬ−”まで下げられている。一方Ｉｎ
０．５３０ａ ０．４７に８１２２の不純物濃度はＰ
ＦｉＴの相互コンダクタンスを低下させないようｎ ＝
ｌ Ｘ １０ｔ＠ｃＩＬ−ｓにしである。１３１及び
１３２はＺｎの拡散による深さ０．５μｍのｐ型領域、
１４１，１４２．１４３及び１４４は電極である。凹部
１５１の深さを３μｍにしたのは、十分な受光量子効率
を得るためである。又凹部１５２の深さを２μｍとした
のはｌＦＥＴのピンチ・オフ電圧を６ｖ程度に設定する
ためである。A photodiode is placed in the recess 151, and an F is placed in the recess 152.
ET is formed. InO, 53GaO, 47Ag 1
The impurity concentration of 21 should be as low as possible, and l'l=l
It has been lowered to XI O"cIL-". On the other hand, In
0.530a 0.47 The impurity concentration of 8122 is P
In order not to reduce the mutual conductance of FiT, n =
l×10t@cIL-s. 131 and 132 are p-type regions with a depth of 0.5 μm due to Zn diffusion;
141, 142, 143 and 144 are electrodes. The depth of the recess 151 is set to 3 μm in order to obtain sufficient light receiving quantum efficiency. The depth of the recess 152 is set to 2 μm in order to set the pinch-off voltage of the lFET to about 6V.
（発明の効果）
以上に説明したように、本発明によれば、フォトダイオ
ードの光吸収層及びＩＰＩＩｔＴの導電層のそれぞれの
半導体層の不純物濃度と層厚を最適化したプレーナ構造
のモノリシック集積受光素子が提供できる。(Effects of the Invention) As described above, according to the present invention, a monolithic integrated light receiving device with a planar structure in which the impurity concentration and layer thickness of each of the semiconductor layers of the light absorption layer of the photodiode and the conductive layer of IPIItT are optimized. element can be provided.
第１図は本発明の一実施例の断面図、第２図は従来のモ
ノリシック集積受光素子の断面図である。
１１．２１−・・半絶縁性ＩｎＰ基板、１２１，１２２
゜２２・−Ｉｎ Ｏ，５３Ｇａ Ｏ，４７Ａｓ、１３１
，１３２゜２３１．２３２・・・ｐ型領域、１４１，１
４２゜１４３．１４４，２４１，２４２，２４３．２４
４・・・電極、１５１．１５２・・・凹部。FIG. 1 is a sectional view of an embodiment of the present invention, and FIG. 2 is a sectional view of a conventional monolithic integrated light receiving element. 11.21-...Semi-insulating InP substrate, 121, 122
゜22・-In O, 53Ga O, 47As, 131
,132°231.232...p type region, 141,1
42°143.144,241,242,243.24
4... Electrode, 151.152... Concave portion.
Claims (1)
不純物を含む半導体層が形成され、少なくとも１つの前
記凹部にフォトダイオードが形成され、別の少なくとも
１つの前記凹部にＦＥＴが形成され、前記不純物の濃度
は前記フォトダイオードが形成された前記凹部と前記Ｆ
ＥＴが形成された前記凹部とでは互いに異なることを特
徴とするモノリシック集積受光素子。A semiconductor layer containing impurities is formed in a plurality of recesses formed on a semi-insulating semiconductor substrate, a photodiode is formed in at least one of the recesses, and an FET is formed in at least one other recess, The concentration of the impurity is determined between the recess where the photodiode is formed and the F.
A monolithically integrated light-receiving element characterized in that the recesses in which the ETs are formed are different from each other.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60068008A JPS61226952A (en) | 1985-03-31 | 1985-03-31 | Monolithic integrated light-receiving element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60068008A JPS61226952A (en) | 1985-03-31 | 1985-03-31 | Monolithic integrated light-receiving element |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61226952A true JPS61226952A (en) | 1986-10-08 |
Family
ID=13361396
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60068008A Pending JPS61226952A (en) | 1985-03-31 | 1985-03-31 | Monolithic integrated light-receiving element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61226952A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6477960A (en) * | 1987-09-18 | 1989-03-23 | Fujitsu Ltd | Manufacture of light-electron integrated circuit |
-
1985
- 1985-03-31 JP JP60068008A patent/JPS61226952A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6477960A (en) * | 1987-09-18 | 1989-03-23 | Fujitsu Ltd | Manufacture of light-electron integrated circuit |
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