JPS61224364A - Manufacture of thin film transistor and manufacturing equipment - Google Patents

Abstract

PURPOSE:To obtain a TFT device wherein a gate electrode, a source electrode and a drain electrode are in good alignment by forming the electrode pattern of an upper layer side by selective CVD by irradiating light from the back surface, using the electrode of a lower layer side as a shading light layer. CONSTITUTION:A glass substrate 20 provided with a Cr gate electrode 21 is mounted in a light CVD equipment, the substrate is lit with the flow of SiH4 and NH4, an Si3N4 gate insulation film 22 is irradiated with excitation light hupsilon0 and an a-Si:H 23 is piled with the flow of only SiH4 irradiating light hupsilon1. An ohmic contact layer 24 of n<+>-type a-Si:H is made on the front surface side, suing the electrode 21 as a mask with the flow of SiH4 and PH3 irradiating light hupsilon2 and then, Al electrodes 25, 26 are selectively installed by irradiating light hupsilon3 from the back surface using Al(CH4)3. Then, an Si3N4 protection film 27 is made with the flow of SiH4 and NH3 irradiating light hupsilon4 from the front surface. A Cr thin film electrode 28 is made by taking from the equipment. This construction enables to obtain a TFT wherein the matching of the electrodes is good, no pollutant is mixed and the characteristics are excellent.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method and apparatus for manufacturing a thin film transistor, and particularly to a method and apparatus for manufacturing a thin film transistor using a photoexcited chemical vapor deposition method (photoCVD method). Regarding manufacturing equipment.

[Prior art and its problems] Val! uses a semiconductor thin film as an active layer. Transistors are two-dimensionally integrated on a low-lying, large-area substrate such as a glass substrate to form an active matrix, and this is combined with an optically active material such as liquid crystal to create a panel display. , a device that has been attracting attention in recent years.

Polycrystalline silicon, amorphous silicon (a-8i), or the like is used as the active layer of this thin film transistor. The growth temperature of the former polycrystalline silicon is 500-600℃.
In addition to being expensive, the size of the substrate that can be formed is at most about 5 inches (~13α) in diameter, so when considering the costs required for film deposition on large area substrates and care, the latter amorphous silicon is superior. It is believed that there are.

Typical examples of the element structure of a thin film transistor include a staggered (stagg+r) type in which the gate electrode 100 and source/drain electrodes 101 and 102 are on different sides of the semiconductor thin film 103 as shown in FIG. 9, and a staggered type as shown in FIG. as,
Gate electrode 200 and source/drain electrodes 201.20
2 is on the same side of the semiconductor thin film 203 (c
There is an op I an a r) form.

In staggered thin film transistors, electrode metal must be deposited and patterned twice, making the manufacturing process more complicated than in coplanar thin film transistors. However, since the semiconductor 111m and the insulating layer can be formed continuously, the electrical characteristics of this interface are excellent and the transistor characteristics are often good.

This staggered thin film transistor has conventionally been produced, for example, by the method described below.

First, as shown in FIG. 11(a), a layer of Ninichrome (NiCr) is formed on a transparent glass substrate 104 and patterned by photolithography to form a gate electrode 100.

Next, as shown in FIG. 11(b), a silicon dioxide film as the gate insulating film 105 and an amorphous silicon film as the active IO3 are formed by plasma CVD.
, are deposited sequentially and sequentially.

Next, as shown in FIG. 11<C>, a positive resist is applied and exposed from the back side of the substrate by photolithography to form a first resist pattern so that the resist remains at a position corresponding to the gate electrode 100. 106 is formed.

Furthermore, as shown in FIG. 11(d), an amorphous silicon n+ layer as an ohmic contact formation JIi 107 is deposited by plasma CVD, and then an aluminum thin film 108 is formed by vapor deposition.

Then, by immersing the substrate in a resist stripping solution and removing the first resist pattern, the ohmic contact forming layer 107 and the aluminum thin film 108 on the first resist pattern are lifted off, and the source electrode 101 and the drain electrode 102 are removed. form. (Figure 9) In the thin film transistor formed in this way, the amorphous silicon i11 as the active layer is exposed to resist and developer during the photolithography process, so there is a risk of contamination with impurities such as sodium (Na) ions. This is the cause of unstable device operation.

In addition, in the process of forming the aluminum WJW14 for forming the source/drain electrodes, if the substrate temperature is raised, the resist will stick to the substrate, making it difficult to peel off the resist during lift-off, so do not raise the substrate temperature too much. Therefore, there were disadvantages such as insufficient ohmic contact between the source and drain electrodes.

Although various device structures and manufacturing methods have been proposed to eliminate these inconveniences, the staggered myiii
To form an n-transistor, it is necessary to form a gate electrode or a source/drain electrode after forming an active layer.
Since the method includes an otorimetry step and a step of forming a conductor layer for forming electrodes, it has been impossible to completely eliminate the above-mentioned disadvantages.

[Object of the Invention] The present invention has been made in view of the above-mentioned circumstances, and an object of the present invention is to form a thin film transistor with good transistor characteristics and high reliability.

[Means for Solving the Problems] Therefore, in the method of the present invention, when forming a thin film transistor using a semiconductor thin film layer as an active layer, a gate electrode and a source/drain electrode located on the upper layer side of the active layer are used. When forming the electrode, the electrode layer is selectively formed at a position that is self-aligned with the electrode located on the lower layer side using a photo-CVD method while irradiating excitation light from the back side of the substrate.

Further, in the optical CVD apparatus of the present invention, the substrate holder is configured to be reversible so that the light irradiation surface of the substrate can be appropriately selected.

[Effect 1] That is, the method of the present invention focuses on the photoCVD method in which molecules of a material gas absorb light energy and are excited by irradiating light of a predetermined wavelength, and 1llll is formed in the light irradiation area. After either the gate electrode or the source/drain electrode has already been formed, for example, after forming 11 layers of semiconductor as an active layer, when forming the remaining electrode, the back side of the substrate is When light is irradiated from the substrate, the light is blocked by the electrode, so a thin film is selectively grown only in the area where the light reaches the substrate surface, and the electrode formed by light is grown without introducing a photolithography process. Since the electrodes are formed at positions aligned with the , the operational characteristics will not become unstable due to the incorporation of impurities into the semiconductor layer ms.

In addition, since there is no inconvenience of not being able to raise the substrate temperature unlike when forming the upper layer electrode using the lift-off process as in the past, ohmic contact can be made at an appropriate substrate temperature when forming the upper layer electrode. This makes it possible to form electrodes with good properties.

Furthermore, by using the photoCVD apparatus of the present invention,
All steps after forming the lower layer electrode (for example, the gate electrode) on the substrate are carried out in the same chamber by appropriately changing the light irradiation surface and source gas without breaking the vacuum. Since wIII transistors can be formed, sources of contamination can be eliminated and productivity is greatly improved.

[Example] Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a schematic diagram of a photo-CVD apparatus used for forming the WIII transistor of the present invention. This device includes a vacuum chamber 1, a translucent substrate holder 2 disposed inside the vacuum chamber, and a rotating device connected to the substrate holder so that the substrate holder can be rotated from outside the vacuum chamber 1. The substrate inside the vacuum chamber is heated through a handle 3, a heater 5 for heating a substrate 4 for forming a thin film transistor supported on the substrate holder 2, and a transparent window 6 disposed in the upper part of the vacuum chamber 1. A desired gas atmosphere is created in the vacuum chamber 2 by exhausting air from an exhaust port 8 and supplying a reaction gas from a gas supply port 9. It is designed to be preserved. Further, the light irradiation device 7 is
The first waveforms have different wavelengths. Second. Third. It is provided with fourth and fifth excitation light sources 10.11.12.13.14, and is formed so that one of them can be selected as appropriate.

A method for forming a thin film transistor using this apparatus will be explained.

First, as shown in FIG. 2, a thin chromium film is deposited on a transparent glass substrate 20 by vapor deposition, and then patterned by a 7-lithography method to form a gate electrode 21.

In this way, the glass substrate 20 with the gate electrode 21 formed thereon is placed in the vacuum chamber 1 of the photo-CVD apparatus shown in FIG.
The inside of the vacuum chamber 1 is evacuated. Then, while flowing a mixed gas of silane (SiH) and ammonia (NH3) at a desired flow rate and heating the substrate to 250 to 350°C by operating the heater 5, the first excitation light source 10 is Excitation light hvo is irradiated onto the surface (on which the electrode is formed), and a silicon nitride film as the gate insulating film 22 is formed by photo-CVD.

Next, the supply of ammonia gas is stopped, and while only silane gas is allowed to flow at the desired flow rate, the substrate temperature is increased to 200 to 300.
The heater 5 is operated so that the temperature can be maintained at a temperature of
:H) is formed as shown in FIG.

Thereafter, the rotation handle is operated to rotate the substrate together with the substrate holder by 180 degrees, so that the back surface of the substrate is placed in a position corresponding to the window 6. While maintaining the mixed gas of silane and phosphine (PH3) at a desired flow rate and maintaining the substrate temperature at 200 to 250°C, the third excitation light source 12 is activated to excite the substrate from the back side. light hv2
irradiate. At this time, the excitation light hν2 passes through the transparent substrate holder and is made to enter from the back side of the substrate, but this acts as a light shielding layer on the part where the gate electrode is present, and on the surface of the substrate where the gate electrode is present. The ohmic contact layer 24 is selectively applied only to the areas that are not exposed (the areas that are irradiated with light).
A layer of amorphous hydrogenated silicon n÷ is formed as shown in FIG.

Then, the same process as above was carried out while flowing trimethylaluminum (An (CH4) 3) at the desired flow rate. While maintaining the substrate temperature at 100 to 200° C., the fourth excitation light source 13 is activated to irradiate excitation light hv3 from the back side of the substrate. At this time, the excitation light hv3 is blocked by the gate electrode, as in the process of forming the ohmic formation layer, and as shown in FIG.
Aluminum layers as source/drain electrodes 25 and 26 are selectively formed. At this time, the film thickness is 100 to 10
00A is sufficient.

Furthermore, operate the rotary handle 3 again so that the surface of the ζ board is exposed to the window 6.
While flowing the silane + ammonia mixed gas at the desired flow rate, raise the substrate temperature to 250℃.
The fifth excitation light source is operated while maintaining the temperature at ~300° C., and excitation light hv4 is irradiated from the surface side of the substrate. In this way, a passivation film 27 is formed over the entire surface as shown in FIG.
A silicon nitride film is formed.

Finally, the substrate is taken out from the vacuum chamber 1, contact holes are made in the passivation film 27 by photolithography, and then the wiring layer 28 is glued.
llli1 is formed, and a thin film transistor is completed as shown in FIG.

WJI was formed in this way! After forming a gate electrode pattern on a substrate using the 7-otolithography method, transistors undergo all steps, from the formation of a gate insulating film to the formation of an active layer, an ohmic contact formation layer, source/drain electrodes, and a passivation film. It can be carried out in a continuous process without breaking the vacuum within the photo-CVD apparatus. In particular, in the conventional manufacturing method for staggered thin film transistors, a photolithography process must be introduced after the formation of the active layer, whereas in the method of the present invention, the gate electrode It is possible to form source/drain electrodes that match the . Therefore, a 1lli transistor is formed which exhibits extremely stable transistor characteristics over time without the infiltration of contaminants and has a fast response speed.

In addition, since the photo-CVD method is used, the deposition rate is relatively fast at low temperatures, and it is possible to form a good thin film.
Each layer can be formed without damaging the underlying layer as in the case of using the D method, and a 1llllK transistor with good bonding properties can be formed with high productivity.

In addition, in the method of the example, the photo-CVD method was used for everything from the formation of the gate insulating film to the formation of the passivation film. Only the step of forming the layers and the source pot and drain electrodes may be performed by a selective CVD method using light irradiation from the back side.

In addition, as for the structure of the thin film transistor, as shown in FIG. 8, source/drain electrodes 31 are placed on a transparent substrate 30.
32, ohmic contact formation 1133, active layer 3
4. It is applicable to a structure in which the gate insulating film 35 and the gate electrode 36 are sequentially formed, as well as a cobra structure.

Furthermore, the optical CVD equipment used is not necessarily limited to the one shown in the examples, and it goes without saying that other equipment may be used, but the wavelength of the excitation light source used may vary depending on the process. It is necessary to use the one with the best size for decomposing the raw material gas used, and in the process using the selective CVD method, the light does not pass through only the lower layer electrode (gate electrode in the example) that serves as the light shielding layer, and it does not pass through the substrate or It is necessary to select wavelengths that are transparent to other layers.

In addition, this photo-CVD apparatus can be used to manufacture semiconductor devices other than 1III transistors since the light irradiation surface on the substrate can be reversed by operating from outside the reaction chamber. By selecting the wavelength appropriately, the pattern of the already formed layer can be used as a light shield, and the desired wiring pattern can be obtained by irradiating light from the backside without using a resist.Furthermore, the substrate can be turned over. It is also possible to form an interlayer insulating film easily and with good workability by irradiating light from the surface.

[Effect] As explained above, according to the present invention, the lower electrode is used as a light-shielding layer, and selective CV is achieved by light irradiation from the back side.
Since the electrode pattern on the upper layer side is formed by the D method, a thin film transistor with good matching between the gate electrode and the source/drain electrodes can be formed without introducing a 7-layer process after forming the active layer. Therefore, this thin film transistor is free from contaminants, is stable over time, has a fast response speed, and exhibits good transistor characteristics.

Furthermore, by using the photo-CVD apparatus of the present invention, all steps after forming the lower layer electrode on the substrate are performed in one reaction chamber without breaking the vacuum, thereby eliminating contamination sources. Not only can this be significantly reduced, but productivity can also be greatly improved.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an optical CyD device according to an embodiment of the present invention, and FIG.
7 to 7 are manufacturing process diagrams of a thin film transistor according to an embodiment of the present invention, FIG. 8 is a modified example of a thin film transistor formed by the method of the present invention, and FIGS. 9 and 10 are
Typical structural examples of II transistors, and FIGS. 11(a) to 11(d) are manufacturing process diagrams based on a conventional method. DESCRIPTION OF SYMBOLS 1... Reaction chamber, 2... Substrate holder, 3... Rotation handle, 4... Substrate, 5... Heater, 6... Window, 7... Light irradiation device, 8 ...Exhaust port, 9...Gas supply port, 10...First excitation light source, 11...Second
excitation light source, 12... third excitation light source, 13...
-Fourth excitation light source, 14...Fifth excitation light source, 2
0... Glass substrate, 21... Gate electrode, 22...
- Gate insulating film, 23... Active layer, 24... Ohmic contact layer, 25... Source electrode, 26... Drain electrode, 27=... Passivation group, 28... Wiring layer, 100... ...gate electrode, 101...source electrode, 102...drain electrode, 103...active layer,
105... Gate insulating film, 106... Resist pattern, 107... Ohmic contact formation layer, 108...
・Aluminum thin film, 200... Gate electrode, 201
... Source electrode, 202 ... Drain electrode, 203
...Active ■. Figure 8 Figure 9 Figure 10 Figure 5 Figure 6 Figure 7

Claims (5)

[Claims] (1) When forming a thin film transistor using a semiconductor thin film layer as an active layer, the formation process of the gate electrode and the electrodes located on the upper layer side of the active layer among the source and drain electrodes is performed by irradiating light from the back side of the substrate. selective CVD, in which the lower electrode is used as a light-shielding layer, and is selectively deposited at a position self-aligned with the lower electrode using a photo-CVD method;
1. A method for manufacturing a thin film transistor, comprising the steps of: (2) A method for manufacturing a staggered thin film transistor in which a semiconductor thin film layer as an active layer is sandwiched between a gate electrode and a source/drain electrode, including a step of forming a gate electrode on a transparent substrate; A step of forming a gate insulating film by photo-CVD method while irradiating light from the surface side of the substrate, and a step of forming a gate insulating film by photo-CVD method while irradiating light from the surface side of the substrate.
A process of forming a semiconductor thin film layer as an active layer, and a process of forming a semiconductor thin film layer as an ohmic contact forming layer while irradiating light from the back side of the substrate, using the gate electrode as a light shielding layer, and matching it with a highly doped semiconductor thin film layer as an ohmic contact forming layer. Selective CVD to sequentially and selectively form semiconductor thin film layers and source/drain electrodes
The method for manufacturing a thin film transistor according to claim 1, comprising the steps of: forming a passivation film by photo-CVD while irradiating light from the front surface side of the substrate. (3) The semiconductor thin film layer is an amorphous silicon layer.
2) The method for manufacturing a thin film transistor as described in section 2). (4) In a photo-CVD apparatus that excites a source gas with light from an excitation light source and forms a thin film on a substrate from the gas phase, the substrate on which the thin film is to be formed is supported at a desired position within the reaction chamber, and A photo-CVD apparatus comprising: a substrate holder formed such that the substrate can be reversed with respect to the light source, and light irradiation from the back surface and the front surface of the substrate can be selected. (5) The excitation light source includes a plurality of light sources each having a different wavelength, and is configured such that these can be appropriately selected and used. ).