JPS61223568A - Interface board for ic tester - Google Patents

Abstract

PURPOSE:To enable automatic interterminal wiring between an integrated circuit and an IC tester without labor, by arranging a memory element for memorizing interterminal wiring information corresponding to an integrated circuit to be inspected and a plurality of switching elements adapted to change over the interterminal wiring according to memory information of the memory elements. CONSTITUTION:Inter-terminal information between input and output terminals of an LSI10 and those of an IC tester 20 is previously memorized into a P-ROM40. According to information memorized in the P-ROM40, the ON-OFF state of switching elements and the delay of a variable delay element are set. With such an arrangement, out of the input and output terminals 11 of an integrated circuit 10, the input terminal is connected to a disired output terminal of the terminal 21 of IC tester 20 through a processing circuit 30. Likewise, the output terminal of the integrated circuit 10 has a switching element 33 and is connected to a desired detection terminal of the IC tester 20 through the processing circuit 30.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an interface board for an IC tester used for testing semiconductor integrated circuits, and more particularly to an interface board for an IC tester in which wiring in ports can be programmed.

[Technical background of the invention and its problems]

2. Description of the Related Art In test equipment for testing semiconductor integrated circuits such as LSIs, an interface board is used to provide an interface between terminals of the integrated circuit and an IC tester. FIG. 4 is a schematic diagram showing the general configuration of the test device, in which the LSI 61 to be tested is placed on an interface board 62. Input/output terminal 63 of LSI61
．． 64 is connected to an IC tester 65. That is, LSI
Each input terminal 63 of the tester 61 is connected to each output terminal 66 of the tester 65.
are connected in a 1:1 relationship, and similarly LSI61
Each input terminal (detection terminal) 67 of a tester 65 is connected to each output terminal 64 in a 1:1 relationship. Here, the IC tester 65 outputs desired logical value information to its output terminal 66 and judges the logical value information inputted to its input terminal 67.

Conventionally, for the interface board in the above configuration, the LSI package terminals 68 on the board and the tester have been connected for each type of integrated circuit according to the connection correspondence between the input/output terminals of the LSI and the input/output terminals of the tester, as shown in FIG. The wiring 70 was manually connected between the contact terminal 69 and the contact terminal 69. However, the number of input/output terminals of LSI has recently increased to 120.
200.250, which makes the rotation of interface boards extremely complicated and difficult, requiring specialized wiring skills and increasing production time and costs. was there.

[Purpose of the invention]

The present invention has been made in consideration of the above-mentioned circumstances, and its purpose is to automatically perform wiring between the terminals of the IC tester and the terminals of the IC tester without any manual intervention.
Another object of the present invention is to provide an interface board for an IC tester that allows the wiring between terminals to be easily changed even for different types of integrated circuits, and is extremely effective in testing the operation of integrated circuits.

[Summary of the invention]

The gist of the present invention is to perform wiring between terminals using a switching element, and to perform ON-OFF switching of the switching element.
The purpose of this is to perform the selection based on information stored in a storage element that stores inter-terminal wiring information in advance.

An interface board of an IC tester used for testing semiconductor integrated circuits is mainly used to associate tester terminals with input/output terminals of the integrated circuit. Then, the tester and the integrated circuit are connected in a desired relationship via this interface board. Therefore, a programmable read-only memory element is provided on the Inter7Ace board, and necessary wiring information is written there.
By processing the contents using switching elements, manual wiring can be omitted and a programmable interface board can be realized. Further, wiring between terminals can be easily performed without requiring specialized skills.

The present invention focuses on such points, and is used when performing a logic value test of a semiconductor integrated circuit, and the input terminal of the integrated circuit,
Output terminal and IC tester output terminal.

An interface board that makes a connection with a detection terminal includes a memory element that stores terminal wiring information corresponding to an integrated circuit to be inspected, and a plurality of A switching element is provided.

〔Effect of the invention〕

According to the present invention, the complicated wiring on the ink-face board, which conventionally required manual labor, can be omitted, and the ink-face board can be manufactured without relying on specialized technology. Moreover, by simply replacing the contents of the memory element containing connection information or the memory element itself, it is possible to easily adapt to other types of integrated circuits, and the time and cost required for manufacturing the board can be significantly reduced.

(Example of the invention) Hereinafter, details of the present invention will be explained with reference to illustrated embodiments.

FIG. 1 is a block diagram showing a schematic configuration of a test device according to an embodiment of the present invention. In the figure, 10 is a semiconductor integrated circuit (LSI), 20 is an IC tester, and a processing circuit 30 consisting of a switching element, a variable delay element, etc. is connected between these terminals 11 and 21, as will be described later. A programmable memory (P-ROM) 40 is connected to the processing circuit 30.

The P-ROM 40 stores in advance inter-terminal wiring information between the input/output terminals of the LSI 10 and the input/output terminals of the IC tester 20. The ON-OFF state of the switching element and the delay amount of the variable delay element are set by the information stored in the P-ROM 40. As a result, an input terminal of the input/output terminals 11 of the integrated circuit 10 is connected to a desired output terminal of the terminal 21 of the IC tester 20 via the processing circuit 30. Similarly, the output terminal of the integrated circuit 10 is connected to a desired detection terminal of the IC tester 20 via the processing circuit 30.

FIGS. 2(a) and 2(b) show the processing circuit 30 and P-ROM.
4 is a schematic diagram showing the configuration of an interface board consisting of 40. FIG. Note that (a) is a view from the front, and (b) is a view from the back. An IC package 60 in which the LSI is placed is installed on the board 50, and this package 60 is connected to the processing circuit 30 via the front wiring 12. Also,
The input/output terminals 21 of the IC tester 20 are connected to the backside wiring 22.
It is connected to the processing device 30 via.

The processing circuit 30 is specifically configured as shown in FIG. That is, the front wiring 12 is connected to the wiring 32 via a variable delay element 31 consisting of a shift register, COD, etc.
This wiring 32 is arranged in a matrix with the back side wiring 22. Switching elements 33 made of MOS transistors are connected between each intersection of the matrix. Although not shown in the figure, the processing circuit 30 is provided with a drive circuit that drives the variable delay element 31 and the switching element 33 according to the information stored in the P-ROM 40. Then, 0N-OFFG of the switching element 33; tP-R
This selection is made based on the OM40 (F) storage information, and this selection automatically connects the input/output terminals of LSllo and the IC tester 20. Similarly, the delay amount of the variable delay element 31 is also set by the information stored in the P-ROM 40, and the delay amount of each terminal wiring is determined by this setting.

The interface board manufactured in this way is
The LSI 10 is attached to the IC package 60, and the I
By installing it on the C tester 20, the P-ROM4
The terminals of LSllo and the tester 20 can be connected in a desired state according to the inter-terminal wiring information stored in 0. Furthermore, the amount of delay for each wiring can be set arbitrarily. Therefore, a test similar to the conventional one can be performed.

In this case, there is no need to perform complicated wiring on the board, which conventionally required manual labor, making production extremely easy. This effect is particularly effective for future LSIs where the number of input/output terminals tends to increase. Furthermore, since the variable delay element is provided, there is no need to consider the connection length, which also facilitates manufacturing. Also, P-R
By simply changing the contents of the OM or the P-ROM itself, it can be applied to testing different types of LSIs, and its effects are enormous.

Note that the present invention is not limited to the embodiments described above. For example, the switching element is not limited to a MOS transistor, and may be any element that can be switched between ON and OFF by an electric signal. Similarly, the variable delay element is not limited to a shift register, COD, etc., and may be any element that can vary the amount of delay using an electrical signal. Further, a RAM may be used instead of the P-ROM as a storage element, and inter-terminal wiring information may be stored in the RAM before the test. Furthermore, if the amount of wiring delay during testing is not a problem, the variable delay element may be omitted. In addition, various modifications can be made without departing from the gist of the present invention.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a schematic configuration of a test device according to an embodiment of the present invention, FIGS. 2(a) and (b) are schematic diagrams showing the configuration of an interface board used in the above device, and FIG. FIG. 4 is a schematic diagram showing the general configuration of a general test device, and FIG. 5 is a back view of a conventional interface board with manual wiring. DESCRIPTION OF SYMBOLS 10... Semiconductor integrated circuit (LSI), 11... Integrated circuit terminal, 12... Front side wiring, 20... IC tester, 21... Tester terminal, 22... Back side wiring, 30...
... Processing circuit, 31... Variable delay element, 32... Wiring, 33... Switching element, 40... P-RO
M (memory element), 50...board, 60...IC
package. Applicant's agent Patent attorney Takehiko Suzue Figure 1 (a) (b) Figure 3 Figure 4 Figure 5

Claims (1)

[Scope of Claims] An interface board used when performing a logic value test of a semiconductor integrated circuit, and for associating input terminals and output terminals of the integrated circuit with output terminals and detection terminals of an IC tester, comprising: An IC tester comprising: a memory element that stores inter-terminal wiring information corresponding to an integrated circuit to be tested; and a plurality of switching elements that switch inter-terminal wiring according to the information stored in the memory element. interface board. (2) A patent characterized in that the switching elements are connected between respective intersections of matrix wiring consisting of input terminals and output terminals of the integrated circuit and output terminals and detection terminals of the IC tester. Claim 1
Interface board for IC tester as described in section. (3) Claim 2, characterized in that the switching element is composed of a MOS transistor.
Interface board for IC tester as described in section. (4) A variable delay element is connected in series to the switching element, and the storage element stores delay information of each wiring along with the terminal wiring information. Interface board for IC tester as described in section.