JP2647209B2 - Electrical circuit test method - Google Patents

Description

The present invention relates to a method for testing an electric circuit having a plurality of circuit parts, and particularly to a method for testing a large-scale electric circuit such as an integrated circuit (LSI) or an entire device. It relates to a method suitable for application to a test.

2. Description of the Related Art For example, an integrated circuit used in a multiplexing device of a communication network includes a very large number of circuit parts (functional unit parts), and an input data group varies in a wide variety. Testing of such integrated circuits has been performed as follows.

That is, as shown in FIG. 2, integrated into the integrated circuit 1 having many functional unit portions F1, F2,. The circuit 1 is operated, and the test is performed by determining whether or not the pattern data output from the output pin is the pattern data expected for the test pattern data.

[Problems to be Solved by the Invention] The number of input / output pins of an integrated circuit used in various devices for a communication network is 200 to 300 in total.
It is very many with pins, and is divided into many functional unit parts. Further, when the communication network is a network intended for the public, reliability is a particular problem, and it is required to repeat the test with all conceivable test pattern data. The total number of test pattern data for such an integrated circuit was actually about 50,000.

For this reason, the number of man-hours for the test is very large, and the test time for one is also very long.
Designing test pattern data in consideration of many functional units has also been a difficult task.

In the future, it is expected that integration will further progress, and an early solution of such a problem is required.

Such a problem occurs not only with integrated circuits, but also with printed circuit boards on which a large number of integrated circuits and various components are mounted. Similarly occurs.

The present invention has been made in view of the above points,
An object of the present invention is to provide a test method of an electric circuit that can reduce the number of test signals, facilitate test signal design work and actual test operation, and can shorten the test time.

[Means for Solving the Problems] In order to solve such problems, the present invention provides a first method.
An electric circuit having at least a second circuit part utilizing the processing result of the first circuit part and the circuit part of the first circuit part was tested as follows. That is, a selector circuit was inserted between the first and second circuit portions.

Then, a first test signal is supplied to the first circuit portion through an input terminal, and an output signal from the first circuit portion in response to the first test signal is output via a selector circuit to a test output. A test is performed based on whether or not the signal extracted from the terminal is a predetermined signal.

For the second circuit part, the second
The second test signal is supplied to a second circuit portion via a selector circuit, and an output signal corresponding to the second test signal from the second circuit portion is taken out from an output terminal and taken out. A test is performed based on whether or not the received signal is a predetermined signal.

For the selector circuit portion, a selection signal selected by the selector circuit is extracted from the test output terminal, and a test is performed based on whether or not the extracted signal is a predetermined signal.

[Operation] It is an object of the present invention to test an electric circuit composed of a plurality of circuit parts not for the entire circuit but for each circuit part. A basic electric circuit composed of one circuit part and a second circuit part utilizing the processing result of the first circuit part is tested. Of course, larger electrical circuits having this basic electrical circuit can also be tested.

Here, a selector circuit is provided so that an output signal from the first circuit portion in the preceding stage can be extracted and a second test signal can be supplied to the second circuit portion in the subsequent stage. Further, a test output terminal is provided so that an output signal from the first circuit portion can be extracted to the outside, and a test input terminal is provided so that a second test signal can be input to the second circuit portion.

A first test signal is supplied to the first circuit portion via the input terminal, and an output signal from the first circuit portion corresponding to the first test signal is taken out from the test output terminal via the selector circuit and taken out. A test of the first circuit portion is performed based on whether the signal is a predetermined signal corresponding to the first test signal.

On the other hand, a second test signal is input from a test input terminal to a second circuit portion via a selector circuit, and an output signal corresponding to the second test signal from the second circuit portion is extracted from an output terminal and extracted. The test of the second circuit portion is performed based on whether or not the received signal is a predetermined signal.

When it is required to use many test signals as input signals for testing the first or second circuit portion, the above processing is repeated.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows a basic configuration embodying the test method of this embodiment.

In FIG. 1, a first circuit portion (functional unit portion) 11 processes an input signal given from an input terminal 10. The output signal of the first functional unit portion 11 is provided to a first selection input terminal of the selector circuit 12.

The second selection input terminal of the selector circuit 12 has an input terminal
A test signal is input from 13. The selector circuit 12 is supplied from a selection control signal mode input terminal 17 indicating whether the operation mode is the normal operation mode or the second test mode. Selector circuit 12
Is the first in the normal operation mode and the first test mode.
The output signal of the functional unit portion 11 is selected, and the test signal is selected in the second test mode.

The selection signal selected by the selector circuit 12 is supplied to a second circuit portion (functional unit portion) 14 and a test output terminal 15. The second functional unit 14 provides a signal obtained by subjecting the selection signal to predetermined processing to an output terminal 16.

In the test method of this embodiment, the first functional unit
A test in which both 11 and the second functional unit portion 14 are operated is not performed. That is, the first functional unit portion 11 and the second functional unit portion 14 are separately tested.

In the test for the first functional unit portion 11, the selector circuit 12 is controlled so as to select an output signal from the first functional unit portion 11 before inputting the first test signal. Then, a first test signal is input to the input terminal 10, and a signal obtained by processing the test signal by the first functional unit portion 11 is obtained from the test output terminal 15, and this output signal is The test is performed by determining whether or not the signal corresponds to the input test signal. Such a test for one test signal is performed for a plurality of test signals to test the first functional unit portion 11.

In the test on the second functional unit portion 14, the selector circuit 12 is controlled so as to select the second test signal input from the test input terminal 13 before inputting the second test signal. Then, a second test signal is input to the test input terminal 13, a signal obtained by processing the test signal by the second functional unit portion 14 is obtained from an output terminal 16, and this output signal is The test is performed by determining whether or not the signal corresponds to the input second test signal. Such a test for one test signal is performed for a plurality of types of test signals to test the second functional unit portion 14.

Therefore, according to this embodiment, a large-scale electric circuit can be divided into a plurality of circuit portions for testing, and an abnormal portion can be easily specified.

Also, from the number of test signals required to test the first functional unit portion 11 and the second functional unit portion 14 without separating them, the first signal unit necessary to test only the first functional unit portion 11 is obtained. And the sum of the number of second test signals required to test only the second functional unit portion 14 is smaller, so that the number of test steps and test time can be reduced as compared with the conventional method. Can also be easily designed. This is because, in the latter case, a test considering the interaction of the circuit portions can be omitted. Further, even if the test in which the interaction is taken into consideration is omitted, the result in the case where the interaction is taken into consideration can be estimated from each test alone, and this does not cause a problem.

By the way, in order to realize the test method of this embodiment, a newly provided selector circuit 12 is an essential requirement, but the selector circuit 12 can also be tested.
That is, since the selection signal selected by the selector circuit 12 is also supplied to the test output terminal 15, for example, an all logic "1" fault or a logic "0" fault in a digital signal can be detected. Also, both input terminals
A test for switching can be performed by repeatedly switching the selection control signal with the test signal input to 10 and 13 and detecting the output signal. Thus the selector circuit
12 can be tested to confirm the normality of the selector circuit 12.
An accurate test of each functional unit part 11 or 14 can be performed by comparing the test signal and the output signal.

If each functional unit portion 11 or 14 is to be individually tested, instead of connecting the test output terminal 15 to the output terminal of the selector circuit 12, the test output terminal 15 is connected to the first functional unit portion 11. It is sufficient to connect directly to the output terminal. However, in this case, the failure of the selector circuit 12 cannot be detected, and the failure of the selector circuit may be erroneously determined as the failure of the functional unit.

Fig. 3 shows that the advanced test method
And shows a configuration in which three functional unit portions are connected in series.

In FIG. 3, during normal operation, the processing result of the first functional unit portion 20 is given to the second functional unit portion 22 via the first selector circuit 21, and the processing result of the second functional unit portion 22 is provided. Is supplied to the third functional unit part 24 via the second selector circuit 23, and the processing result of the third functional unit part 24 is output via the output terminal 25.
That is, selection of the selector circuits 21 and 23 is controlled so that a signal flows through such a path. During the normal operation, the failure of the selector circuits 21 and 23 can be detected by appropriately monitoring the output signals from the output terminals 26 and 28.

The test of the first functional unit section 20 is performed by inputting a test signal via the input terminal 19 and outputting the signal output from the first functional unit section 20 to the first selector circuit 21 and the first test output terminal. The signal is taken out via a line 26, and it is determined whether or not this output signal corresponds to the input test signal.

The test of the second functional unit part 22 is performed by inputting a test signal to the second functional unit part 22 via the first test input terminal 27 and the first selector circuit 21, Is output via the second selector circuit 23 and the second test output terminal 28, and it is determined whether or not the output signal corresponds to the input test signal. .

The test of the third functional unit portion 24 is performed by inputting a test signal to the third functional unit portion 24 via the second test input terminal 29 and the second selector circuit 23, and Is output via an output terminal 25, and it is determined whether or not the signal corresponds to the input test signal.

In this way, the basic test configuration shown in FIG. 1 can be extended. The same configuration can be applied to a case where four or more functional units are arranged in series.

FIG. 4 shows a configuration in which the basic test method shown in FIG. 1 is applied to a case where there are three functional unit portions, and a processing result of two functional unit portions is used by another functional unit portion. FIG.

In FIG. 4, during a normal operation, the processing result of the first functional unit portion 35 is given to the second functional unit portion 37 via the first selector circuit 36, and the processing result of the third functional unit portion 38 is provided. Is provided to the second functional unit portion 37 via the second selector circuit 39, and the second functional unit portion 37 is provided with the first and third functional unit portions 35 and 38.
The processing is performed using the processing result of (1), and the processing result is output via the output terminal 45. That is, selection of the selector circuits 36 and 39 is controlled so that a signal flows through such a path. During the normal operation, the output terminals 40 and
By appropriately monitoring the output signal from 42, a failure of the selector circuits 36 and 39 can be detected.

The test of the first functional unit portion 35 is performed by the first input terminal.
A first test signal is input through a first functional unit portion 35, and a signal output from the first functional unit 35 is extracted through a first selector circuit 36 and a first test output terminal 40. This is performed by determining whether or not the signal corresponds to the first test signal.

The test of the second functional unit part 38 is performed by the second input terminal.
A second test signal is input to the second functional unit section 38 via 41, and the signal output from the second functional unit section 38 is input to the second selector circuit 39 and the second test output terminal 42.
And determines whether or not this signal corresponds to the second test signal.

The test of the third functional unit portion 37 is performed by sending test signals to the third functional unit portion 37 via the first and second test input terminals 43 and 44 and the first and second selector circuits 36 and 39. , And a signal output from the third functional unit portion 37 is taken out via the output terminal 45, and it is determined whether or not this signal corresponds to the third test signal.

Thus, the basic test configuration shown in FIG. 1 can be extended in parallel. The same applies to a case where three or more functional units for parallel processing are arranged.

In practice, when there are a plurality of functional unit portions required to be tested independently, they are often in a serial and / or parallel relationship, and the configuration shown in FIGS. 3 and 4 is appropriately used. The test can be performed, and the test efficiency can be improved.

The test method of the present invention is applicable not only to an integrated circuit having many functional units, but also to a printed wiring board on which a large number of integrated circuits and various components are mounted, and an entire apparatus including a plurality of printed wiring boards. The same applies to tests.

Further, the present invention can be applied to any circuit intended for digital signal processing or analog signal processing.

[Effects of the Invention] As described above, according to the present invention, a plurality of circuit portions constituting a large-scale electric circuit are individually tested by providing a selector circuit, a test input terminal, and a test output terminal. As a result, the number of test signals to be prepared as a whole is reduced as compared with the conventional case, so that test signal design is facilitated and the number of test steps and test time can be reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of a method for testing an electric circuit according to the present invention, FIG. 2 is an explanatory view of a conventional method, and FIGS. 3 and 4 each show an expanded configuration of the embodiment shown in FIG. It is a block diagram showing an example. 10 ... input terminal, 11, 14 ... circuit part, 12 ... selector circuit, 13 ... test input terminal, 15 ... test output terminal,
16 Output terminal.

Claims (1)

(57) [Claims] An electric circuit test method for testing an electric circuit including at least a first circuit part and a second circuit part utilizing a processing result of the first circuit part, wherein the first and second circuit parts are tested. A selector circuit is interposed between the circuit portions of the first circuit portion.
And an output signal corresponding to the first test signal from the first circuit portion is taken out from a test output terminal via the selector circuit, and whether or not the taken out signal is a predetermined signal A second test signal from a test input terminal is input to the second circuit portion, and the second test signal is input to the second circuit portion via the selector circuit. The second test signal is supplied to a circuit portion, an output signal from the second circuit portion corresponding to the second test signal is extracted from an output terminal, and a test is performed based on whether or not the extracted signal is a predetermined signal. For the circuit portion, the selection signal selected by the selector circuit is extracted from the test output terminal, and a test is performed based on whether or not the extracted signal is a predetermined signal. The method of testing an electrical circuit, characterized in that.