JPS61219955A - Photomask - Google Patents

Abstract

PURPOSE:To prevent the breakdown of a metallic film pattern of a photomask by forming a corner part of a semiconductor area, to an obtuse angle or a circular arc shape so that a distance between each semiconductor area becomes larger than a prescribed value, and using the photomask of the metallic film pattern. CONSTITUTION:In a semiconductor substrate consisting of an (n<->)-type single crystal silicon, a field insulating film is formed on a main surface on the substrate by using a photomask 22. This photomask 22 is used for a negative type photoresist by forming a chrome thin film 23 in a rectangular shape on a quartz substrate. In this regard, in accordance with the shape of the chrome thin film 23, a field insulating film is formed on the semiconductor substrate. A corner part 23A of this chrome thin film 23 is formed in a circular arc shape. This circular arc shape is formed so that a distance between each semiconductor area becomes larger than a prescribed value. Accordingly, when the photomask has been set to an exposing device, a corner part of a metallic pattern causes no melt breakdown, and a drop of the yield can be prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to semiconductors, and particularly to a technique that is effective when applied to a technique for forming a semiconductor region of a semiconductor device.

[Background technology]

When manufacturing semiconductor devices, especially 1M05II field type transistors (hereinafter referred to as C-MISFETs) using negative photoresists, metals (e.g. Cr) are placed on a glass plate.
) It is known to use a photomask with a pattern formed thereon.

When this photomask is used again, it must be cleaned. This cleaning is done by rubbing it with a brush or the like, so the photomask is charged with static electricity.

The inventor of the present invention has revealed that this causes the following problem. That is, this static electricity is discharged when a photomask is set in an exposure device when forming a semiconductor region 1, for example, a guard band region or a well region in a semiconductor device, and the metal pattern of the photomask is discharged. Dissolve and destroy the corners. This reduces the precision in forming semiconductor regions such as guard band regions and well regions, and causes defects such as conduction between the guard band region and the semiconductor element region or between the guard band region and the well region during operation.

The technology for forming a resist mask using a photomask with a chrome pattern formed on a glass plate is described in 1 Ohmsha Co., Ltd., published October 25, 1980, 1 ed. Author, Masatoshi Utaka, "rLsI Process Engineering" P77 -107.

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to provide a technique that can prevent a decrease in yield due to destruction of a metal pattern on a photomask of a semiconductor device.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Summary of the invention]

An overview of one typical invention disclosed in this application is as follows.

That is, by forming the semiconductor regions using a photomask whose corner portions are formed of a metal film pattern having an obtuse angle or an arc shape such that the distance between each semiconductor region is larger than a predetermined value, the metal of the photomask is This makes it possible to prevent a decrease in yield due to pattern destruction.

The configuration of the present invention will be explained below along with examples.

In all the figures, parts having the same functions are denoted by the same reference numerals, and repeated explanations thereof will be omitted.

〔Example〕

FIG. 1 and FIG. 2 show a C-MI S FET according to the present invention.
FIG. 2 is a diagram for explaining the configuration of an embodiment applied to
FIG. 1 is a plan view of the C-MI 5FET, and FIG. 2 is a sectional view taken along the line II-It in FIG. 1.

11th! 1 and FIG. 2, 1 is a semiconductor substrate made of n-type single crystal silicon, 2 is a guard band region for stabilizing the potential of the substrate 1, and the corner on the inside (semiconductor element region or well region side) is a guard band region for stabilizing the potential of the substrate 1. The portion 2A is formed in an obtuse angle or arc shape. The obtuse angle or arcuate portion formed at the inner corner 2A of the guard band region 2 is designed to prevent the distance between the guard band region 2 and the semiconductor element region or well region from becoming smaller than (or larger than) a predetermined value r1. It has a shape. This guard band area 2 is! It consists of an r-type semiconductor region. 3 is a well region made of a p-type semiconductor region, 4 is a pair of P11 type semiconductor regions forming the source and drain of a P-channel MO3FET, and 5 is an N-type semiconductor region.
A pair of n3 type semiconductor regions forming the source and drain of the channel MO5FET.

6 is a gate electrode, 7 is a signal input line made of aluminum or the like, and 8 is a power supply voltage Vcc (5
9 is a reference voltage line made of aluminum or the like to supply a reference voltage Vss (0 volts), 10 is a signal output line made of aluminum or the like, and 11 is each of the wirings 8 ~IO and semiconductor region 2
, 3, 4° 5 or a contact hole for electrically connecting with the gate electrode 6. 12 is silicon oxide (S
Field absolute 1sII consisting of iOz)! And.

An insulating film formed by selective thermal oxidation of the substrate 1, 13 a P' type semiconductor region for applying well potential, 14 silicon oxide (S
15 is an interlayer insulating film made of a phosphor silicate glass film or the like.

Next, the manufacturing method of the C-M I 5FET of this embodiment and the photomask shape will be explained.

The C-M T 5FET of this example is manufactured by the following manufacturing process.

(1) First, using the photomask 20 shown in FIG.
A well region 3 of P-type single-crystal silicon is formed on the main surface of a substrate 1 of i-type single-crystal silicon by ion implantation.

A photomask 20 consists of a chromium thin film 21 on a quartz substrate 20.
It is formed into the shape shown in the figure and is used for negative photoresist. The corner portion 21A of the chromium thin film 21 has a circular shape. This can prevent the chromium thin film 21 from being electrically discharged with other conductor regions and being destroyed, especially at the sharp corners, due to electric field concentration. In addition.

Although not shown in FIG. 3, forming the corners of the well region into a circular arc shape or an obtuse angle can be achieved by forming two corners within the same guard band.
This is effective as a photomask for providing two well regions close to each other.

(2) A field insulating film 12 is formed on the main surface of the substrate 1 using a foot mask 22 shown in FIG.

The photomask 22 is formed by forming a black thin film 23 in the shape shown on a quartz substrate 22, and is used for a negative photoresist. The corner portion 23A of the chromium thin film 23 is shaped like an arc.

This can prevent destruction due to discharge between the chromium thin films 23. In particular, in photomasks for negative photoresists, the chromium thin film is likely to be damaged in the mask for forming the guard band (guard ring) region, that is, the mask for the field insulating film formation process, as shown in Figure 4. In addition, the width of the guard band region is narrow, whereas the chromium thin film has a large area and a large amount of charge. Corner 2
3B is preferably a right-angled shape as shown in Figure 1.

Thereafter, the semiconductor device shown in FIGS. 1 and 2 is completed according to a well-known method.

In FIG. 5, a dotted line 23G indicates a portion where the corner of the metal pattern 23B is dissolved and destroyed due to static electricity generated when cleaning the conventional photomask 22 being discharged when the photomask is set. As can be seen from the distance between the well region 3 and the guard band region shown superimposed in the figure, when a semiconductor device is formed using a discharge-damaged mask, the well region 3 and the guard band region 2 are electrically connected. It will short circuit.

As can be seen from the above, the photomask 2 for forming the guard band region and the well region n° and the P′ diffusion layer is
A part of the corner of the metal pattern 21 and 23 of 0 and 22 corresponding to the inside of the guard band region 2 is formed into an obtuse angle or a circle such that the distance between each semiconductor region is larger than a predetermined value. By forming the photomask 2o in an arc shape, when the photomask 2o is set in an exposure device, the static electricity generated during cleaning will not be discharged transiently because there are no protruding parts on the metal pattern 21 or 23, so that the corner of the metal pattern will not be discharged. This can prevent melting and destruction of parts.

By using the photomasks 20 and 23, a part 2A of the corner of the guard band region 2 is formed at an obtuse angle within a range in which the distance between this and each semiconductor region 3, 4.5 does not become smaller than a predetermined value r. Alternatively, since the semiconductor regions are formed in an arc shape, the distance between each semiconductor region is a predetermined value or more. This prevents short circuits between each semiconductor region during operation.
It is possible to prevent a decrease in yield due to destruction of the metal pattern of a photomask of a semiconductor device.

〔effect〕

As explained above, according to the novel technology disclosed in this application, the following effects can be obtained.

(1) By forming a part of the corner of the metal pattern of the photomask into an obtuse angle or arc shape such that the distance between each semiconductor region is larger than a predetermined value, the photomask can be attached to an exposure device. Since the static electricity generated during cleaning is not discharged when the metal pattern is set to 1, melting and destruction of the corners of the metal pattern can be prevented.

(2) By using the photomask of (1) above,
A part of the corner of the guard band region is formed into an obtuse angle or an arc shape within a range in which the distance between the guard band region and each semiconductor region does not become smaller than a predetermined value, so that the distance between each semiconductor region is a predetermined value. The above is formed. This prevents short circuits between the respective semiconductor regions during operation, thereby preventing a decrease in yield due to destruction of the metal pattern of the photomask of the semiconductor device.

The present invention has been specifically explained above using examples.
It goes without saying that the present invention is not limited to the embodiments described above, and can be modified in various ways without departing from the gist thereof.

For example, in this embodiment, only the inner corner of the guard band region is formed into an obtuse angle or an arc shape, but the corner of any semiconductor region may be formed into an obtuse angle or an arc shape as necessary.

Further, the above embodiments describe the present invention as a C-M r S FET.
Although the present invention has been explained using an example applied to C-MISF
Of course, the present invention can also be applied to semiconductor devices other than ET.

[Brief explanation of the drawing]

1 and 2 illustrate the present invention in a C-M I S FET.
FIG. Figure 1 is a plan view of the C-MISFET, Figure 2 is:
Cross-sectional view taken along the section line ■-■ in Figure 1, Figures 3 and 4
The figure is a plan view showing the shape of the photomask of this example, and FIG. 5 is a partial plan view showing the configuration of the main parts of the photomask. In the figure, 1: semiconductor substrate, 2: guard band region. 2A...Corner portion, 3...Well region, 4...Pair of P4 type semiconductor regions, 5...Pair of rl' type semiconductor regions, 6...Gate electrode, 7...Signal input Line, 8...
Power supply voltage supply line, 9... Reference voltage line, 10... Signal output line, 11... Connection portion, 12... Field insulating film, 13... Semiconductor region for P0 type well potential application, 1
4... Gate insulating film, 15... Interlayer insulating film, 20.
22...Photomask. 21.23...metal pattern, 21A, 23A...
Obtuse angle or circular arc shape, 23C...This is a melted and destroyed corner of a metal pattern.

Claims (1)

[Claims] 1. A photomask characterized in that at least a part of the corners of the semiconductor regions are formed into an obtuse angle or an arc shape within a range where the distance between the semiconductor regions does not become smaller than a predetermined value.