JPS612191A - Partial scrolling circuit for display screen - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a partial scroll circuit for a display screen that can arbitrarily set a partial scroll area on a display screen such as a CRT.
1.

[Technical background of the invention and its problems]

An example of a conventional partial scroll circuit for a display image that moves up and down the display position of a character displayed on a CRT screen by performing a rask scan is shown in FIG.

In Figure 2, a CRT circuit 1 generates a memory address signal a that is sequentially counted up and inputs it to an address selection circuit 2.

An address WRADR for writing to and reading from the display menu 3 is input from the external glossary to the address selection circuit 2, and display data is written and read via the bidirectional buffer 8.

The internal medicine of the J display memory disk of the address corresponding to the display address signal a of the display memory 3 is at L node - Vf a
In response to the recurrent up-down, it is sequentially transferred to register 4, character generator V-5 and video control time h”56.
is displayed on the screen of CRT 7 via.

-, from l-7'', 5 5-character generators, display character code 4 sounds, ROM for generating character patterns to address. Earthquake
98. A string of characters is displayed on the CRT screen in accordance with the serially converted data.

An example of the relationship between the display position of eR'l' 71 and the display memory address a output from the CRT control circuit 1 is shown in FIG.

+33 As shown in the figure, one character position 42 corresponds to one address. For example, if the address in the 1st row and 1st digit is A and r, the address in the 1st row and 2nd floor is A+1, and the following addresses are sequentially is counted up and the final address is A+mX11-1 if it is represented by m digits and n lines.

2 General 42 display screens may require partial scrolling as shown in FIG. 4, but in this case conventionally the 9th
The methods shown in Fig. 6 and Fig. 6 are used.

FIG. 5 shows the case of partial scrolling within the fixed area from the 1st line to the n4th line. When scrolling upward, the display data of the 1st line is transferred to the external memory 21 and the 2nd line of display data is moved to the external memory 21 as shown by the solid line. The eye display data moves to the 1st line, p, and the same moves thereafter, and the external memo I is placed in the final n1 line.
New display data is set from 721.

Conversely, when scrolling downward four spaces, the display data is similarly moved in the order shown by the dotted line.

In addition, FIG. 6 shows that the display data to be scrolled is fixed on the display memory 3, and the display address of the first row and first digit of the display screen is shifted by one line, that is, by m, and the display data is scrolled to a predetermined position on the display screen. is used as a fixed display screen to display non-scrolling display data, but in this case, the display data that should be scrolled is scrolled as a whole, so the non-scrolling display data on the fixed display area 3Y of the display memory 3 is It is necessary to transfer the data to the external memory 21 before scrolling, and after scrolling, replace it with the scroll display data that is in the fixed display area 3Y 1m after scrolling.

If partial scrolling is performed using the conventional method shown in FIG. 5 or 6 above, it requires a lot of software processing and is time consuming.

[Purpose of the invention]

The present invention provides table memory separately for the scroll part and the non-scroll part.
The purpose is to provide a rational display screen partial scrolling circuit that increases the speed of the display and reduces the burden on the software.

[From 1 to 1 to 4 (1 Required) j The present invention is a display system that displays the data in Table 7 memory on the screen according to the l+m order count-up P'/r and the address, and scrolls a part of the image direction. In the screen partial scroll circuit C2, a scroll display memory that stores the front part of the scroll display data, a non-scroll display memory that stores the non-scroll display data, and the number of digits of one line are sequentially added to the display address. an adding circuit that sequentially shifts the address of the scroll display memory displayed at the beginning of the scroll display area on the screen by one line and scrolls the data in the scroll display area on the screen, and the above-mentioned count amplifier. Compare the current display address and the start address of the set non-scroll area, and when they match, switch from the scroll display memory to the non-scroll display memory and store the non-scroll area (1 non-scroll display data) on the screen. It is equipped with a comparison circuit that makes the fixed table 4 smaller, which allows you to arbitrarily set up two scroll areas on the screen, reduce the burden on the software of two external processors, and speed up partial scrolling. This is what I did.

[Embodiments of the invention]

An embodiment of the present invention is shown in FIG.

In the present invention, a display memory 3A for scroll display and a display memory 3B for fixed display are separately provided as display memories, and the data of the non-display memo IJ 3A is displayed on the double concave 7A as shown in FIG. Scroll area X (=, optical memory 3B
data is displayed in the non-scroll area Y, and by specifying the 42 boundary address B, the thickness of the scroll area X can be adjusted.

In other words, in FIG. 1, the CRT control circuit 1 generates a table bore address a that is sequentially counted up in accordance with the display position of the table on the screen, and the address selection circuit 2 traces it to +k.
Address the continuous scroll display memory 3B to M, or use the adder 10r to sequentially add the number m of digits in one line for each scroll,
address.

The switching of the display memories IJBA and 3B is carried out by the output of the comparator circuit 12, and the display memories 3A and 3B are switched.
Then, the output is output around the register 4 (=j) according to each address (==j), and the character generator 5 and the video control circuit 6 are outputted on the CRT 7. It is displayed as a composite image orientation of display X and non-scroll display Y.

The addition value m for each scroll of the path lO can be obtained by setting numerical data m in advance from the CPU 20 to the latch circuit 9 (=Thus, CMD
I is a latch command signal.

Further, the first table bore address B of the non-scroll area Y is set in the comparison circuit 12 via the latch circuit 11, and the display address a that is sequentially counted up is set to B.
When it matches, a switching signal is generated.

For example, when the number of lines on the scroll screen is n, it is sufficient to set A+m'nt as B. This numerical data B can be arbitrarily set from the CPU 20, so the number of lines on the scroll screen, n, can be set arbitrarily. It is possible to set it to . CMD 2 is a latch command signal.

Note that writing and reading of the display data of the display memos 'j3A and 3B is performed via the bidirectional buffer 8 according to the address selection circuit 2≦2 input address ■ΔDR+1.

However, in the non-inventive method, there is no need to transfer the contents of the display memory to an external memory as in the conventional case, and the 'display memo by T'PU 20', 13A, and 3B are not glanced at or read out during display, so the software of the CPU 20 [Effects of the Invention] As explained above, according to the present invention, two sets of display memories are provided, one for scrolling and one for non-scrolling, and the scrolling display on the screen is controlled by the address set from the external processor. The boundary between the area and the non-scroll display area is arbitrarily set (=, the display data in the memory for scrolling is sequentially shifted one line at a time, and the scroll display area (one display is displayed on the screen 1111). The screen partial scroll circuit can speed up partial scrolling by reducing the burden of processor software, and can also realize a rational table in which the scroll display area on the screen can be arbitrarily set.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram showing an embodiment of the present invention, Fig. 2 is a conventional partial scroll circuit diagram, Fig. 3 is a diagram showing the relationship between display position and astringent/ruled memory address, and Fig. 4 is a partial scrolling circuit diagram. Figures 5 and 6 are diagrams showing changes in the display screen due to scrolling. Figures 5 and 6 are diagrams showing data changes in the display memory in the conventional partial scrolling method. <Diagram showing the National Health Insurance of memory and display orientation Ruru 5, I CRT control circuit 2 Address 32 selection circuit 3 Display memory 3A Scroll type non-memory 3B Non-scroll display memory 4 Register 5 Character generator 6 Image iii control circuit 7 CRT 8 Bidirectional buffer 9.11 Latch circuit 0 Addition q1 circuit 11 Comparison circuit m External processor 21 External memory (8733) t”c embedded Patent attorney Yoshiaki Inomata (
(1 other person) Figure 3 Figure 5 Figure 6 Figure 7

Claims (1)

[Claims] A scroll display memory that stores the front part of the scroll display data in a display screen partial scroll circuit that displays data in the display memory on the screen according to display addresses that are sequentially counted up and scrolls a part of the screen. , the non-scroll display memory that stores non-scroll display data, and the address of the scroll display memory that is displayed at the beginning of the scroll display area on the screen by sequentially adding the number of digits in one line to the display address.
an addition circuit that scrolls and displays scroll display data in a scroll display area on the screen by shifting it line by line;
Compare the display address counted up above and the start address of the set non-scroll area, and when they match, switch from scroll display memory to non-scroll display memory and transfer non-scroll display data to the non-scroll area on the screen. A partial scroll circuit for a display screen, comprising a comparison circuit for fixed display.