JPS61214565A - Semiconductor optical sensor device - Google Patents
Semiconductor optical sensor deviceInfo
- Publication number
- JPS61214565A JPS61214565A JP60056510A JP5651085A JPS61214565A JP S61214565 A JPS61214565 A JP S61214565A JP 60056510 A JP60056510 A JP 60056510A JP 5651085 A JP5651085 A JP 5651085A JP S61214565 A JPS61214565 A JP S61214565A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- frame
- sensor device
- bonding
- optical sensor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000003287 optical effect Effects 0.000 title claims description 14
- 239000004065 semiconductor Substances 0.000 title claims description 14
- 239000000758 substrate Substances 0.000 claims abstract description 33
- 239000011521 glass Substances 0.000 claims abstract description 13
- 239000002356 single layer Substances 0.000 claims abstract description 8
- 239000000919 ceramic Substances 0.000 abstract description 32
- 238000005245 sintering Methods 0.000 abstract description 7
- 238000004806 packaging method and process Methods 0.000 abstract description 4
- 239000002184 metal Substances 0.000 abstract description 3
- 238000010276 construction Methods 0.000 abstract 1
- 238000003475 lamination Methods 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 9
- 239000004593 Epoxy Substances 0.000 description 4
- 238000010030 laminating Methods 0.000 description 4
- 238000002844 melting Methods 0.000 description 4
- 230000008018 melting Effects 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 239000005022 packaging material Substances 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0203—Containers; Encapsulations, e.g. encapsulation of photodiodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Facsimile Heads (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の技術分野〕
本発明は半導体光センサ装置、特にＣＣＤセンサにおけ
る外囲器の改良に関する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an improvement of an envelope in a semiconductor optical sensor device, particularly a CCD sensor.
従来、ＣＯＤ （ｃｈａｒｇｅ ｃａｐｐｌｅｄ ｄｅ
ｖｉｃｅ ）のような半導体光センサはセラミック外囲
器に封止した実装形態で用いられている。第２図はセラ
ミック外囲器にパッケージングされた従来のＣＣＤセン
サを示す断面図である。Conventionally, COD (charge coupled de
Semiconductor optical sensors such as those manufactured by VICE) are used in a packaged form sealed in a ceramic envelope. FIG. 2 is a cross-sectional view of a conventional CCD sensor packaged in a ceramic envelope.
同図において、１はセラミック製の外囲器基体である。In the figure, 1 is a ceramic envelope base.
該外囲器基体１にはＣＯＤセンサチップを収容するため
の凹部が形成されている。該凹部は階段状のａＩ壁を有
し、凹部底面および階段上側壁のテラス面にはメタライ
ズ層２１．２２が形成 ゛されている。テラス
面に形成されたメタライズ層２２は、収容されるＣＯＤ
センサチップの内部端子に対応したパターンニングされ
ている。なお、このセラミック基体１は表面にメタライ
ズ対応するメタライズ層２１．２２を形成した二枚のセ
ラミンク基板と、メタライズ層を形成していないセラミ
ック板を積層焼結して製造したものである。A recess is formed in the envelope base 1 to accommodate a COD sensor chip. The recess has a step-like aI wall, and metallized layers 21 and 22 are formed on the bottom surface of the recess and the terrace surface of the upper wall of the step. The metallized layer 22 formed on the terrace surface accommodates the COD
It is patterned to correspond to the internal terminals of the sensor chip. The ceramic substrate 1 is manufactured by laminating and sintering two ceramic substrates, each having a metallized layer 21 and 22 formed thereon, and a ceramic plate having no metallized layer formed thereon.
上記セラミック基体１の凹部底面には、前記メタライズ
１２１上にＣＯＤセンサチップ３がダイボンディングさ
れている。該ＣＯＤセンサチップ３の各内部端子は、ボ
ンディングワイヤ４・・・を介して夫々対応する前記テ
ラス面のメタライズ＠２２・・・に接続されている。ま
た、メタライズ層２２・・・はセラミック基体１の外側
面に露出しており、該露出面に接続されたリードビン５
・・・がセラミック基体１の外側面に固着されている。A COD sensor chip 3 is die-bonded onto the metallization 121 at the bottom of the recess of the ceramic base 1 . Each internal terminal of the COD sensor chip 3 is connected to the corresponding metallization @22 on the terrace surface via bonding wires 4. Further, the metallized layer 22... is exposed on the outer surface of the ceramic base 1, and the lead bin 5 connected to the exposed surface
... are fixed to the outer surface of the ceramic base 1.
更に、ＣＯＤセンサチップ３が収容されたセラミック基
体１の凹部開孔端面には低融点ガラスまたは樹脂等の接
着剤６を介して透明なガラス板７が固着されており、凹
部内に収容されたＣＣＤサンサチツプ３を封止している
。Furthermore, a transparent glass plate 7 is fixed to the open end surface of the recessed portion of the ceramic substrate 1 in which the COD sensor chip 3 is housed via an adhesive 6 such as low melting point glass or resin. The CCD sensor chip 3 is sealed.
上記の構造からなるＣＣＤセンサ装置は、ガラス板６を
透過してくる光をＣＯＤセンサチップ３が検知し１、そ
れによる信号をリードビン５・・・を介して出力するこ
とによりセンサ装置として機能するものである。The CCD sensor device having the above structure functions as a sensor device by having the COD sensor chip 3 detect light passing through the glass plate 6 1 and outputting the resulting signal via the lead bin 5 . It is something.
上記のようにセラミック外囲器を用いてアセンブリーさ
れた従来の半導体光センサ装置は、セラミック基体１が
高価であるため、コストが高くなる問題があった。The conventional semiconductor optical sensor device assembled using the ceramic envelope as described above has a problem of high cost because the ceramic base 1 is expensive.
即ち、従来のセラミック外囲器では、複数枚のセラミッ
ク基板（メタライズ層２１．２２は予め形成しておく）
を積層焼結してセラミック基体１を製造しているため製
造工程が多く、従って高価なものにならざるを得ない。That is, in the conventional ceramic envelope, a plurality of ceramic substrates (the metallized layers 21 and 22 are formed in advance)
Since the ceramic base 1 is manufactured by laminating and sintering the ceramic base 1, there are many manufacturing steps, which inevitably results in an expensive product.
このため、安価な外囲器による半導体光センサ装置が要
望されている。Therefore, there is a demand for a semiconductor optical sensor device with an inexpensive envelope.
本発明は上記事情に鑑みてなされたもので、積層焼結し
て製造された高価な外囲器を用いることなく、安価なパ
ッケージ材料を用いてアセンブリーした半導体光センサ
装置を提供するものである。The present invention has been made in view of the above circumstances, and it is an object of the present invention to provide a semiconductor optical sensor device that is assembled using inexpensive packaging materials without using an expensive envelope manufactured by laminating and sintering. .
本発明による半導体光センサ装置は、表面に配線パター
ンを形成した単層の絶縁基板と、該絶縁基板上にダイボ
ンディングされた半導体光センサチップと、該半導体光
センサチップ表面の内部端子を前記配線パターンのボン
ディング端に接続するボンディングワイヤと、前記配線
パターンのボンディング端外側を取囲んで前記絶縁基板
上に接着立設された絶縁枠と、該絶縁枠の頂面に接着さ
れた透明ガラス板とを具備したことを特徴とするもので
ある。A semiconductor optical sensor device according to the present invention includes a single-layer insulating substrate with a wiring pattern formed on its surface, a semiconductor optical sensor chip die-bonded on the insulating substrate, and an internal terminal on the surface of the semiconductor optical sensor chip connected to the wiring. a bonding wire connected to the bonding end of the pattern; an insulating frame that is adhered and erected on the insulating substrate surrounding the outside of the bonding end of the wiring pattern; and a transparent glass plate that is adhered to the top surface of the insulating frame. It is characterized by having the following.
本発明における前記絶縁基板としては、例えばガラスエ
ポキシ基板、紙エポキシ基板、セラミック基板等を用い
ることができる。これらの安価な単層の絶縁基板を用い
てパッケージングできるため、本発明の半導体光センサ
装置は従来の積層焼結により製造されたセラミック基体
を用いてパッケージングされたものに比較してコストを
著しく低減することができる。As the insulating substrate in the present invention, for example, a glass epoxy substrate, a paper epoxy substrate, a ceramic substrate, etc. can be used. Since the semiconductor optical sensor device of the present invention can be packaged using these inexpensive single-layer insulating substrates, the cost is lower than that of a device packaged using a ceramic substrate manufactured by conventional laminated sintering. can be significantly reduced.
第１図は本発明の一実施例になるＣＣＤセンサ装置を示
す断面図である。同図において、１１は単層のセラミッ
ク基板である。該セラミック基板１１の表面には金属配
線パターン１２・・・が形成され、これら配線パターン
の一端部（ボンディング端）はＣＯＤセンサチップのマ
ウント位置近傍に配置されている。そして、配線パター
ン１２・・・のボンディング端に囲まれたセラミック基
板１１の表面領域には、ＣＯＤセンサチップ１３がダイ
ボンディングされている。該ＣＯＤセンサチップ１３表
面にの内部端子（ポンディングパッド）は、ボンディン
グワイヤ１４・・・を介して夫々対応する配線パターン
１２・・・のボンディング端に接続されている。他方、
１５はセラミックでできた筒状の絶縁枠で、前記ボンデ
ィング端の外側を取囲んで設けられ、且つ低融点ガラス
層１６により絶縁基板１１上に接着固定されている。更
に、この絶縁枠１６の上方解放端は、低融点ガラス層１
６を介して絶縁枠１６の頂面に接着された透明なガラス
板１７によって封止されている。FIG. 1 is a sectional view showing a CCD sensor device according to an embodiment of the present invention. In the figure, 11 is a single-layer ceramic substrate. Metal wiring patterns 12 are formed on the surface of the ceramic substrate 11, and one end (bonding end) of these wiring patterns is arranged near the mounting position of the COD sensor chip. A COD sensor chip 13 is die-bonded to the surface area of the ceramic substrate 11 surrounded by the bonding ends of the wiring patterns 12 . Internal terminals (bonding pads) on the surface of the COD sensor chip 13 are connected to bonding ends of the corresponding wiring patterns 12 via bonding wires 14. On the other hand,
A cylindrical insulating frame 15 made of ceramic is provided surrounding the outside of the bonding end, and is adhesively fixed onto the insulating substrate 11 by a low melting point glass layer 16. Further, the upper open end of the insulating frame 16 is connected to the low melting point glass layer 1.
It is sealed by a transparent glass plate 17 that is adhered to the top surface of the insulating frame 16 via the insulating frame 16.
なお、前記絶縁枠の外側に延出した配線パターン１２・
・・の端部は、セラミック基板１１を貫通して設けられ
たスルホール１８・・・を介してセラミック基板１１の
裏面に取出され、端子１９・・・が形成されている。従
って、このＣＣＤセンサ装置をプリント配線基板に実装
する際には、端子１９・・・を配線基板上の端子に半田
付けしてもよく、またスルホール１８・・・にリードビ
ンを挿着すれば配線基板に設けたソケットに挿入して実
装することもできる。Note that the wiring pattern 12 extending outside the insulating frame
The ends of the terminals 19 are taken out to the back surface of the ceramic substrate 11 through through holes 18 provided through the ceramic substrate 11, and terminals 19 are formed therein. Therefore, when mounting this CCD sensor device on a printed wiring board, the terminals 19... may be soldered to the terminals on the wiring board, and if lead bins are inserted into the through holes 18... It can also be mounted by inserting it into a socket provided on the board.
上記実施例のＣＣＤセンサ装置は、第２図の従来の装置
のように高価な積層焼結によるセラミック基体を用いず
、単層のセラミック基板１１と絶縁枠１５を用いてパッ
ケージングを行っているから、パッケージコストを従来
よりも大幅に低減することができる。The CCD sensor device of the above embodiment is packaged using a single-layer ceramic substrate 11 and an insulating frame 15, instead of using an expensive ceramic substrate formed by laminated sintering as in the conventional device shown in FIG. Therefore, packaging costs can be significantly reduced compared to conventional methods.
また、上記実施例のＣＣＤセンサ装置では、その製造に
際して絶縁枠１５が存在しない状態でワイヤボンディン
グを行うことができるため作業性が良好となり、生産性
を向上することができる。Further, in the CCD sensor device of the above embodiment, wire bonding can be performed in the absence of the insulating frame 15 when manufacturing the CCD sensor device, so that workability is improved and productivity can be improved.
なお、上記実施例におけるセラミック基板１１の代りに
、例えばガラスエポキシ基板や紙エポキシ基板等のより
安価な絶縁材料を用いることにより、コストを更に低減
することができる。絶縁枠１５についても同様である。Note that the cost can be further reduced by using a cheaper insulating material such as a glass epoxy substrate or a paper epoxy substrate in place of the ceramic substrate 11 in the above embodiment. The same applies to the insulating frame 15.
以上詳述したように、本発明によれば積層焼結して製造
された高価なセラミック外囲器を用いることなく、安価
なパッケージ材料を用いてアセンブリーすることにより
パッケージコストを著しく低減した半導体光センサ装置
を提供できるものである。As described in detail above, according to the present invention, a semiconductor optical device that significantly reduces package cost by assembling an inexpensive package material without using an expensive ceramic envelope manufactured by laminating and sintering. It is possible to provide a sensor device.
第１図は本発明の一実施例になるＣＣＤセンサ装置を示
す断面図、第２図は従来のセラミック外囲器によるＣＣ
Ｄセンサ装置を示す断面図である。
１１・・・単層セラミック基板、１２・・・金属配線パ
ターン、１３・・・ＣＯＤセンサチップ、１４・・・ボ
ンディングワイヤ、１５・・・絶縁枠、１６・・・低融
点ガラス層、１７・・・透明ガラス板、１８・・・スル
ホール、１９・・・端子。FIG. 1 is a sectional view showing a CCD sensor device according to an embodiment of the present invention, and FIG. 2 is a cross-sectional view showing a CCD sensor device using a conventional ceramic envelope.
It is a sectional view showing a D sensor device. DESCRIPTION OF SYMBOLS 11... Single layer ceramic board, 12... Metal wiring pattern, 13... COD sensor chip, 14... Bonding wire, 15... Insulating frame, 16... Low melting point glass layer, 17... ...Transparent glass plate, 18...Through hole, 19...Terminal.
Claims (1)
絶縁基板上にダイボンディングされた半導体光センサチ
ップと、該半導体光センサチップ表面の内部端子を前記
配線パターンのボンデイング端に接続するボンディング
ワイヤと、前記配線パターンのボンディング端外側を取
囲んで前記絶縁基板上に接着立設された絶縁枠と、該絶
縁枠の頂面に接着された透明ガラス板とを具備したこと
を特徴とする半導体光センサ装置。A single-layer insulating substrate with a wiring pattern formed on its surface, a semiconductor optical sensor chip die-bonded onto the insulating substrate, and a bonding wire that connects an internal terminal on the surface of the semiconductor optical sensor chip to a bonding end of the wiring pattern. A semiconductor comprising: an insulating frame that is adhesively erected on the insulating substrate so as to surround the outside of the bonding end of the wiring pattern; and a transparent glass plate that is adhered to the top surface of the insulating frame. Optical sensor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60056510A JPS61214565A (en) | 1985-03-20 | 1985-03-20 | Semiconductor optical sensor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60056510A JPS61214565A (en) | 1985-03-20 | 1985-03-20 | Semiconductor optical sensor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61214565A true JPS61214565A (en) | 1986-09-24 |
Family
ID=13029121
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60056510A Pending JPS61214565A (en) | 1985-03-20 | 1985-03-20 | Semiconductor optical sensor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61214565A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04120248U (en) * | 1991-04-12 | 1992-10-27 | 京セラ株式会社 | Package cage for storing solid-state image sensor |
| JP2002118191A (en) * | 2000-10-10 | 2002-04-19 | Sanyo Electric Co Ltd | Semiconductor device and method of manufacturing the same |
| US7816750B2 (en) | 2007-07-24 | 2010-10-19 | Aptina Imaging Corporation | Thin semiconductor die packages and associated systems and methods |
| US8933386B2 (en) | 2011-11-10 | 2015-01-13 | Seiko Instruments Inc. | Optical sensor device and method of manufacturing the same |
| US10074599B2 (en) | 2007-07-24 | 2018-09-11 | Micron Technology, Inc. | Semiconductor dies with recesses, associated leadframes, and associated systems and methods |
-
1985
- 1985-03-20 JP JP60056510A patent/JPS61214565A/en active Pending
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04120248U (en) * | 1991-04-12 | 1992-10-27 | 京セラ株式会社 | Package cage for storing solid-state image sensor |
| JP2002118191A (en) * | 2000-10-10 | 2002-04-19 | Sanyo Electric Co Ltd | Semiconductor device and method of manufacturing the same |
| JP4565728B2 (en) * | 2000-10-10 | 2010-10-20 | 三洋電機株式会社 | Medium airtight package type semiconductor device |
| US7816750B2 (en) | 2007-07-24 | 2010-10-19 | Aptina Imaging Corporation | Thin semiconductor die packages and associated systems and methods |
| US10074599B2 (en) | 2007-07-24 | 2018-09-11 | Micron Technology, Inc. | Semiconductor dies with recesses, associated leadframes, and associated systems and methods |
| US10431531B2 (en) | 2007-07-24 | 2019-10-01 | Micron Technology, Inc. | Semiconductor dies with recesses, associated leadframes, and associated systems and methods |
| US8933386B2 (en) | 2011-11-10 | 2015-01-13 | Seiko Instruments Inc. | Optical sensor device and method of manufacturing the same |
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