JPS61210682A - Photovoltaic device - Google Patents
Photovoltaic deviceInfo
- Publication number
- JPS61210682A JPS61210682A JP61035595A JP3559586A JPS61210682A JP S61210682 A JPS61210682 A JP S61210682A JP 61035595 A JP61035595 A JP 61035595A JP 3559586 A JP3559586 A JP 3559586A JP S61210682 A JPS61210682 A JP S61210682A
- Authority
- JP
- Japan
- Prior art keywords
- film
- photoelectric conversion
- electrode film
- films
- semiconductor film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000006243 chemical reaction Methods 0.000 claims abstract description 47
- 239000004065 semiconductor Substances 0.000 claims abstract description 46
- 239000000758 substrate Substances 0.000 claims abstract description 15
- 239000010410 layer Substances 0.000 description 17
- 238000000034 method Methods 0.000 description 12
- 239000010936 titanium Substances 0.000 description 7
- 238000009413 insulation Methods 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 4
- 229920002120 photoresistant polymer Polymers 0.000 description 4
- 229910021417 amorphous silicon Inorganic materials 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 238000001020 plasma etching Methods 0.000 description 3
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 230000007797 corrosion Effects 0.000 description 2
- 238000005260 corrosion Methods 0.000 description 2
- 239000000428 dust Substances 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000001259 photo etching Methods 0.000 description 2
- 238000000926 separation method Methods 0.000 description 2
- 239000002356 single layer Substances 0.000 description 2
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 2
- 229910001887 tin oxide Inorganic materials 0.000 description 2
- KZBUYRJDOAKODT-UHFFFAOYSA-N Chlorine Chemical compound ClCl KZBUYRJDOAKODT-UHFFFAOYSA-N 0.000 description 1
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 230000003213 activating effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- ZOCHARZZJNPSEU-UHFFFAOYSA-N diboron Chemical compound B#B ZOCHARZZJNPSEU-UHFFFAOYSA-N 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000010248 power generation Methods 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- 150000003377 silicon compounds Chemical class 0.000 description 1
- MZFIXCCGFYSQSS-UHFFFAOYSA-N silver titanium Chemical compound [Ti].[Ag] MZFIXCCGFYSQSS-UHFFFAOYSA-N 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/042—PV modules or arrays of single PV cells
- H01L31/0445—PV modules or arrays of single PV cells including thin film solar cells, e.g. single thin film a-Si, CIS or CdTe solar cells
- H01L31/046—PV modules composed of a plurality of thin film solar cells deposited on the same substrate
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
Landscapes
- Life Sciences & Earth Sciences (AREA)
- Sustainable Development (AREA)
- Engineering & Computer Science (AREA)
- Sustainable Energy (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Photovoltaic Devices (AREA)
Abstract
Description
【発明の詳細な説明】
（イ）産業上の利用分野
本発明は半導体膜を光活性層とする光起電力装置に関す
る。DETAILED DESCRIPTION OF THE INVENTION (a) Industrial Application Field The present invention relates to a photovoltaic device using a semiconductor film as a photoactive layer.
（口〉 従来の技術
第２図は既に実用化されている太陽電池の基本構造を示
し、（１）はガラス、耐熱プラスチック等の絶縁性且つ
透光性を有する基板、（２ａ）（２ｂ）（２ｃ）・・・
は基板（１）上に一定間隔で被着きれた透明導電膜、（
３ａ）（３ｂ）（３ｃ）・・・は各透明導電膜上に重畳
被着された非晶質シリコン等の非晶質半導体膜、（４ａ
）（４ｂ）（４ｃ）・・・は各非晶質半導体膜上に重畳
被着され、かつ各右隣りの透明導電膜（２ｂ）（２ｃ）
・・・に部分的に重畳せる裏面電極膜である。(Example) Conventional technology Figure 2 shows the basic structure of a solar cell that has already been put into practical use. (1) is an insulating and translucent substrate made of glass, heat-resistant plastic, etc.; (2c)...
is a transparent conductive film deposited on the substrate (1) at regular intervals, (
3a) (3b) (3c)... are amorphous semiconductor films such as amorphous silicon superimposed on each transparent conductive film, (4a
) (4b) (4c)... are superimposed and deposited on each amorphous semiconductor film, and are transparent conductive films (2b) (2c) on the right side of each film.
It is a back electrode film that can be partially overlapped with...
各非晶質半導体膜（３ａ）（３ｂＨ３ｃ）・・・は、そ
の内部に例えば膜面に平行なＰＩＮ接合を含み、従って
透光性基板（１）及び透明導電膜（２ａ）（２ｂ）（２
ｃ）・・・を順次弁して光入射があると、光起電力を発
生する。各非晶質半導体膜（３ａ）（３ｂ）（３ｃ）・
・・内で発生した光起電力は裏面電極膜（４ａ）（４ｂ
）（４ｃ）での接続により直列的に相加きれる。Each amorphous semiconductor film (3a) (3bH3c)... includes, for example, a PIN junction parallel to the film surface inside thereof, and therefore the transparent substrate (1) and the transparent conductive film (2a) (2b) ( 2
c) When light is incident by sequentially activating the valves, a photovoltaic force is generated. Each amorphous semiconductor film (3a) (3b) (3c)
...The photovoltaic force generated within the back electrode film (4a) (4b
) (4c) allows them to be added in series.
この様な装置において、光利用効率を左右する一つの要
因は、装置全体の受光面積（即ち、基板面積）に対し、
実際に発電に寄与する非晶質半導体膜（３ａＨ３ｂ）（
３ｃ）・・・の総面積の占める割合いである。然るに、
各非晶質半導体膜（３ａ）（３ｂ）（３ｃ）・・・の隣
接間に必然的に存在する非晶質半導体のない領域（図中
符号ＮＯＮで示す領域）は上記面積割合いを低下させる
。In such devices, one factor that affects the light utilization efficiency is the light receiving area (i.e. substrate area) of the entire device.
Amorphous semiconductor film (3aH3b) that actually contributes to power generation (
3c) It is the proportion of the total area of... However,
The area without an amorphous semiconductor (the area indicated by the symbol NON in the figure) that inevitably exists between adjacent amorphous semiconductor films (3a), (3b, 3c), etc. reduces the above-mentioned area ratio. let
従って光利用効率を向上するには、まず透明導電膜（２
ａ）（２ｂ）（２ｃ）・・・の隣接間隔を小さくし、
゛そして非晶質半導体膜（３ａ）（３ｂ）（３ｃ）・
・・の隣接間隔を小さくせねばならない。この様な間隔
縮小は６膜の加工精度で決まり、従って、従来は細密加
工性に優れている写真蝕刻技術が用いられている。この
技術による場合、基板（１）止金面への透明導電膜の被
着工程と、フォトレジスト及びエツチングによる各個別
の透明導電膜（２ａ）（２ｂ）（２ｃ）・・・の分離、
即ち、各透明導電膜（２ａ）（２ｂ）（２ｃ）・・・の
隣接間隔部分の除去工程と、これら各透明導電膜上を含
む基板（１）止金面への非晶質導体膜の被着工程と、フ
ォトレジスト及びエツチングによる各個別の非晶質半導
体膜（３ａ）（３ｂ）（３ｃ）・・・の分離、即ち、各
非晶質半導体膜（３ａ）（３ｂ）（３ｃ）・・・の隣接
間隔部分の除去工程とを順次繰ることになる。Therefore, in order to improve the light utilization efficiency, first the transparent conductive film (2
a) Reduce the adjacent spacing of (2b) (2c)...
゛And amorphous semiconductor films (3a) (3b) (3c)・
... must be made smaller. Such a reduction in the spacing is determined by the processing accuracy of the six films, and therefore, conventionally, photolithographic technology, which has excellent precision processing properties, has been used. In the case of this technique, the step of applying a transparent conductive film to the clasp surface of the substrate (1), the separation of each individual transparent conductive film (2a) (2b) (2c)... by photoresist and etching,
That is, the process of removing the adjacent spaced parts of each transparent conductive film (2a), (2b, 2c), etc., and the process of removing the amorphous conductive film on the clasp surface of the substrate (1) including the top of each of these transparent conductive films. Deposition process and separation of each individual amorphous semiconductor film (3a) (3b) (3c)... by photoresist and etching, that is, each amorphous semiconductor film (3a) (3b) (3c) . . . The steps of removing the adjacent spaced portions are sequentially repeated.
しかし乍ら、写真蝕刻技術は細密加工の上で優れてはい
るが、蝕刻パターンを規定するフォトレジストのピンホ
ールや周縁での剥れにより非晶質半導体膜に欠陥を生じ
させやすい。However, although photo-etching technology is excellent in terms of fine processing, it tends to cause defects in the amorphous semiconductor film due to pinholes or peeling at the periphery of the photoresist that defines the etching pattern.
特開昭５７−１２５６８号公報に開示きれた先行技術は
、レーザビームの照射による膜の焼き切りで上記隣接間
隔を設けるものであり、写真蝕刻技術で必要なフォトレ
ジスト、即ちウェットプロセスを一切使わず細密加工性
に富むその技法は上記の課題を解決する上で極めて有効
である。The prior art disclosed in Japanese Unexamined Patent Publication No. 57-12568 provides the above-mentioned adjacent spacing by burning out the film by laser beam irradiation, and does not use any photoresist, that is, a wet process, which is required in photoetching technology. This technique, which is highly capable of fine processing, is extremely effective in solving the above problems.
一方、第３図に示す如く、各光電変換素子（５ａ）（５
ｂ）・・・に連続して被着きれた非晶質半導体膜（３）
を各素子（５ａ）（５ｂ）・・・毎に分割するに先立っ
て直ちに裏面電極膜（４１）を上記各半導体膜（３）止
金面に予め積層被着する工程を含む製造方法が提案きれ
た。即ち、非晶質半導体膜（３）を分割せしめる工程後
裏面電極膜を被着せしめたのでは両者の接合界面に塵埃
や、写真蝕刻技術用した水分停が介在することがあり、
斯る介在物を原因として発生していた裏面電極膜（４ａ
）（４ｂ）の剥離や腐蝕自己を抑圧することができる。On the other hand, as shown in FIG. 3, each photoelectric conversion element (5a) (5
b) Amorphous semiconductor film (3) continuously deposited on...
A manufacturing method is proposed that includes a step of laminating and depositing a back electrode film (41) on the clasp surface of each of the semiconductor films (3) immediately before dividing into each element (5a), (5b)... I'm done. That is, if the back electrode film is applied after the step of dividing the amorphous semiconductor film (3), dust or water retention due to photolithography may be present at the bonding interface between the two.
The back electrode film (4a
) (4b) peeling and corrosion can be suppressed.
この様に、レーザビームを使用してパターニングを行な
うことにより、光電変換に寄与しない無効領域の減少は
図れるものの、斯る無効領域の減少が図られた透明導電
膜（２ａ）（２ｂ）（２ｃ）・・・の分割溝（７）（７
）・・・内に第２図に示す如く左隣りの光電変換素子（
５ａ）（５ｂ）−の裏面電極膜（４ａ）（４ｂ’）が右
隣りの光電変換素子（５ｂ）（５ｃ）・・・と電気的に
結合すべく延在し位置すると、隣接せる透明導電膜（２
ａ）（２ｂ）、（２ｂ）（２ｃ）、・・・の絶縁間隔Ｗ
１は上記裏面電極膜（４ａ）（４ｂ）・・・の埋入によ
′す、この裏面電極膜（４ａ）、（４ｂ）、・・・と一
方の透明導電膜（２ａ）、（２ｂ〉、・・・との間隔で
あるＷ２に極めて縮小することになる。斯る絶縁間隔の
縮小は両透明導電膜（２ａＨ２ｂ）、（２ｂ）（２ｃ）
、・・・間にリーク電流が発生する原因となる。In this way, by patterning using a laser beam, it is possible to reduce the ineffective area that does not contribute to photoelectric conversion, but the transparent conductive film (2a) (2b) (2c) in which the ineffective area is reduced is )... dividing groove (7) (7
)... As shown in Figure 2, the photoelectric conversion element on the left (
When the back electrode films (4a) (4b') of 5a) (5b)- are extended and positioned to electrically couple with the photoelectric conversion elements (5b) (5c) on the right, the adjacent transparent conductive Membrane (2
a) Insulation interval W of (2b), (2b) (2c), ...
1 indicates the back electrode films (4a), (4b), etc. and one transparent conductive film (2a), (2b) by embedding the back electrode films (4a), (4b), etc. 〉, .
, . . . causes leakage current to occur between them.
一方、隣接せる光電変換素子（５ａ）（５ｂ）（５ｃ）
・・・同士□を電気的に直列接続すべく透明導電膜（２
ｂ）（２ｃ）・・・を露出せしめる工程、即ち少なくと
も半導体膜（３）を除去する工程にレーザビームを使用
した場合、半導体膜（３）を幅狭く除去し、透明導電膜
（２ｂ）（２ｃ）・・・を露出せしめることができ無効
領域の減少が図れる。On the other hand, adjacent photoelectric conversion elements (5a) (5b) (5c)
...A transparent conductive film (2
b) When a laser beam is used in the step of exposing (2c)..., that is, the step of removing at least the semiconductor film (3), the semiconductor film (3) is removed narrowly and the transparent conductive film (2b) ( 2c)... can be exposed, and the ineffective area can be reduced.
しかし、この透明導電膜（２ｂ）（２ｃ）・・・の露出
部分は、上述の如く隣接せる光電変換素子（５ａ）（５
ｂ）（５ｃ）・・・同士の接続に利用される部分であり
、この露出長が狭くなると、斯る接続部分に於ける直列
抵抗成分の増加を招くために所定の露出長が必要となる
。従って、除去幅の縮幅が図れるレーザビームを使用す
ると所定の露出長を得るために多数回走査しなければな
らないこともあり、その場合作業性が低下する。However, as described above, the exposed portions of the transparent conductive films (2b) (2c)...
b) (5c)...This is the part used for connection between the two, and if this exposed length becomes narrower, the series resistance component in such a connecting part will increase, so a certain exposed length is required. . Therefore, if a laser beam capable of reducing the removal width is used, it may be necessary to perform multiple scans in order to obtain a predetermined exposure length, which reduces work efficiency.
（ハ）発明が解決しようとする問題点
本発明は上記レーザビームやその他寛子ビーム等のエネ
ルギビームを使用してパターニングした光起電力装置に
於いて、基板側に設けられた透明導電膜の如き第１電極
膜間の絶縁間隔の縮小によるリーク電流の発生と、作業
性の欠如を解決しようとするものである。(c) Problems to be Solved by the Invention The present invention is directed to a photovoltaic device patterned using the above-mentioned laser beam or other energy beams such as a Hiroko beam, such as a transparent conductive film provided on the substrate side. This is intended to solve the problem of leakage current caused by a reduction in the insulation interval between the first electrode films and the lack of workability.
（ニ） 問題点を解決するための手段本発明は上記問
題点を解決するために、個別の光電変換素子を構成する
半導体膜及び第２電極膜の積層体を、光電変換素子の隣
接間隔部の第１電極膜上に於いてエネルギビームの照射
により除去し各領域毎に分割すると共に隣接した一方の
光電変換素子を構成する半導体膜を、第１電極膜間の分
割溝を埋めて他方の光電変換素子の第１電極膜上にまで
延在せしめると共に、隣接光電変換素子を電気的に直列
接続する第３電極膜を、上記一方の光電変換素子の第２
電極膜と連結し上記エネルギビームの照射により露出せ
しめられた。他方の光電変換素子の第１電極膜部分全面
と結合することを特徴とする。(d) Means for Solving the Problems In order to solve the above problems, the present invention provides a stacked body of a semiconductor film and a second electrode film constituting an individual photoelectric conversion element in adjacent spaced parts of the photoelectric conversion element. The first electrode film is removed by irradiation with an energy beam and divided into each region, and the semiconductor film constituting one adjacent photoelectric conversion element is filled in the dividing groove between the first electrode films to separate the other. A third electrode film that extends over the first electrode film of the photoelectric conversion element and electrically connects adjacent photoelectric conversion elements in series is attached to the second electrode film of one of the photoelectric conversion elements.
It was connected to the electrode film and exposed by irradiation with the energy beam. It is characterized in that it is coupled to the entire first electrode film portion of the other photoelectric conversion element.
（ホ）作用
上述の如く第１電極膜間の分割溝を埋める半導体膜は、
上記第１電極膜間の絶縁間隔に導電体が侵入し絶縁間隔
を縮小せしめる危惧を回避し得ると共に、エネルギビー
ムの照射部分は隣接光電変換素子の電気的接続箇所の第
１電極膜上であり、しかも露出せしめられた第１電極膜
部分全面は有効に上記電気的接続に利用される。(E) Function As mentioned above, the semiconductor film filling the dividing groove between the first electrode films is
It is possible to avoid the risk of the conductor entering into the insulation gap between the first electrode films and reducing the insulation gap, and the irradiation portion of the energy beam is on the first electrode film at the electrical connection point of the adjacent photoelectric conversion element. Moreover, the entire exposed first electrode film portion can be effectively utilized for the above-mentioned electrical connection.
（へ）実施例
第１図は本発明光起電力装置の要部拡大断面図であって
、２つの光電変換素子（５ａ）（５ｂ）を電気的に直列
接続する隣接間隔部（６）を中心に描いである。即ち、
絶縁性且つ透光性を有する基板（１）の−主面上に於け
る複数の領域に、第１電極膜を司どる透明導電膜（２ａ
Ｈ２ｂ）・・・と、膜面に平行なＰＩＮ接合を備えた非
晶質半導体膜（３ａ）（３ｂ）・・・と、第２電°極膜
を司どる第１裏面電極膜（４Ｘａ）（４１ｂ＞・・・と
をこの順序で積層した光電変換素子（５ａ）（５ｂ）・
・・が分割配置きれていると共に、それら光電変換素子
Ｃ３ａ）（５ｂ）・・・は当該素子（５ａ）（５ｂ）間
の隣接間隔部（６）に於いて電気的に直列−８＝
接続されている。斯る光電変換素子（５ａ）（５ｂ）・
・・の電気的直列接続形態は、第１図から明らかな如く
基板（１）の−主面上に於いて各光電変換素子（５ａ）
（５ｂ）・・・毎に絶縁間隔Ｗ１を有する分割溝（７）
・・・を隔てて酸化スズ、酸化インジウムスズ等の単層
或いは積層構造からなる透明導電膜（２ａ）（２ｂ）・
・・が分割配置きれ、この透明導電膜（２ａ）（２ｂ）
・・・間の上記分割溝（７）・・・を、一方（左隣り）
の光電変換素子（５ａ）を構成する半導体膜（３ａ）が
埋めて、他方（右隣り）の透明導電膜（２ｂ）上にまで
延び、そしてレーザビームの如きエネルギビームの照射
により露出せしめられた上記他方の透明導電膜（２ｂ）
上に、Ｌ記一方の光電変換素子（５ａ）の半導体膜（３
ａ）と第１裏面電極膜＜４１ａ）の積層体を越えて第１
裏面電極膜＜４１ａ＞と共に裏面電極膜（４ａ）を構成
し第３電極膜を司どる第２裏面電極膜（４２ａ）が延在
することによって実現し′ている。(f) Example FIG. 1 is an enlarged cross-sectional view of the main part of the photovoltaic device of the present invention, showing an adjacent spaced part (6) that electrically connects two photoelectric conversion elements (5a) (5b) in series. It is drawn in the center. That is,
A transparent conductive film (2a
H2b)..., an amorphous semiconductor film (3a) (3b)... having a PIN junction parallel to the film surface, and a first back electrode film (4Xa) that controls the second electrode film. (41b>...) are laminated in this order (5a), (5b),
... are arranged in a divided manner, and the photoelectric conversion elements C3a) (5b) ... are electrically connected in series at the adjacent spacing (6) between the elements (5a) (5b). has been done. Such photoelectric conversion elements (5a) (5b)・
As is clear from FIG. 1, in the electrical series connection form, each photoelectric conversion element (5a) is
(5b)...Divided grooves (7) each having an insulation interval W1
Transparent conductive films (2a) (2b) consisting of a single layer or a laminated structure of tin oxide, indium tin oxide, etc.
... can be divided and arranged, and these transparent conductive films (2a) (2b)
...The above dividing groove (7) between... on one side (left side)
The semiconductor film (3a) constituting the photoelectric conversion element (5a) is buried, extends onto the other (adjacent to the right) transparent conductive film (2b), and is exposed by irradiation with an energy beam such as a laser beam. The other transparent conductive film (2b)
Above, the semiconductor film (3) of one photoelectric conversion element (5a) shown in L
a) and the first back electrode film <41a).
This is realized by extending the second back electrode film (42a) which constitutes the back electrode film (4a) together with the back electrode film <41a> and controls the third electrode film.
斯る透明導電膜（２ａ）＜２ｂ）の分割溝（７）に一方
の光電変換素子（５ａ）を構成する半導体膜（３ａ）を
埋入ゼしぬ、他方の光電変換素子（５ｂ）の透明導電膜
（２ｂ〉上にまで至ると共に、第２裏面電極膜（４２ａ
）がその透明導電膜（２ｂ）の露出部分〈８〉と全面的
に結合した光起電力装置の好適な製造方法を第３図乃至
第６図を参照して詳述すると、第４図の工程以前にあっ
ては従来と同じ第３図の工程が施妨れる。即ち、第３図
の工程では既に絶縁性且つ透光性を有する基板（１）の
−主面上に於いて各光電変換素子（５ａ）（５ｂ）・・
・毎に分割された酸化スズ、酸化インジウムスズ等の単
層或いは積層構造から成る透明導電膜（２ａ）（２ｂ）
・・・を連続的に覆う如く非晶質シリコン系の非晶質半
導体膜（３）及び第１裏面電極膜（４１）が被着される
。より詳しくは非晶質半導体膜（３）が水素化非晶質シ
リコンであって、光入射側から膜面に平行なＰＩＮ接合
を 。The semiconductor film (3a) constituting one photoelectric conversion element (5a) is not embedded in the dividing groove (7) of such a transparent conductive film (2a) < 2b), and the other photoelectric conversion element (5b) is It extends over the transparent conductive film (2b) and also extends over the second back electrode film (42a).
) is fully combined with the exposed portion <8> of the transparent conductive film (2b). Before the process, the process shown in FIG. 3, which is the same as the conventional process, is interrupted. That is, in the process shown in FIG. 3, each photoelectric conversion element (5a) (5b)...
・Transparent conductive film (2a) (2b) consisting of a single layer or laminated structure of tin oxide, indium tin oxide, etc.
An amorphous silicon-based amorphous semiconductor film (3) and a first back electrode film (41) are deposited so as to continuously cover . More specifically, the amorphous semiconductor film (3) is hydrogenated amorphous silicon, and a PIN junction parallel to the film surface is formed from the light incident side.
備えている場合、先ずシリコン化合物雰囲気例えばシラ
ン（Ｓ ｉ Ｈ斗）ガス雰囲気にＰ型決定不純物を含む
ジボラン（Ｂ２Ｈ６）を添加しグロー放電を生起せしめ
ることにより膜厚５０人〜２００人程度のＰ型層を形成
し、次いで順次ＳｉＨキガスのみにより膜厚４０００〜
６０００人程度の真性（Ｉ型）層とＳ ｉ Ｈ４ガスに
Ｎ型決定不純物を含むホスフィン（ＰＨ３）を添加し膜
厚１００人〜５００人程度のＮ型層とが積層被着される
。斯る非晶質半導体膜（３）形成後該半導体膜（３）上
への塵埃の付着等を防止すへ＜ ２０００Ａ〜１牌程度
のアルミニウム（Ａ Ｉ２ ）から成る第１の裏面電極
膜（４１）が直ちに蒸着きれる。If so, first add diborane (B2H6) containing a P-type determining impurity to a silicon compound atmosphere, such as a silane (SiH) gas atmosphere, and generate a glow discharge to form a P film with a thickness of about 50 to 200. A mold layer is formed, and then a film thickness of 4000~
An intrinsic (I-type) layer of about 6,000 layers and an N-type layer of about 100 to 500 layers thick by adding phosphine (PH3) containing an N-type determining impurity to SiH4 gas are deposited. After forming such an amorphous semiconductor film (3), in order to prevent dust from adhering to the semiconductor film (3), a first back electrode film (made of aluminum (AI2) of about 2000A to 1 tile) is formed. 41) can be immediately deposited.
第４図の工程では、隣接光電変換素子（５ａ）（５ｂ）
・・・の直列接続が行なわれる隣接間隔部（６）・・・
の非晶質半導体膜（３）′・・・及び第１裏面電極膜（
４１） ’が矢印で示す如き基板（１）の他方の主面側
からレーザビームの照射により除去されて、個別の各非
晶質半導体膜（３ａ）（３ｂ）・・・及び第１裏面電極
膜（４１ａ）（４１ｂ）・・−が各光電変換素子（５ａ
）（５ｂ＞−・・毎に分割形成される。使用浮れるレー
ザは例えば波長１．０６−、パルス周波数３ＫＨｚのＮ
ｄ：ＹＡＧレーザであり、そのエネルギ密度は２×１０
７Ｗ／ｃｍ２になるべくレーザビーム径が調整きれてい
る。このレーザビームの照射により隣接間隔部（６）の
距離（Ｌｌ）は約３００側〜５００ＩＪＴ１１に設定さ
れる。In the process shown in FIG. 4, adjacent photoelectric conversion elements (5a) (5b)
Adjacent spacing section (6) where series connection of ... is carried out...
amorphous semiconductor film (3)′... and the first back electrode film (
41) The individual amorphous semiconductor films (3a), (3b), etc. and the first back electrode are removed by laser beam irradiation from the other main surface side of the substrate (1) as indicated by the arrow '' Films (41a) (41b)...- are attached to each photoelectric conversion element (5a
) (5b>-... The laser that can be used is, for example, an N laser with a wavelength of 1.06- and a pulse frequency of 3 KHz.
d: YAG laser, its energy density is 2×10
The laser beam diameter has been adjusted to 7 W/cm2. By irradiating this laser beam, the distance (Ll) between the adjacent spacing portions (6) is set to approximately 300 to 500 IJT11.
斯るレーザビームの照射はレーザビームの照射方向が除
去すべき隣接間隔部（６）・・・の露出面側、即ち第１
裏面電極膜（４１）’側からではなく透明導電膜（２ａ
Ｈ２ｂ）・・・との被着界面側である非晶質半導体膜（
３）′・・・側からなるべく基板（１）の他方の主面側
から為されている。そして、レーザビームは、透明導電
膜（２ａ）（２ｂ）の分割溝（７）に一方の光電変換素
子（５ａ）の半導体膜（３ａ）を埋入せしめると共に、
その終端を他方の透明導電膜（２ｂ）上にまで延在せし
めるべく、隣接間隔部（６）に位置する透明導電膜（２
ｂ）上の非晶質半導体膜（３）′に対して照射される。The irradiation direction of the laser beam is directed toward the exposed surface side of the adjacent gap portion (6) to be removed, that is, the first
from the back electrode film (41)' side, but from the transparent conductive film (2a
H2b)... The amorphous semiconductor film (
3)'... side, preferably from the other main surface side of the substrate (1). Then, the laser beam embeds the semiconductor film (3a) of one of the photoelectric conversion elements (5a) into the dividing grooves (7) of the transparent conductive films (2a) and (2b), and
In order to extend the terminal end onto the other transparent conductive film (2b), the transparent conductive film (2b) located at the adjacent interval (6)
b) The amorphous semiconductor film (3)' on top is irradiated.
続く第５図の工程では、基板（１）の他方の主面側から
のレーザビームの照射により隣接間隔部（６）が除去さ
れた複数の光電変換素子（５ａＨ，５ｂ）・・・毎に分
割きれた第１裏面電極膜（４１ａ）（４１ｂ＞・・・上
及び隣接間隔部（６）に於いて露出状態にある透明導電
膜（２ａ）（２ｂ）・・・を連続的に覆うべく、膜厚数
１０００人程度０チタン（Ｔｉ）或いはチタン銀（Ｔｉ
Ａｇ）と、膜厚数１０００人のＡρと、更に膜厚数１０
００人〜５０００人のＴｉ或いはＴｉＡｇの三層構造の
第２裏面電極膜（４２）が重畳被着される。上記一層目
、三層目のＴｉ或いはＴｉＡｇは下層のＡＰの水分によ
る腐食を防止すると共に、次工程に於けるレーザ加工を
容易ならしめるものであり、また第２裏面電極膜（４２
）に於けるＡｆｆｉ層は直列抵抗を低減せしめるもので
ある。In the subsequent step shown in FIG. 5, each of the plurality of photoelectric conversion elements (5aH, 5b) whose adjacent spacing portions (6) have been removed by laser beam irradiation from the other main surface side of the substrate (1) is In order to continuously cover the transparent conductive films (2a) (2b) which are exposed in the divided first back electrode films (41a) (41b>... and in the adjacent interval parts (6)). , a film thickness of about 1000 titanium (Ti) or titanium silver (Ti
Ag), Aρ with a film thickness of several 1000, and a film thickness of several 10
A second back electrode film (42) having a three-layer structure of 00 to 5000 Ti or TiAg is deposited in an overlapping manner. The first and third layers of Ti or TiAg prevent corrosion of the lower AP layer due to moisture, and also facilitate laser processing in the next process.
The Affi layer in ) reduces the series resistance.
第６図の最終工程では、他方の光電変換素子（５ｂ）の
透明導電膜（２ｂ）の露出部分（８）も全面的に覆った
第２裏面電極膜（４２）が、各個別の光電変換素子（５
ａ）（５ｂ）を電気的に直列接続すべく分割される。斯
る第２裏面電極膜（４２）の分割は、左隣りの光電変換
素子（５ａ）の第２裏面電極膜（４２ａ）と、右隣りの
光電変換素子（５ｂ）の透明導電膜（２ｂ）の露出部分
（８）とが全面的に結合すべく、その結合部近傍に於け
る右隣りの光電変換素子（５ｂ）上で第１裏面電極膜（
４１ｂ＞と共−行なわれる。具体的には第２裏面電極膜
（４２）の下には第１裏面電極膜（４１ｂ＞及び半導体
膜（３ｂ〉が存在しており、高エネルギー密度のレーザ
ビームにより一度に第２裏面電極膜（４２）及び第１裏
面電極膜（４１ｂ＞を除去しようとすれば下層の半導体
膜（３ｂ）にダメージを与えたり、また上記露出面側か
らレーザビームを照射するが故に加工界面に残留物が残
在したりする。従って本実施例にあっては、露出面側に
存在する第２裏面電極膜（４２）の最上層であるＴｉ或
いはＴｉＡｇ層をレーザビームの照射により除去して二
層目のＡ１２層を露出せしめ、次いでこの露出したＡｊ
！層を上記最上層のＴｉ或いはＴｉＡｇ層をマスクとし
たｃｃｊ２斗等の塩素ガス雰囲気中でのプラズマエツチ
ング（反応性イオンエツチング）により除去する。そし
て、このレーザビームの照射及びプラズマエツチングを
露出面側から見て三層目のＴｉ或いはＴｉＡｇ層及びＡ
！から成る第１裏面電極膜（４１ｂ）についても再度族
こし、上記第２裏面電極膜（４２ａ）（４２ｂ）及び第
１裏面電極膜（４１ａ）（４１ｂ）・・・が各光電変換
領域（５ａ）（５ｂ）・・・毎に分割される。In the final step in FIG. 6, the second back electrode film (42), which completely covers the exposed portion (8) of the transparent conductive film (2b) of the other photoelectric conversion element (5b), is applied to each individual photoelectric conversion element (5b). Motoko (5
a) (5b) are divided to electrically connect them in series. The second back electrode film (42) is divided into the second back electrode film (42a) of the photoelectric conversion element (5a) on the left and the transparent conductive film (2b) of the photoelectric conversion element (5b) on the right. In order to fully bond with the exposed portion (8) of the first back electrode film (
41b>. Specifically, the first back electrode film (41b> and the semiconductor film (3b>) are present under the second back electrode film (42), and the second back electrode film (42) is removed at once by a high energy density laser beam. (42) and the first back electrode film (41b>) may damage the underlying semiconductor film (3b), and since the laser beam is irradiated from the exposed surface side, residue may be left on the processing interface. Therefore, in this embodiment, the Ti or TiAg layer, which is the top layer of the second back electrode film (42) existing on the exposed surface side, is removed by laser beam irradiation and the second layer is removed. A12 layer of is exposed, and then this exposed Aj
! The layer is removed by plasma etching (reactive ion etching) in a chlorine gas atmosphere using CCJ2D or the like using the uppermost Ti or TiAg layer as a mask. This laser beam irradiation and plasma etching are viewed from the exposed surface side and the third Ti or TiAg layer and A
! The first back electrode film (41b) consisting of )(5b)...
（ト）発明の効果
本発明光起電力装置は以上の説明から明らかな如く、隣
接した一方の光電変換素子を構成する半導体膜を、第１
寛極膜間の分割溝を埋めて他方の光電変換素子の第１寛
極膜上にまで延在せしめたので、北記分割溝内に導電体
が侵入し絶縁間隔を縮小せしめる危惧を確実に回避し得
、斯る第１電極膜間のリーク電流を減少せしめることが
できる。(G) Effects of the Invention As is clear from the above description, the photovoltaic device of the present invention has a semiconductor film constituting one of the adjacent photoelectric conversion elements.
Since the dividing groove between the polar polar films is filled in and extends over the first polar film of the other photoelectric conversion element, there is no possibility that the conductor may enter the polar dividing groove and reduce the insulation interval. This can be avoided and the leakage current between the first electrode films can be reduced.
また、半導体膜及び第２電極膜の積層体がエネルギビー
ムの照射により除去される部分は隣接間隔部に於ける隣
接光電変換素子の電気的接続箇所の第１１電極膜上であ
り、しかも斯るエネルギビームの照射により除去され露
出ゼしめられた部分は全面的に有効に上記電気的接続に
利用することができ、その結果無駄な箇所へのエネルギ
ビームの照射はなくエネルギビームの走査回数も最小限
に済ませることができる。従って、作業性の向上が図れ
る。Further, the portion where the stacked body of the semiconductor film and the second electrode film is removed by irradiation with the energy beam is on the eleventh electrode film at the electrical connection point of the adjacent photoelectric conversion elements in the adjacent spacing portion, and The area removed and exposed by the energy beam irradiation can be effectively used for the above-mentioned electrical connection, and as a result, the energy beam is not irradiated to unnecessary areas and the number of energy beam scans is minimized. It can be done within a limited time. Therefore, work efficiency can be improved.
第１図は本発明光起電力装置の一実施例を示す要部拡大
断面図、第２図は従来装置の断面図、第３図乃至第６図
は本発明光起電力装置の製造工程を工程別に示す要部拡
大断面図、を夫々示している。
（１）・・・基板、＜ ２ ａ）（２ｂ）＜ ２ ｃ）
−透明導電膜、（３）（３ａ）（３ｂ）（３ｃ＞・−・
半導体膜、（４１）（４１ａ）（４１ｂ ） ・・・第
１裏面電極膜、＜４２）（４２ａ）（４２ｂ）・・・第
２裏面電極膜、（５ａ）（５ｂ）（５ｃ）・・・光電変
換素子。FIG. 1 is an enlarged cross-sectional view of essential parts showing an embodiment of the photovoltaic device of the present invention, FIG. 2 is a cross-sectional view of a conventional device, and FIGS. 3 to 6 show the manufacturing process of the photovoltaic device of the present invention. Enlarged cross-sectional views of main parts shown for each process are shown. (1)...Substrate, < 2 a) (2 b) < 2 c)
-Transparent conductive film, (3) (3a) (3b) (3c>・-・
Semiconductor film, (41) (41a) (41b)...First back electrode film, <42) (42a) (42b)...Second back electrode film, (5a) (5b) (5c)...・Photoelectric conversion element.
Claims (1)
半導体膜及び第２電極膜をこの順序で積層した光電変換
素子を分割配置し、それら光電変換素子を当該素子間の
隣接間隔部で第３電極膜を介して電気的に直列接続せし
めた光起電力装置であって、上記半導体膜及び第２電極
膜の積層体は上記隣接間隔部の第１電極膜上に於いてエ
ネルギビームの照射により除去されて、隣接した一方の
光電変換素子を構成する半導体膜が第１電極膜間の分割
溝を埋めて他方の光電変換素子の第１電極膜上にまで延
在し分割されていると共に、隣接光電変換素子を電気的
に直列接続する第３電極膜は上記一方の光電変換素子の
第２電極膜と連なりエネルギビームの照射により露出せ
しめられた他方の光電変換素子の第１電極膜部分全面と
結合することを特徴とした光起電力装置。(1) A first electrode film in multiple regions on one main surface of the substrate,
A photovoltaic device is a photovoltaic device in which a photoelectric conversion element in which a semiconductor film and a second electrode film are laminated in this order is arranged in a divided manner, and these photoelectric conversion elements are electrically connected in series through a third electrode film at an adjacent interval between the elements. In the power device, the laminate of the semiconductor film and the second electrode film is removed by irradiation with an energy beam on the first electrode film in the adjacent spaced portion to form one adjacent photoelectric conversion element. The semiconductor film fills the dividing groove between the first electrode films and extends over the first electrode film of the other photoelectric conversion element to be divided, and a third electrode electrically connects adjacent photoelectric conversion elements in series. A photovoltaic device characterized in that the film is continuous with the second electrode film of one of the photoelectric conversion elements and is combined with the entire surface of the first electrode film of the other photoelectric conversion element exposed by irradiation with the energy beam.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61035595A JPS61210682A (en) | 1986-02-20 | 1986-02-20 | Photovoltaic device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61035595A JPS61210682A (en) | 1986-02-20 | 1986-02-20 | Photovoltaic device |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59126918A Division JPS616828A (en) | 1984-06-20 | 1984-06-20 | Manufacture of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61210682A true JPS61210682A (en) | 1986-09-18 |
| JPH0464472B2 JPH0464472B2 (en) | 1992-10-15 |
Family
ID=12446153
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61035595A Granted JPS61210682A (en) | 1986-02-20 | 1986-02-20 | Photovoltaic device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61210682A (en) |
-
1986
- 1986-02-20 JP JP61035595A patent/JPS61210682A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0464472B2 (en) | 1992-10-15 |
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