JPS61206064A - Common input output device for controlling multi-computer system - Google Patents

Abstract

PURPOSE:To continue the I/O allocation without reducing the processing capacity and without executing the complicated processing in a CPU even when any CPU out of plural CPUs breaks down by providing the interruption signal sending means, etc. CONSTITUTION:When the necessity to use a common I/O 5 occurs at a CPU 1A, I/O using request data are written in a using request register 6A of a common input output control device 3, and then, the device 3 writes the code of the using permission in an input output control register 7. Next, the interrupting signal is sent through an interrupting signal line 8A to a CPU 1A by an interrupting signal sending means 9, and thus, when the using permission is informed, the data are exchanged between the CPU 1A and the device 5. When the CPU 1A breaks down before the command of the data exchange is sent, the device 3 monitors the time until the command is written in the register 7, judges that the CPU 1A breaks down when the prescribed time passes, and assigns the using right of the device 5 to other CPU. Thus, the I/O assignment can be continued without reducing the processing capacity even when the CPU breaks down.

Description

Detailed Description of the Invention [Field of Industrial Application] This invention is directed to a multi-computer system in which a plurality of central processing units share a common input/output device under the control of a common input/output control device. This invention relates to a common input/output device control method for controlling device usage allocation.

[Conventional technology]

Generally, one way to improve the performance of a computer system is to combine multiple central processing units to form a computer system, and configure a so-called multi-computer system in which each central processing unit executes processing in parallel. There is a method of improving the processing power of a computer system by doing so.

In this case, the input/output device that exchanges data with each central processing unit is usually common to each central processing unit, and the input/output device becomes a common input/output device.

Therefore, the common input/output device exchanges data with only one of the plurality of central processing units at a time, and after completing the data exchange with the central processing unit,
By controlling data exchange with other central processing units that should use the common input/output device, it becomes necessary to dynamically allocate the common input/output device to a plurality of central processing units.

Conventionally, various common input/output device control methods have been proposed for dynamically allocating common input/output devices of this type.

In other words, the first control method is a set of control methods that stores commands given by the central processing unit and displays the operating status of the common input/output device when the central processing unit exchanges data with the common input/output device. A plurality of sets of register means are provided in the common input/output control unit, one for each central processing unit, so that each central processing unit can check whether other central processing units are exchanging data with the common input/output unit. Regardless of whether or not the data exchange command is given to the common input/output control device using only the sets of register means assigned to each, the common input/output control device can receive commands from a plurality of central processing units. It scans and executes a data exchange operation with the central processing unit based on each command, and notifies the central processing unit after the operation is completed.

In addition, in the second control method, a specific central processing unit among the plurality of central processing units has the right to allocate a common input/output device, and the other central processing units have some kind of inter-central processing unit communication means. The request to use the common input/output device is notified to the central processing unit that has the right to allocate the common input/output device, and when the central processing unit that made the request for use becomes able to use the common input/output device, the central processing unit This is a method in which the inter-device communication means notifies the requesting central processing unit of this fact and grants permission to use it.

[Problem that the invention seeks to solve]

However, in the first control method, each of the plurality of central processing units can exchange data as if it had an input/output device controlled only by itself, but one set of register means for storing a plurality of pieces of information is used. Since multiple units must be prepared, there is a problem in that the amount of hardware increases.

In addition, in the second control method, in order for a central processing unit that does not have the right to allocate an input/output device to obtain the right to use the input/output device, communication between the central processing units must be performed, and the The problem is that the processing capacity is reduced by the amount of processing program running for communication between processing units, and when the central processing unit that has the right to allocate input/output devices breaks down, the process in which another central processing unit takes over the right to allocate the input/output device is complicated. There was a problem that.

Therefore, the present invention has been made by focusing on the problems of the above-mentioned conventional method, and there is no reduction in processing capacity due to communication between central processing units for allocating input/output devices.
Common input/output device control in a multiprocessor system that can continue assigning input/output devices without performing complicated processing in the central processing unit even if any one of the multiple central processing units fails The purpose is to provide a method.

Means for Solving Problem c] In order to achieve the above object, the present invention provides a multi-computer system in which a plurality of central processing units share a common input/output device under the control of a common input/output control device. The common input/output control device has storage means for linking the common input/output control device with a plurality of central processing units, and has interrupt signal sending means for individually sending an interrupt signal to each central processing unit, The storage means includes a plurality of storage areas each capable of holding input/output device usage requests from the plurality of central processing units, each consisting of a bit field representing identification information unique to the central processing unit and a bit representing the presence or absence of a usage request. When the central processing unit that requests the use of the common input/output device stores the input/output device usage request in the storage means, the common input/output control device determines whether the usage request can be accepted. If the common input/output device is usable, an interrupt signal indicating that the common input/output device can be used is sent to the central processing unit that made the request for use, and the interrupt signal is The central processing unit receiving the information uses the common input/output device.

[Effect]

This invention provides a common input/output control device that controls the allocation of data exchange between a common input/output device and a plurality of central processing units, which includes identification information and use request bits specific to each central processing unit from each central processing unit. By providing storage means for storing input/output device use requests and interrupt signal sending means for individually sending interrupt signals to each central processing unit, the central processing unit requests the use of a common input/output device. The device is
After writing the input/output device usage request into the storage means, the storage means waits until a usage permission notification is received from the common input/output control device. On the other hand, when the common input/output control device becomes able to accept the use request, it sends an interrupt signal to notify the central processing unit that made the use request from the interrupt signal sending means of permission to use, and this interrupt signal The received central processing unit exchanges data using the common input/output device. In this way, the problems of the conventional method can be solved by assigning the common input/output device to each central processing unit using the common input/output control device and notifying the central processing unit that the common input/output device has been assigned. It can be solved.

〔Example〕

FIG. 1 is a block diagram showing one embodiment of the present invention.

First, to explain the configuration, a plurality of, for example, three central processing units IA-IC are connected to an input/output bus 2, a bus interface 4 of a common person output control device 3 is connected to this input/output bus 2, and this common person A common input/output device 5 is connected to the output control device 3.

The common input/output control device 3 includes usage request registers 6A to 6C in which usage requests from each central processing unit IA to IC are individually written via a bus interface 4, an input/output control register 7, and input/output control registers 6A to 6C. It has at least an interrupt signal sending means 9 for individually sending an interrupt signal to each of the central processing units IA to IC via interrupt signal lines 8A to 8C based on control information stored in the register 7.

As shown in FIG. 2, each of the use request registers 6A to 6C includes a use request storage area a in which a use request bit of "1" is written when a use is requested and "0" when not used, and a use request storage area a in which a use request bit is written, for example, is "1" when a use is requested, and "0" is written when not used. It consists of an identification information storage area in which identification information unique to IA to IC is written.

In addition, the human output control register 7, as shown in FIG.
A data exchange command storage area C in which data exchange commands from each central processing unit LA-IC are written, and each central processing unit I
An end-of-use data storage area d in which end-of-use data is written when A-IC finishes using the common input/output device 5, and a common input/output control device 3 sends an interrupt signal to each central processing unit IA-IC. and an interrupt cause storage area e in which interrupt cause data such as usage permission data and exchange completion data are written.

Note that the common input/output control device 3 stores the interrupt cause stored in the interrupt cause storage area e of the input/output control register 7 in the other storage area C or d after the corresponding central processing unit reads it. It monitors the time it takes for data to be written from the device, determines whether it is within a predetermined time, and when the predetermined time has elapsed, it assumes that the corresponding central processing unit has failed and grants usage rights. It is configured to be assigned to another central processing unit.

Next, the operation of this embodiment will be explained. Assume that each central processing unit IA-IC is not currently exchanging data with the common input/output device 5, and in this state, for example, it becomes necessary to use the common input/output device 5 in the central processing unit IA. do.

In this state, first, the central processing unit IA of the common input/output control unit 3 via the input/output bus 2
The input/output device use request data, that is, the use request bit of "1" and identification information are written into the use request register 6A exclusively allocated to A.

In this way, when the input/output device use request data is written to the use request register 6A of the common input/output control device 3, the common input/output control device 3 writes the input/output device use request data to the use request register 6A to 6C.
is scanned to check whether or not the use request data is stored. In this case, since the use request data is stored only in the use request register 6A, the interrupt cause memory in the input/output control register 7 is A predetermined code indicating usage permission is written in area e, and then the interrupt signal sending means 9 sends an interrupt signal to the central processing unit LA via the interrupt signal line 8A. At the same time, the use request bit of the use request register 6A is cleared.

When the central processing unit IA receives the interrupt signal, it reads the contents of the interrupt cause storage area e of the input/output control register 7, and when it determines that the interrupt signal is permission to use the common input/output device 5, A command instructing data exchange is written in the data exchange command storage area C of the input/output control register 7, and thereby the common input/output control device 3 controls the data exchange between the central processing unit IA and the common input/output device 5. command.

When the data exchange between the central processing unit IA and the common input/output device 5 is completed, the common input/output control device 3 stores a predetermined value in the interrupt cause storage area e of the input/output control register 7 indicating the end of data exchange processing. Write data, then interrupt signal 'fI
A8 Sends an interrupt signal to A to notify the central processing unit IA of the end of data exchange.

When the central processing unit IA receives the interrupt signal, it reads the processing result stored in the interrupt cause storage area e of the input/output control register 7 again, and determines the end of data exchange with the common input/output device 5. , writes predetermined end-of-use data indicating that the use of the common input/output device 5 has ended in the end-of-use data storage area d of the input/output control register.

Thereby, the common input/output control device 3 confirms the end-of-use data and stores the use request data from the other central processing units IB and IC in the use request register 6B.

6C, and if it is stored, the same allocation control as above is executed for the central processing unit IB or IC that wrote the usage request.

Further, as described above, while the common input/output device 5 is being allocated to one central processing unit IA, a request to use the common input/output control device 3 may be made from another central processing unit IB or IC. When input/output device use request data is written to register 6B or 6C, all central processing units that previously wrote use request data to use request registers 6A to 6C do not directly grant permission to use the input/output device. When data exchange processing between the device and the common input/output device 5 is completed, data exchange with the common input/output device 5 is started.

Furthermore, the common input/output control device 3 is the central processing device IA-I.
If the central processing unit breaks down before sending a data exchange command after notifying one of the central processing units C of use permission, the common input/output control unit 3 issues permission to the specified central processing unit. The time from when the data exchange command is notified until the data exchange command is written to the data exchange command storage area C of the input/output control register 7 is monitored, and when a predetermined time has elapsed, it is determined that the central processing unit has failed. Assuming that this is the case, processing is performed to allocate the right to use the common input/output device 5 to another central processing unit.

Similarly, after starting data exchange between the central processing unit and the common input/output device 5, and after completing the data exchange and sending an interrupt signal to notify this to the central processing unit, the input/output control register 7 is Even if the central processing unit breaks down before writing the end-of-use data to the end-of-use data storage area d, the time from the notification of the end of data exchange until the end-of-use data is written is monitored, and it is determined that this is the predetermined time. At the point in time, it is assumed that the central processing unit has failed, and processing is performed to allocate the right to use the common input/output device 5 to another central processing unit.

In addition, in the above embodiment, three central processing units IA
~Although the case where the ICs share the common input/output device 5 has been described, this is not limited to the case where two or more central processing units share the common input/output device 5.
Of course, the present invention can also be applied to the case where two common input/output devices 5 are shared.

Furthermore, in the above embodiment, when the common input/output control device 3 allocates usage rights to a plurality of central processing units IA to IC, the case is explained in which the usage rights are allocated in the order in which usage requests arrive. First, it is also possible to allocate each central processing unit IA to IC according to a preset priority order.

Furthermore, in the above embodiment, each central processing unit A to I
C use request registers 6A~
6C has been described, but instead of this, a common first-in, first-out register (FiFo register) may be applied to each of the central processing units IA to IC, and usage requests may be written from the central processing unit to this register. good.

〔Effect of the invention〕

As explained above, according to the present invention, in a multi-computer system in which a plurality of central processing units share a common input/output device under the control of a common input/output control device, the common input/output control device The storage means has a storage means for linking the plurality of central processing units, and an interrupt signal sending means for individually sending an interrupt signal to each central processing unit, and the storage means is connected to the plurality of central processing units. It has a plurality of storage areas each capable of holding an input/output device usage request consisting of a bit field representing identification information unique to the central processing unit and a bit 7 representing the presence or absence of a usage request from the device, and the common input When the central processing unit that requests the use of an output device stores an input/output device usage request in the storage device, the common input/output control device determines whether or not the usage request can be accepted, and If the input/output device is usable, an interrupt signal indicating that the common input/output device can be used is sent to the central processing unit that made the usage request, and the central processing unit that received the interrupt signal Since the common input/output device is used, it is only necessary to provide a plurality of storage means for storing only requests for using the input/output device, which reduces the amount of hardware, and also reduces the usage rights for the common input/output device. Since there is no need for communication between central processing units when making allocations, the processing capacity of the central processing units does not decrease, and even if any one of the multiple central processing units fails, the central processing unit The advantageous effect is that it is possible to realize dynamic allocation of common input/output devices in which the right to use the common input/output devices can be continuously allocated without performing complicated processing.

[Brief explanation of the drawing]

FIG. 1 is a block diagram 1 showing one embodiment of the present invention.
FIG. 2 is a block diagram showing the structure of the use request register, and FIG. 3 is a block diagram showing the structure of the input/output control register. In the figure, IA to IC are central processing units, 2 is an input/output bus, and 3
is a common input/output control device, 4 is a bus interface, 6A
~6C is a use request register, 7 is an input/output control register,
8A to 8C are interrupt signal lines, 9 is an interrupt signal sending means, a is a use request bit storage area, b is an identification information storage area, C is a data exchange command storage head, d is an end-of-use data storage area, e is the interrupt cause storage area. Figure 1

Claims (1)

[Claims] In a multi-computer system in which a plurality of central processing units share a common input/output device under the control of a common input/output control device, the common input/output control device has a memory for linking the common input/output control device with the plurality of central processing units. and interrupt signal sending means for individually sending an interrupt signal to each central processing unit, and the storage means stores identification information specific to the central processing unit from the plurality of central processing units. The central processing unit that requests the use of the common input/output device has a plurality of storage areas each capable of holding input/output device usage requests each consisting of a bit field representing a request and a bit representing the presence/absence of a usage request. When storing an input/output device use request, the common input/output control device determines whether the use request can be accepted, and if the common input/output device can be used, the common input/output control device makes the use request. A multi-computer system characterized in that an interrupt signal indicating that a common input/output device can be used is sent to a central processing unit, and the central processing unit that receives the interrupt signal uses the common input/output device. A common input/output device control method.