JPS61204981A - Mnos type non-volatile memory - Google Patents

Mnos type non-volatile memory

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Publication number
JPS61204981A
JPS61204981A JP4544885A JP4544885A JPS61204981A JP S61204981 A JPS61204981 A JP S61204981A JP 4544885 A JP4544885 A JP 4544885A JP 4544885 A JP4544885 A JP 4544885A JP S61204981 A JPS61204981 A JP S61204981A
Authority
JP
Japan
Prior art keywords
nitride film
film
sinx
oxynitride
oxygen
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4544885A
Other languages
Japanese (ja)
Inventor
Shuichi Matsuo
修一 松尾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP4544885A priority Critical patent/JPS61204981A/en
Publication of JPS61204981A publication Critical patent/JPS61204981A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/792Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Non-Volatile Memory (AREA)

Abstract

PURPOSE:To decrease a capturing level in a nitride film and to solve a problem that an erasing time is much longer than a writing time, by mixing a minute amount of oxygen in the nitride film of an MNOS type non-voltatile memory, and converting SiNx in the nitride film into oxynitride SiNxOy. CONSTITUTION:Thermal oxidation of a P-type Si substrate 1 is performed, and a very thin oxide film of SiO2 2 with a thickness of 15-50Angstrom is formed. A nitride film of SiNx 10 is formed by a CVD method by using SiH4 and N2 (or NH3) thereon to a thickness of 100-500Angstrom . Now, oxygen ions are implanted 4 in the nitride film SiNx, and oxynitride SiNxOy 3 is obtained. Then, a capturing level having a deep energy level, which is present at the interface between the oxide film SiO2 and the nitride film SiN2, is made to disappear by the oxygen ion, and a nitride film having high resistivity is obtained. Therefore discharge is hard to occur to the side of a gate electrode through the nitride film SiNx when memories are held. Thus the memory holding characteristic of the MNOS type non-volatile memory is improved.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、MNOS型不揮発性メモリの材料に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to materials for MNOS type nonvolatile memory.

〔従来の技術〕[Conventional technology]

従来の酸化膜と窒化膜との界面に電荷捕獲準位を有する
MNOB型不揮型性揮発性メモリ開57−135495
の様に情報の記憶保持特性向上のために、界面に捕獲さ
れた電荷の放出を防ぐために、ゲート電極にバイアスを
印加していた。
Conventional MNOB type non-volatile volatile memory with charge trapping level at the interface between oxide film and nitride film 57-135495
In order to improve information storage characteristics, a bias was applied to the gate electrode to prevent the release of charges trapped at the interface.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

しかし、前述の従来技術において、情報の記憶保持特性
向上のためには、v!源の供給が必要で、電源の供給な
しで長期にわたり記憶保持するには、何ら効果を有して
いない。また、従来のMNOS型不揮発性メモリは、窒
化膜の比抵抗が低いため、酸化膜と窒化膜の界面に捕獲
された電荷が窒化族を通してゲート電極側へ放電して、
極薄の酸化膜を通しての放出と合わせて、記憶保持特性
がまた′従来技進での高いWき込み電臣(15V以1.
)を下げるためには、酸化膜の電界強度を大きくする必
要がある。そのためには、ゲート膜(酸化膜−窒化膜)
の中の厚い窒化膜(600へ−70[)去)を薄くすれ
ばその効果が大きくなるが、薄くするほど、前述の窒化
膜全通してのゲート電極側への捕獲された電荷の放出が
大きくなり、大きな問題点となっていた。
However, in the prior art described above, in order to improve information storage retention characteristics, v! It requires a power supply, and has no effect on long-term memory retention without a power supply. In addition, in conventional MNOS type nonvolatile memory, since the resistivity of the nitride film is low, charges captured at the interface between the oxide film and the nitride film are discharged to the gate electrode side through the nitride group.
Combined with the release through the ultra-thin oxide film, the memory retention property is also higher than that of the conventional technology (15V or higher).
), it is necessary to increase the electric field strength of the oxide film. For this purpose, gate film (oxide film - nitride film)
The effect will be greater if the thick nitride film (600 to 70[)] is made thinner, but the thinner it is, the more the trapped charges will be released through the nitride film to the gate electrode side. It had grown and became a big problem.

ざらに窒化膜中には捕獲準位か多いため、橿き込み時、
酸化膜と窒化膜の界面の深い捕獲準位以外に、窒化膜中
にも一部電荷が捕獲される。このため消去時に、窒化膜
中に捕獲され残っている電荷を窒化膜−酸化膜を通して
31基板側へ放出する必要があり、消去時間が曹き込み
時間に比較して非常に長いという問題点があった。
There are many trap levels in the nitride film, so when it is trapped,
In addition to the deep trap level at the interface between the oxide film and the nitride film, some charges are also trapped in the nitride film. For this reason, during erasing, it is necessary to release the remaining charges trapped in the nitride film to the substrate 31 through the nitride film and oxide film, which poses the problem that the erasing time is extremely long compared to the scouring time. there were.

そこで、本発明はこのような問題点を解決するもので、
その目的とするところは、MNOB型不揮型性揮発性メ
モリ膜中に@童の酸素を混入させることにより、窒化J
JQ S i N xをオキシナイトライドSiNxO
y化することである。これにより、窒化膜中の捕獲準位
か減少し、膜の比抵抗が増加する。
Therefore, the present invention aims to solve these problems.
The purpose is to mix nitride oxygen into the MNOB type nonvolatile volatile memory film.
JQ S i N x Oxynitride SiNxO
It is to make it y. This reduces the trap level in the nitride film and increases the resistivity of the film.

従って本発明は、この窒化膜を用いて、窒化膜の膜厚を
薄くすることより誓き込み消去時間が短く、低電圧書き
込み消去可能で記憶保持特性の良好なMNOS型不揮発
性メモリを提供することにある。
Therefore, the present invention uses this nitride film to provide an MNOS type nonvolatile memory that has a shorter commit/erase time, can be written/erased at low voltage, and has good memory retention characteristics by reducing the thickness of the nitride film. There is a particular thing.

〔間色点を解決するための手段〕[Means for solving inter-color points]

本発明の半尋体不揮発性メモリは、MNOS型不揮発性
メモリの窒化膜SiNx中に微址の酸素を混入して、オ
キシナイトライh’ S i N x Oy化したこと
を特徴とする。
The semicircular nonvolatile memory of the present invention is characterized in that a small amount of oxygen is mixed into the nitride film SiNx of the MNOS type nonvolatile memory to form oxynitride h' S i N x Oy.

〔作用〕[Effect]

本発明の上記の構成によれば、窒化膜S iNx中に微
鍍の酸素を混入してオキシナイトライド5iNXOy化
したことにより、窒化膜中の捕獲準位が減少し酸化膜S
10.と窒化膜51Nxの界面の電荷の記憶保持の割合
が大きくなり、窒化膜81 Hz中にあった電荷の窒化
膜−酸化膜を通してのsi基基板への消去が減少し、界
面に存在する電荷の消去のみで良くなり消去時間が大幅
に短くなり、高速アクセスが可能となる。さらに窒化’
fd S i N xの比抵抗が大きくなるため、酸化
膜S10、と窒化&+31、NXの界面に捕獲された電
荷が、記憶保持時に、窒化膜S i N Xを通してゲ
ート電極側へ放電しにくくなるため、MNOS型不揮発
性メモリの記憶保持特性が改良される。
According to the above structure of the present invention, by mixing minute amounts of oxygen into the nitride film SiNx to form oxynitride 5iNXOy, the trap level in the nitride film is reduced and the oxide film S
10. The storage retention ratio of charges at the interface of the nitride film 51Nx increases, and the erasure of the charges in the nitride film 81 Hz to the Si-based substrate through the nitride film-oxide film decreases, and the charge existing at the interface decreases. Only erasing is required, the erasing time is significantly shortened, and high-speed access becomes possible. Further nitriding'
Since the specific resistance of fd S i N x increases, it becomes difficult for the charges captured at the interface between the oxide film S10 and the nitride film S10 and the nitride film S10, NX to discharge toward the gate electrode side through the nitride film S i N X during memory retention. Therefore, the memory retention characteristics of the MNOS type nonvolatile memory are improved.

〔実施例〕〔Example〕

以下、本発明について実施例に基づき詳細に説明する。 Hereinafter, the present invention will be described in detail based on examples.

第1図は、本発明の実施例における構造図である。これ
は、従来のM1JO3(金属5−窒化膜6−酸化膜2−
半導体1)の窒化膜中に、酸素を1〜・20at%含ま
せて、窒化M S i N Xをオキシナイトライド5
iNXOy化させたものである。
FIG. 1 is a structural diagram in an embodiment of the present invention. This is different from the conventional M1JO3 (metal 5 - nitride film 6 - oxide film 2 -
The nitride film of the semiconductor 1) contains 1 to 20 at% of oxygen, and the nitride MSiNX is converted into oxynitride 5.
It is made into iNXOy.

次に、第2図に本発明の工程図を示す。まず、Pル17
B、1基板1に熱酸化を行ない15A〜50Aの極薄酸
化j換5i012を形成し、その上に5jH4とN、(
又はNu、)を用いて、化学気相成100〜500X形
成した(第2図(α))。ここで、上記の窒化膜5iN
X中に酸素のイオン打ち込みを行ない、窒化膜SiNx
をオキシナイトライドSiNxOy3化する(第2図(
b))。
Next, FIG. 2 shows a process diagram of the present invention. First, Ple 17
B. 1 Thermal oxidation is performed on the substrate 1 to form an extremely thin oxidized 5i012 of 15A to 50A, and 5jH4 and N, (
or Nu,) was formed by chemical vapor deposition at 100 to 500X (FIG. 2 (α)). Here, the above nitride film 5iN
Oxygen ions are implanted into the nitride film SiNx.
to oxynitride SiNxOy3 (Fig. 2 (
b)).

これにより、酸化膜S10.と窒化膜SiNxの界面に
存在する深いエネルギー準位をもつ捕獲準位を残しつつ
、窒化膜中の浅いエネルギー準位が酸素イオンにより消
滅し、比抵抗の高い窒化膜が形成される。
As a result, the oxide film S10. A shallow energy level in the nitride film is annihilated by oxygen ions while leaving a trap level with a deep energy level existing at the interface between the SiNx and the nitride film, and a nitride film with high resistivity is formed.

次に、ポリシリコン5を成膜し、エツチングを行ないゲ
ート電極5′を形成する(第2図CC>)、さらに、窒
化膜(オキシナイトライド)3と酸化膜2をエツチング
して、リンイオンの打ぢ込み4を行ないソース、ドレイ
ン部7を形成する(第2図(d))。最後に、層間絶縁
膜8を成膜し、コンタクトホールを形成し、アルミニウ
ムを蒸着、エツチングして、アルミ配線9を行なうこと
により、本発明のMNOS型不揮発性メモリを形成でき
る(第2図(g))。
Next, a polysilicon film 5 is formed and etched to form a gate electrode 5' (FIG. 2 CC>).Furthermore, the nitride film (oxynitride) 3 and the oxide film 2 are etched to form phosphorus ions. Implantation 4 is performed to form source and drain portions 7 (FIG. 2(d)). Finally, the MNOS type nonvolatile memory of the present invention can be formed by forming an interlayer insulating film 8, forming contact holes, depositing and etching aluminum, and forming aluminum wiring 9 (see FIG. 2). g)).

【−看コtr=、 −4= 5he l1l−J M 
丁11”J 1cr3xルntM o a sv −f
−工諷シナイトライドSiNxOy化する方法は、5I
H4とN、(又はNH,)中に直接N、O等のガスを混
入して、化学気相成長(OVD)法によって簡単に形成
することもできる。
[-Kanko tr=, -4= 5he l1l-J M
11”J 1cr3x ntMoa sv -f
-The method for converting nitride SiNxOy is 5I
It can also be easily formed by a chemical vapor deposition (OVD) method by directly mixing gases such as N and O into H4 and N (or NH).

このようにして形成したMNOS型不揮発性メモリの特
性を以下に示す。
The characteristics of the MNOS type nonvolatile memory thus formed are shown below.

第3図は、本発明の記憶保持特性を示す。波線は従来の
MNOS型不揮発性メモリの記憶保持特性で、窒化膜S
iNxの厚さは400^である。
FIG. 3 shows the memory retention characteristics of the present invention. The wavy line indicates the memory retention characteristics of conventional MNOS type nonvolatile memory, and the nitride film S
The thickness of iNx is 400^.

実線は本発明のMWCIS型不揮発性メモリの記憶保持
特性である。これから記憶保持特性の大幅な向上が見ら
れる。また、書き込み初期のしきい値はわずかに下がる
ものの、消失時のしきい値の変化が大きく、第4図に示
すように消去時間が短くなり高速アクセスが可能になる
The solid line is the memory retention characteristic of the MWCIS type nonvolatile memory of the present invention. Significant improvements in memory retention properties can be seen from this. Further, although the threshold value at the initial stage of writing is slightly lowered, the change in the threshold value at the time of erasure is large, and as shown in FIG. 4, erasing time is shortened and high-speed access is possible.

また、窒化3g8 i N xをオキシナイトライド5
iNzoy化したので、窒化膜中の捕獲準位の少ない高
抵抗の膜が得られるため窒化膜()埃岸ンナイ6ライド
)の膜厚をうずくでき、書き込み消去時間が非常に短く
なる。
In addition, nitride 3g8 i N x is oxinitride 5
Since it is made of iNzoy, a high resistance film with few trapped levels in the nitride film can be obtained, so the film thickness of the nitride film can be reduced, and the write/erase time can be extremely shortened.

〔効果〕〔effect〕

以上、述べた様に本発明によれば、MNOS型不揮発性
メモリの窒化膜flLNx中に、微量の酸素を混入して
オキ′クナイ、ドライドS、 L ’N x Oy化し
たから、酸化膜と窒化膜の界面に存在する深いエネルギ
ー準位をもつ捕獲準位を残しつつ、窒化膜中の浅いエネ
ルギー準位をもつ捕獲準位が減少することにより、比抵
抗が増大するという特徴をもつ。
As described above, according to the present invention, a trace amount of oxygen is mixed into the nitride film flLNx of the MNOS type nonvolatile memory to form Oki'kunai, Dride S, L'N x Oy, so that it is not an oxide film. It has the characteristic that the specific resistance increases by reducing the trapping level with shallow energy level in the nitride film while leaving the trapping level with deep energy level existing at the interface of the nitride film.

従って、窒化膜中の捕獲準位が減少するため、酸化膜と
窒化膜(オキシナイトライド)の界面に存在する捕獲準
位の割合が増加する。このため、記憶保持された電荷を
酸化膜を通して81基板側へ放出する消去においては、
消失時間が大幅に短くなり、高速アクセスができるとい
う効果を有する。さらに窒化膜の比抵抗が増大すること
により、酸化膜と窒化膜の界面に捕獲、記憶された電荷
が、窒化膜を通して放出される割合が減少し、記憶保持
特性が大幅に向上する。さらに、窒化膜の比抵抗の増大
により、窒化膜の膜厚を薄<(100〜700X)する
ことができるため、ゲート絶縁膜(酸化膜−窒化膜)の
電界強度を大きくでき、書き込み消失時間を大幅に短縮
させ、かつ書き込み消去電圧も小さくできるため、本発
明の効果は非常に大である。
Therefore, since the trap levels in the nitride film decrease, the proportion of trap levels existing at the interface between the oxide film and the nitride film (oxynitride) increases. Therefore, in erasing the stored charges to the 81 substrate side through the oxide film,
This has the effect of significantly shortening the erasure time and allowing high-speed access. Furthermore, as the specific resistance of the nitride film increases, the rate at which charges captured and stored at the interface between the oxide film and the nitride film are released through the nitride film decreases, and the memory retention characteristics are significantly improved. Furthermore, due to the increase in the resistivity of the nitride film, the thickness of the nitride film can be made thinner (100 to 700X), so the electric field strength of the gate insulating film (oxide film - nitride film) can be increased, and the write loss time can be reduced. The present invention is very effective because it can significantly shorten the time period and also reduce the write/erase voltage.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本発明のMNOS型不揮発性メモリの構造図
。第2図(、)〜(g)は、第11i!!Iの工程図。 第5図は本発明のMNOS屋不揮発性メモリの記憶保持
特性図。第4図は、消去時間のパルス電圧依存性を示す
図。 1・・・・−i”型S1基板 2・・・・・・酸化膜(15〜50X)3・・・−・・
オキシナイトライド(100〜700X4・・・・・・
酸素イオン打ち込み 5・・・・・・ポリシリコン(ゲート電極)6・・・・
・・リンイオン打ち込み 8・・・・・・絶間絶M膜 9・・・・・・アルミ配線 10・・・窒化膜 以  上 出意人 株式会社諏訪精工舎 第1図 ;工;====;こ−52 C) 一一−−−−−−−−−二\−I 算2図 一本絡叩のMNO5型不1!発奇1」リ−−= tt来
   ・I to’    to”    1o*    tot 
   1tyll    io”時間(5aconds
 ) 第3図 第4図
FIG. 1 is a structural diagram of the MNOS type nonvolatile memory of the present invention. Figures 2(,) to (g) show the 11i! ! I process diagram. FIG. 5 is a memory retention characteristic diagram of the MNOS nonvolatile memory of the present invention. FIG. 4 is a diagram showing the pulse voltage dependence of erase time. 1...-i'' type S1 substrate 2... Oxide film (15-50X) 3...-
Oxynitride (100-700X4...
Oxygen ion implantation 5... Polysilicon (gate electrode) 6...
... Phosphorus ion implantation 8 ... Discontinuous M film 9 ... Aluminum wiring 10 ... Nitride film or more Author: Suwa Seikosha Co., Ltd. Figure 1; ;Ko-52 C) 11---------2\-I MNO5 type non-1 with arithmetic 2 figures and one hit! I to'to'' 1o* tot
1tyll io” hours (5aconds
) Figure 3 Figure 4

Claims (3)

【特許請求の範囲】[Claims] (1)酸化膜と窒化膜の界面に電荷捕獲準位を有するM
NOS型不揮発性メモリにおいて、窒化膜SiN_xに
微量の酸素を混入して、窒化膜SiN_xをオキシナイ
トライドSiN_xO_y化したことを特徴とするMN
OS型不揮発性メモリ。
(1) M with a charge trapping level at the interface between the oxide film and the nitride film
An MN characterized in that, in a NOS type nonvolatile memory, a trace amount of oxygen is mixed into a nitride film SiN_x to turn the nitride film SiN_x into oxynitride SiN_xO_y.
OS type non-volatile memory.
(2)前記オキシナイトライドSiN_xO_yにおい
て、酸素を1〜20at%含むことを特徴とする特許請
求の範囲第1項記載のMNOS型不揮発性メモリ。
(2) The MNOS nonvolatile memory according to claim 1, wherein the oxynitride SiN_xO_y contains 1 to 20 at% of oxygen.
(3)前記オキシナイトライドSiN_xO_yの膜厚
が100〜700Åであることを特徴とする特許請求の
範囲第1項記載のMNOS型不揮発性メモリ。
(3) The MNOS nonvolatile memory according to claim 1, wherein the oxynitride SiN_xO_y has a film thickness of 100 to 700 Å.
JP4544885A 1985-03-07 1985-03-07 Mnos type non-volatile memory Pending JPS61204981A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4544885A JPS61204981A (en) 1985-03-07 1985-03-07 Mnos type non-volatile memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4544885A JPS61204981A (en) 1985-03-07 1985-03-07 Mnos type non-volatile memory

Publications (1)

Publication Number Publication Date
JPS61204981A true JPS61204981A (en) 1986-09-11

Family

ID=12719619

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4544885A Pending JPS61204981A (en) 1985-03-07 1985-03-07 Mnos type non-volatile memory

Country Status (1)

Country Link
JP (1) JPS61204981A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100361537B1 (en) * 1995-12-27 2003-02-05 주식회사 하이닉스반도체 Method for manufacturing semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100361537B1 (en) * 1995-12-27 2003-02-05 주식회사 하이닉스반도체 Method for manufacturing semiconductor device

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