JPS61202937U - - Google Patents
Info
- Publication number
- JPS61202937U JPS61202937U JP8475185U JP8475185U JPS61202937U JP S61202937 U JPS61202937 U JP S61202937U JP 8475185 U JP8475185 U JP 8475185U JP 8475185 U JP8475185 U JP 8475185U JP S61202937 U JPS61202937 U JP S61202937U
- Authority
- JP
- Japan
- Prior art keywords
- fez
- frequency signal
- locked loop
- loop circuit
- crystal oscillator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000013078 crystal Substances 0.000 claims description 3
- 230000010355 oscillation Effects 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000003321 amplification Effects 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Description
第１図および第２図は本考案の局部発振回路の
一実施例を示す構成図、第３図は従来の衛星航法
装置に使用されている受信機の一例を示す構成図
である。
１……水晶発振器、２……周波数てい倍回路、
３……高周波増幅回路、４……検波回路、５……
信号処理装置、６……位相比較器、７……電圧制
御発振器、８，９……分周器、１０，１１……電
力分配器。
1 and 2 are block diagrams showing one embodiment of the local oscillation circuit of the present invention, and FIG. 3 is a block diagram showing an example of a receiver used in a conventional satellite navigation device. 1...Crystal oscillator, 2...Frequency doubler circuit,
3...High frequency amplification circuit, 4...Detection circuit, 5...
Signal processing device, 6... Phase comparator, 7... Voltage controlled oscillator, 8, 9... Frequency divider, 10, 11... Power divider.
Claims (1)
、この水晶発振器の出力を基にして高周波信号を
発生するフエズ・ロツクド・ループ回路と、この
フエズ・ロツクド・ループ回路の途中に挿入され
所望の周波数信号を取り出して負荷に供給する電
力分配器とを具備してなる局部発振回路。 A crystal oscillator that generates a reference frequency signal, a fez locked loop circuit that generates a high frequency signal based on the output of this crystal oscillator, and a fez locked loop circuit that is inserted in the middle of this fez locked loop circuit to generate a desired frequency signal. A local oscillation circuit comprising a power divider that takes out the power and supplies it to the load.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8475185U JPS61202937U (en) | 1985-06-05 | 1985-06-05 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8475185U JPS61202937U (en) | 1985-06-05 | 1985-06-05 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61202937U true JPS61202937U (en) | 1986-12-20 |
Family
ID=30634521
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8475185U Pending JPS61202937U (en) | 1985-06-05 | 1985-06-05 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61202937U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009188850A (en) * | 2008-02-08 | 2009-08-20 | Nec Electronics Corp | Local signal generating circuit |
-
1985
- 1985-06-05 JP JP8475185U patent/JPS61202937U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009188850A (en) * | 2008-02-08 | 2009-08-20 | Nec Electronics Corp | Local signal generating circuit |
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