JPS62191227U - - Google Patents
Info
- Publication number
- JPS62191227U JPS62191227U JP8004586U JP8004586U JPS62191227U JP S62191227 U JPS62191227 U JP S62191227U JP 8004586 U JP8004586 U JP 8004586U JP 8004586 U JP8004586 U JP 8004586U JP S62191227 U JPS62191227 U JP S62191227U
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- signal
- output
- controlled oscillator
- loop filter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000010355 oscillation Effects 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Channel Selection Circuits, Automatic Tuning Circuits (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Description
第1図は本考案の一実施例のブロツク図である
。第2図は従来の位相同期捕捉回路のブロツク図
である。
1…混合器、2…位相検波器、3…ループフイ
ルタ、4…加算増幅器、5…電圧制御発振器、6
…基準信号発生器、7…掃引信号発生器、8…電
圧保持回路。
FIG. 1 is a block diagram of one embodiment of the present invention. FIG. 2 is a block diagram of a conventional phase lock acquisition circuit. DESCRIPTION OF SYMBOLS 1...Mixer, 2...Phase detector, 3...Loop filter, 4...Summing amplifier, 5...Voltage controlled oscillator, 6
...Reference signal generator, 7...Sweep signal generator, 8...Voltage holding circuit.
Claims (1)
と、前記受信入力信号の周波数を前記電圧制御発
振器の出力信号を加えて変換する混合器と、前記
混合器の出力信号と基準信号発生器の出力信号の
位相差を検出する位相検波器と、前記位相検波器
の出力から低周波成分を含む直流電圧を得るルー
プフイルタと、前記ループフイルタの出力信号と
掃引信号発生器の出力信号を加算し、その出力を
前記電圧制御発振器へ発振周波数制御電圧として
加える加算増幅器とを含む負帰還ループによつて
構成する位相同期回路において、前記受信信号の
捕捉ができなくなる直前の前記ループフイルタの
出力電圧を保持し、その保持した電圧を受信信号
の再捕捉時に発振周波数制御電圧として前記電圧
制御発振器に加える電圧保持回路を設けたことを
特徴とする位相同期捕捉回路。 A voltage controlled oscillator for capturing a received input signal, a mixer for converting the frequency of the received input signal by adding an output signal of the voltage controlled oscillator, and an output signal of the mixer and an output signal of a reference signal generator. a phase detector that detects the phase difference between the phase detectors, a loop filter that obtains a DC voltage including low frequency components from the output of the phase detector, and a loop filter that adds the output signal of the loop filter and the output signal of the sweep signal generator; In a phase synchronization circuit constituted by a negative feedback loop including a summing amplifier that applies an output to the voltage controlled oscillator as an oscillation frequency control voltage, the output voltage of the loop filter immediately before it becomes impossible to capture the received signal is held. A phase synchronization acquisition circuit comprising: a voltage holding circuit that applies the held voltage to the voltage controlled oscillator as an oscillation frequency control voltage when re-capturing a received signal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8004586U JPS62191227U (en) | 1986-05-27 | 1986-05-27 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8004586U JPS62191227U (en) | 1986-05-27 | 1986-05-27 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62191227U true JPS62191227U (en) | 1987-12-05 |
Family
ID=30930489
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8004586U Pending JPS62191227U (en) | 1986-05-27 | 1986-05-27 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62191227U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06204863A (en) * | 1993-01-06 | 1994-07-22 | Sony Corp | Pll circuit |
-
1986
- 1986-05-27 JP JP8004586U patent/JPS62191227U/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06204863A (en) * | 1993-01-06 | 1994-07-22 | Sony Corp | Pll circuit |