JPS61201249U - - Google Patents
Info
- Publication number
- JPS61201249U JPS61201249U JP8586585U JP8586585U JPS61201249U JP S61201249 U JPS61201249 U JP S61201249U JP 8586585 U JP8586585 U JP 8586585U JP 8586585 U JP8586585 U JP 8586585U JP S61201249 U JPS61201249 U JP S61201249U
- Authority
- JP
- Japan
- Prior art keywords
- main relay
- main
- control circuit
- circuit
- relay control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000005856 abnormality Effects 0.000 claims 1
- 238000005259 measurement Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Relay Circuits (AREA)
Description
第１図は本考案の基本的構成図、第２図は実施
例の電喜回路図、第３図はその制御の全体を示す
フローチヤート、第４図はそのメインルーチンの
フローチヤート、第５図はその割込みルーチンの
フローチヤートを示す。
ＭＣ…主回路、ＭＲ…メインリレー、ＰＳ…電
源スイツチ、Ｃ…メインリレー制御回路、Ｃ１…
計時手段、Ｃ２…報知手段、１０…マイクロコン
ピユータ、２６…安定化電源、２８…トランジス
タ、３０…ＮＯＲ回路。
Fig. 1 is a basic configuration diagram of the present invention, Fig. 2 is an electrical circuit diagram of an embodiment, Fig. 3 is a flow chart showing the entire control, Fig. 4 is a flow chart of its main routine, and Fig. 5 is a flow chart of the main routine. The figure shows a flowchart of the interrupt routine. MC...Main circuit, MR...Main relay, PS...Power switch, C...Main relay control circuit, C1...
Clock means, C2... Notification means, 10... Microcomputer, 26... Stabilized power supply, 28... Transistor, 30... NOR circuit.
Claims (1)
を断続するメインリレーを、電源スイツチの操作
に基づき励磁制御するメインリレー制御回路にお
いて、 前記電源スイツチ操の操作に基づき前記メイン
リレーの励磁を中止する時点から前記主回路の制
御の実用時間を計時する計時手段と、 該計時手段による計時結果が所定値以上となつ
たとき異常を報知する報知手段と を備えることを特徴とするメインリレー制御回路
。[Scope of Claim for Utility Model Registration] In a main relay control circuit that excites and controls a main relay that intermittents power supplied to a main circuit that executes predetermined control based on the operation of a power switch, and an alarm means for notifying an abnormality when the time measurement result by the timing means exceeds a predetermined value. A main relay control circuit featuring:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8586585U JPH041625Y2 (en) | 1985-06-06 | 1985-06-06 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8586585U JPH041625Y2 (en) | 1985-06-06 | 1985-06-06 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61201249U true JPS61201249U (en) | 1986-12-17 |
| JPH041625Y2 JPH041625Y2 (en) | 1992-01-21 |
Family
ID=30636645
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8586585U Expired JPH041625Y2 (en) | 1985-06-06 | 1985-06-06 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH041625Y2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003007186A (en) * | 2001-06-19 | 2003-01-10 | Ricoh Co Ltd | Power dispatching device having interlock circuit, and picture forming device |
-
1985
- 1985-06-06 JP JP8586585U patent/JPH041625Y2/ja not_active Expired
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003007186A (en) * | 2001-06-19 | 2003-01-10 | Ricoh Co Ltd | Power dispatching device having interlock circuit, and picture forming device |
| JP4600962B2 (en) * | 2001-06-19 | 2010-12-22 | 株式会社リコー | FEEDING DEVICE HAVING INTERLOCK CIRCUIT AND IMAGE FORMING DEVICE |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH041625Y2 (en) | 1992-01-21 |