JPS6418325U - - Google Patents

Info

Publication number
JPS6418325U
JPS6418325U JP11164087U JP11164087U JPS6418325U JP S6418325 U JPS6418325 U JP S6418325U JP 11164087 U JP11164087 U JP 11164087U JP 11164087 U JP11164087 U JP 11164087U JP S6418325 U JPS6418325 U JP S6418325U
Authority
JP
Japan
Prior art keywords
entire system
supplying
microcomputer device
supply circuit
power supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11164087U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP11164087U priority Critical patent/JPS6418325U/ja
Publication of JPS6418325U publication Critical patent/JPS6418325U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案のマイクロコンピユータ装置の
電源回路を示す電気回路図、第2図は本考案の電
源回路の動作を示すタイムチヤート、第3図は本
考案の電源回路の動作シーケンスを示す図、第4
図は従来のマイコンを用いたシステムの構成図、
第5図は従来の電源回路の構成を示す図である。 {1……ウオツチドツグタイマー、4……フリ
ツプフロツプ回路、}(異常信号発生手段)、6
……スイツチング用トランジスタ(電圧区分供給
手段)、7,8……ダイオード、9……CPU、
10……3端子レギユレーター。
Fig. 1 is an electric circuit diagram showing the power supply circuit of the microcomputer device of the invention, Fig. 2 is a time chart showing the operation of the power supply circuit of the invention, and Fig. 3 is a diagram showing the operation sequence of the power supply circuit of the invention. , 4th
The figure shows a configuration diagram of a system using a conventional microcomputer.
FIG. 5 is a diagram showing the configuration of a conventional power supply circuit. {1...Watchdog timer, 4...Flip-flop circuit,} (abnormal signal generating means), 6
... Switching transistor (voltage division supply means), 7, 8 ... Diode, 9 ... CPU,
10...3 terminal regulator.

Claims (1)

【実用新案登録請求の範囲】 RAMのメモリー内容をバツクアツプにより保
持するようにしたマイクロコンピユータ装置の電
源回路において、 マイクロコンピユータ装置のシステム全体に電
源を供給する手段と、 上記システム全体のいずれかに異常があつたと
きにこれを検出し異常信号を発生する手段と、 平常は上記システム全体に大電圧の電源を供給
し、異常時には上記RAMのみに小電圧を供給す
る電圧区分供給手段と、 を具備したことを特徴とするマイクロコンピユ
ータ装置の電源回路。
[Scope of Claim for Utility Model Registration] In the power supply circuit of a microcomputer device that retains the memory contents of RAM by backing up, there is an abnormality in the means for supplying power to the entire system of the microcomputer device and in any of the above-mentioned entire system. means for detecting this and generating an abnormal signal when it occurs, and voltage division supply means for normally supplying a large voltage power to the entire system, and supplying a small voltage only to the RAM in the event of an abnormality. A power supply circuit for a microcomputer device characterized by:
JP11164087U 1987-07-21 1987-07-21 Pending JPS6418325U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11164087U JPS6418325U (en) 1987-07-21 1987-07-21

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11164087U JPS6418325U (en) 1987-07-21 1987-07-21

Publications (1)

Publication Number Publication Date
JPS6418325U true JPS6418325U (en) 1989-01-30

Family

ID=31349866

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11164087U Pending JPS6418325U (en) 1987-07-21 1987-07-21

Country Status (1)

Country Link
JP (1) JPS6418325U (en)

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