JPS61200246U - - Google Patents
Info
- Publication number
- JPS61200246U JPS61200246U JP8484185U JP8484185U JPS61200246U JP S61200246 U JPS61200246 U JP S61200246U JP 8484185 U JP8484185 U JP 8484185U JP 8484185 U JP8484185 U JP 8484185U JP S61200246 U JPS61200246 U JP S61200246U
- Authority
- JP
- Japan
- Prior art keywords
- drive circuit
- recording device
- heat generating
- generating element
- element array
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010438 heat treatment Methods 0.000 claims description 3
- 239000000758 substrate Substances 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Landscapes
- Electronic Switches (AREA)
- Wire Bonding (AREA)
Description
第1図は本考案の一実施例を示す断面図、第2
図、第3図はそれぞれ本考案の他の実施例を示す
断面図、第4図はダイレクトドライブ型サーマル
ヘツドの回路図、第5図は従来例を示す断面図で
ある。 1……発熱素子列、3……リード、4……駆動
回路、13……基板。
図、第3図はそれぞれ本考案の他の実施例を示す
断面図、第4図はダイレクトドライブ型サーマル
ヘツドの回路図、第5図は従来例を示す断面図で
ある。 1……発熱素子列、3……リード、4……駆動
回路、13……基板。
Claims (1)
- 【実用新案登録請求の範囲】 (1) 発熱素子列のリード端と前記発熱素子列を
駆動する駆動回路とをワイヤボンデイングにより
接続してなるサーマルヘツドを有する感熱記録装
置において、前記駆動回路のボンデイング面を前
記発熱素子列のリード端のボンデイング面とほぼ
同じ高さ、またはこれより低い位置としたことを
特徴とする感熱記録装置。 (2) 前記駆動回路が前記発熱素子列の搭載され
た基板に形成された凹部に搭載されている実用新
案登録請求の範囲第1項記載の感熱記録装置。 (3) 前記駆動回路と前記発熱素子列とが別個の
基板に搭載され、かつこれらの基板が他の基板に
駆動回路のボンデイング面が発熱素子列のリード
端のボンデイング面と同じ高さ、またはこれより
低い位置となるよう段差を設けて搭載されている
実用新案登録請求の範囲第1項記載の感熱記録装
置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8484185U JPS61200246U (ja) | 1985-06-05 | 1985-06-05 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8484185U JPS61200246U (ja) | 1985-06-05 | 1985-06-05 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61200246U true JPS61200246U (ja) | 1986-12-15 |
Family
ID=30634690
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8484185U Pending JPS61200246U (ja) | 1985-06-05 | 1985-06-05 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61200246U (ja) |
-
1985
- 1985-06-05 JP JP8484185U patent/JPS61200246U/ja active Pending
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS61200246U (ja) | ||
JPS60194533U (ja) | サ−マルヘツド | |
JPS63197142U (ja) | ||
JPS60182149U (ja) | サ−マルヘツド | |
JPH047142U (ja) | ||
JPH02126845U (ja) | ||
JPH02108033U (ja) | ||
JPS60181884U (ja) | 発熱体基板の保持フレ−ム | |
JPS58107844U (ja) | サ−マルヘツド | |
JPH01127750U (ja) | ||
JPS5924342U (ja) | サ−マルヘツド | |
JPH0288749U (ja) | ||
JPS60157243U (ja) | サ−マルヘツド | |
JPS61115652U (ja) | ||
JPH0180432U (ja) | ||
JPS63106644U (ja) | ||
JPS63197141U (ja) | ||
JPH0234251U (ja) | ||
JPH045940U (ja) | ||
JPS60117151U (ja) | サ−マルプリントヘツド | |
JPS63154236U (ja) | ||
JPS603046U (ja) | サ−マルヘツド | |
JPH0227344U (ja) | ||
JPH0390957U (ja) | ||
JPS5874540U (ja) | サ−マルヘツド |