JPS58107844U - サ−マルヘツド - Google Patents

サ−マルヘツド

Info

Publication number
JPS58107844U
JPS58107844U JP1982003124U JP312482U JPS58107844U JP S58107844 U JPS58107844 U JP S58107844U JP 1982003124 U JP1982003124 U JP 1982003124U JP 312482 U JP312482 U JP 312482U JP S58107844 U JPS58107844 U JP S58107844U
Authority
JP
Japan
Prior art keywords
thermal head
element array
backflow prevention
heat sink
prevention element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1982003124U
Other languages
English (en)
Inventor
滝沢　敬一
Original Assignee
株式会社東芝
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社東芝 filed Critical 株式会社東芝
Priority to JP1982003124U priority Critical patent/JPS58107844U/ja
Publication of JPS58107844U publication Critical patent/JPS58107844U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/494—Connecting portions
    • H01L2224/4943—Connecting portions the connecting portions being staggered
    • H01L2224/49431—Connecting portions the connecting portions being staggered on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/494—Connecting portions
    • H01L2224/4943—Connecting portions the connecting portions being staggered
    • H01L2224/49433—Connecting portions the connecting portions being staggered outside the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electronic Switches (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【図面の簡単な説明】
第１図及び第２図はサーマルヘッドに形成する逆流防止
素子アレイやマトリックス回路の回路構成（アノード・
コモンΦタイプとアイソレーショ　−ン・タイプ）を示
す回路図、第３図は第１図に対応した従来のサーマルベ
ッドを示す平面図、第４図は第３図のＡ−Ａ’線で切断
し矢印方向に見た断面図、第５図はこの考案の一実施例
に係るサーマルヘッドを示す断面図、第６図及び第７図
はこの考案の他の実施例を示す断面図である。 １・・・・・・発熱抵抗体、２・・・・・・逆流防止素
子アレイ、３・・・・・・マトリックス回路、４・・・
・・・共通電極、５・・・・・・個別電極、６・・・・
・・ヒートシンク、７・・・・・・第１の、基板、・８
・・・・・・第２の基板、９，１０・・・・・・リード
、１１．１２・・・・・・ワイヤ、１３・・・・・・凸
部。。 第２図 第３図

Claims (2)

    【実用新案登録請求の範囲】
  1. （１）　　駿−トシンク上に設けられ複数の発熱抵抗体
    及びそれに続くリードを有する第１の基板と、前記ヒー
    トシンク上に設けられ÷トリックス回路及びそれに続（
    複数のリードを有する第２の基板と、前記各リードにワ
    イヤによりボンディング接続された逆流防止素子アレイ
    とからなるサーマルヘッドにおいて、 前記各基板の表面と前記逆流防止素子アレイの表面とを
    略一致させたことを特徴とするサーマルヘッド。
  2. （２）前記ヒートシンクに凸部を設け、この凸部に前記
    逆流防止素子アレイを固着した実用新案登録請求の範囲
    第１項記載のサーマルヘッド。
JP1982003124U 1982-01-13 1982-01-13 サ−マルヘツド Pending JPS58107844U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1982003124U JPS58107844U (ja) 1982-01-13 1982-01-13 サ−マルヘツド

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1982003124U JPS58107844U (ja) 1982-01-13 1982-01-13 サ−マルヘツド

Publications (1)

Publication Number Publication Date
JPS58107844U true JPS58107844U (ja) 1983-07-22

Family

ID=30016073

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1982003124U Pending JPS58107844U (ja) 1982-01-13 1982-01-13 サ−マルヘツド

Country Status (1)

Country Link
JP (1) JPS58107844U (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61193474A (ja) * 1985-02-21 1986-08-27 Rohm Co Ltd 半導体装置
JPH0582550U (ja) * 1992-04-14 1993-11-09 セイコー電子工業株式会社 サーマルヘッド基板

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52155542A (en) * 1976-06-18 1977-12-24 Nec Corp Thermal head device
JPS5324846A (en) * 1976-08-18 1978-03-08 Matsushita Electric Ind Co Ltd Thermal head device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52155542A (en) * 1976-06-18 1977-12-24 Nec Corp Thermal head device
JPS5324846A (en) * 1976-08-18 1978-03-08 Matsushita Electric Ind Co Ltd Thermal head device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61193474A (ja) * 1985-02-21 1986-08-27 Rohm Co Ltd 半導体装置
JPH0582550U (ja) * 1992-04-14 1993-11-09 セイコー電子工業株式会社 サーマルヘッド基板

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