JPS61199952U - - Google Patents

Info

Publication number
JPS61199952U
JPS61199952U JP8266985U JP8266985U JPS61199952U JP S61199952 U JPS61199952 U JP S61199952U JP 8266985 U JP8266985 U JP 8266985U JP 8266985 U JP8266985 U JP 8266985U JP S61199952 U JPS61199952 U JP S61199952U
Authority
JP
Japan
Prior art keywords
pulse
circuit
decoder
frame
flip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8266985U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP8266985U priority Critical patent/JPS61199952U/ja
Publication of JPS61199952U publication Critical patent/JPS61199952U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Time-Division Multiplex Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP8266985U 1985-06-01 1985-06-01 Pending JPS61199952U (enrdf_load_html_response)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8266985U JPS61199952U (enrdf_load_html_response) 1985-06-01 1985-06-01

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8266985U JPS61199952U (enrdf_load_html_response) 1985-06-01 1985-06-01

Publications (1)

Publication Number Publication Date
JPS61199952U true JPS61199952U (enrdf_load_html_response) 1986-12-15

Family

ID=30630593

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8266985U Pending JPS61199952U (enrdf_load_html_response) 1985-06-01 1985-06-01

Country Status (1)

Country Link
JP (1) JPS61199952U (enrdf_load_html_response)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57186859A (en) * 1981-05-13 1982-11-17 Nippon Telegr & Teleph Corp <Ntt> Frame synchronizing circuit
JPS6042957A (ja) * 1983-08-19 1985-03-07 Sanyo Electric Co Ltd フレ−ム同期信号の検出回路

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57186859A (en) * 1981-05-13 1982-11-17 Nippon Telegr & Teleph Corp <Ntt> Frame synchronizing circuit
JPS6042957A (ja) * 1983-08-19 1985-03-07 Sanyo Electric Co Ltd フレ−ム同期信号の検出回路

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