JPS57162894A - Clock pulse reproducing circuit - Google Patents
Clock pulse reproducing circuitInfo
- Publication number
- JPS57162894A JPS57162894A JP56048062A JP4806281A JPS57162894A JP S57162894 A JPS57162894 A JP S57162894A JP 56048062 A JP56048062 A JP 56048062A JP 4806281 A JP4806281 A JP 4806281A JP S57162894 A JPS57162894 A JP S57162894A
- Authority
- JP
- Japan
- Prior art keywords
- output
- circuit
- clock pulse
- logical
- goes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000005070 sampling Methods 0.000 abstract 3
- 230000000875 corresponding Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/025—Systems for the transmission of digital non-picture data, e.g. of text during the active part of a television frame
- H04N7/035—Circuits for the digital non-picture data signal, e.g. for slicing of the data signal, for regeneration of the data-clock signal, for error detection or correction of the data signal
- H04N7/0352—Circuits for the digital non-picture data signal, e.g. for slicing of the data signal, for regeneration of the data-clock signal, for error detection or correction of the data signal for regeneration of the clock signal
Abstract
PURPOSE:To achieve stability against external disturbance and to prevent sampling mistake, by taking the synchronism of a data sampling pulse in the packet unit of character multiplex broadcast. CONSTITUTION:When a clock run-in signal is risen between the leading of an output of the 3rd output terminal 523 of a delay device 52 and that of the 4th output terminal 524, an output of an AND circuit 573 out of a D type flip-flop circuit group 56(561-N) goes to low level and the output of a circuit 564 goes to high level. Thus, the output of an AND circuit 573 is logical 1 and the output of a counter 583 counts by +1. Thus, at each clock run-in signal one period, logical 1 is obtained from an AND circuit located at the leading. The clock pulse train corresponding to a counter having the most count value is selected at a data sampling pulse.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56048062A JPH0231553B2 (en) | 1981-03-31 | 1981-03-31 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56048062A JPH0231553B2 (en) | 1981-03-31 | 1981-03-31 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57162894A true JPS57162894A (en) | 1982-10-06 |
JPH0231553B2 JPH0231553B2 (en) | 1990-07-13 |
Family
ID=12792856
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56048062A Expired - Lifetime JPH0231553B2 (en) | 1981-03-31 | 1981-03-31 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0231553B2 (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60248087A (en) * | 1984-05-24 | 1985-12-07 | Toshiba Corp | Sampling clock reproducing circuit |
JPS60248086A (en) * | 1984-05-24 | 1985-12-07 | Toshiba Corp | Sampling clock reproducing circuit |
JPS63202129A (en) * | 1987-02-17 | 1988-08-22 | Sony Corp | Synchronizing oscillation circuit |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0613608U (en) * | 1992-07-22 | 1994-02-22 | 株式会社日糧機工 | Stand |
-
1981
- 1981-03-31 JP JP56048062A patent/JPH0231553B2/ja not_active Expired - Lifetime
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60248087A (en) * | 1984-05-24 | 1985-12-07 | Toshiba Corp | Sampling clock reproducing circuit |
JPS60248086A (en) * | 1984-05-24 | 1985-12-07 | Toshiba Corp | Sampling clock reproducing circuit |
JPH0453152B2 (en) * | 1984-05-24 | 1992-08-25 | Toshiba Kk | |
JPH0453153B2 (en) * | 1984-05-24 | 1992-08-25 | Toshiba Kk | |
JPS63202129A (en) * | 1987-02-17 | 1988-08-22 | Sony Corp | Synchronizing oscillation circuit |
Also Published As
Publication number | Publication date |
---|---|
JPH0231553B2 (en) | 1990-07-13 |
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