JPS61198910A - Switched capacitor type transversal filter - Google Patents

Abstract

PURPOSE:To decrease number of transversal filter circuits by connecting a series circuit each comprising a switch and a capacitor, a switched capacitor circuit, a weighting circuit and a product sum circuit between the input and output terminals of the 1st operational amplifier. CONSTITUTION:Switches 11, 12 are switched by each clock. An input signal is stored sequentially in capacitors CM1-CM4. In this case, signals x(n-1)-x(n-3) are stored respectively in the capacitors. The input signal x(n) is stored in the capacitor CM1 and inputted to a product sum circuit section, where a factor of C2/CA is multiplied and stored in a capacitor CA. Then the input signal is outputted sequentially from the capacitors CM4, CM3 and processed similarly. Then the input signal x(n+1) is incoming to the input and stored in the capacitor CM2 and inputted to the product sum circuit section. Then the signal x(n) x(n-1) x(n-2) is outputted in the order of CM1 CM4 CM3 and the product sum is obtained by the capacitor CA.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a switched capacitor type transformer filter.

The transversal filter is the first one (as shown in
Generally, it is composed of a delay device 1, an adder 2, and a multiplier 3. Therefore, by replacing these components with switched capacitor (SC) circuits, a transversal filter using the SC circuit can be realized. FIG. 2 shows a configuration example. In the figure, reference numerals 11 and 12 are switches driven by clocks φl and φ2, respectively, shown in FIG. 2 Φ), which are closed when each clock is at high level and open when each clock is at low level. The same number 2 is a capacitor, the same number 3 is an operational amplifier, and the same numbers 41 and 42 are respectively shown in Figure 2 (
D) This is a switch driven by the clocks φ10 and φ20 indicated by the IC. 5-1 to 5-(N-1) are SC delay devices, and the same number 6 is an SC product-sum circuit, and 7 Iklo multiplication coefficient is given by CI/CA (i = 0 to (N-1)). It will be done. Therefore, the transfer function is given by.

Such a conventional SCC transversal filter requires one tap, one operational amplifier, 10 switches, and three capacitors, and the circuit scale is large when constructing a high-order transversal filter. It has the disadvantage of becoming.

An object of the present invention is to provide an SC type transversal filter that does not require a large circuit scale even for high-order transversal filters.

The filter of the present invention includes a plurality of series circuits each connected between an input terminal and an output terminal of a first operational amplifier and each consisting of a direct connection of a switch and a capacitor, and sampling an input signal at a predetermined period Tl. It comprises a switched capacitor circuit, a weighting circuit, and a product-sum circuit having an integrating capacitor, and the output of the switched capacitor circuit is sequentially given to the plurality of series circuits at a period T1,
Within the period T1, each output of the plurality of series circuits is weighted by the weighting circuit and then accumulated in the product-sum circuit, and the output from the product-sum circuit for each period T1 is used as a filter output.

FIG. 3(a) is a circuit diagram showing one embodiment of the present invention.

This embodiment is composed of a delay circuit section and a product-sum circuit section. Each switch is opened and closed by each clock having the timing shown in FIG. The input signal is capacitor CM1
"'-CM4 is sequentially stored. For example, the input signal X(n) at time n is stored in the capacitor CMI. At this time, the input signals X(n-1) to X(n) are stored in the capacitors CM4 to CM2, respectively. -3> is stored in the capacitor CMI.The input signal The input signal x(n-L) is output from CM4, inputted to the product-sum circuit section, multiplied by C2/C, and cumulatively added to six capacitors.Then, the input signal
(n-2) is input signal X(n-2) from capacitor c12.
3) are output and similarly processed.

As a result, the capacitor CAK (y of the following equation) is stored.

Y(n)=' (Ctx(n)+Czx(n-1)+(
A Cax (n-2) + C4x (n-3)) (2) This y (
n) is taken out as an output during the period in which the clock φr is at a high level.

Next, the input signal X(n+1) arrives at the input, is stored in the capacitor CM2, and is simultaneously input to the product-sum circuit section. Next, in the order of CVt → CM4 → CM3, X (11) →
(n-L)→x (n-2) is output, and the sum of these products is obtained for the capacitor C. Thereafter, similar operations are repeated. The capacitor CI in FIG. 3(a) is the fourth
It is composed of a capacitor array as shown in the figure. By controlling the opening and closing of fr-switches connected to each capacitor, 927 capacitance values can be achieved. Generally, if the number of capacitors connected in parallel is n, two capacitance values can be achieved. In the figure, CI is a unit capacitance, for example, a value of about 0.1 to 0.2 PF.

In this way, in this embodiment, the number of elements used is significantly reduced compared to the conventional circuit configuration. Further, the types of switch driving clock signals are increasing, but for example, clocks φAX to φ4. φB1 to φB4 are simply shifted in phase, and the clock generation circuit is not complicated.

As described above, the present invention has the effect of reducing the circuit scale of a transversal filter using an SC circuit.

[Brief explanation of drawings]

FIG. 1 is a diagram showing the configuration of a general transversal filter, FIG. 2 is a diagram for explaining a conventional example, FIG. 3 is a diagram for explaining an embodiment of the present invention, and FIG. 4 is a diagram for explaining a capacitor. FIG. 2 is a diagram showing an array. In the figure, 1.5-t to 5-(N-1) delay devices, 2.
... Adder, 3... Multiplier, 4. Mountain...
Input terminal, 5... Output terminal, 11, 12.41
,42... ···switch. Agent: Susumu Uchihara, patent attorney 3
tl (λ) Thatch + top

Claims (1)

[Claims] A plurality of series circuits connected between the input terminal and the output terminal of the first operational amplifier each consisting of a series connection of a switch and a capacitor, a switched capacitor circuit that samples the input signal at a predetermined period T_1, and weighting. and a product-sum circuit having an integrating capacitor, the output of the switched capacitor circuit is sequentially given to the plurality of series circuits in a period T_1, and within the period T_1, each output of the plurality of series circuits is weighted in the weighting circuit and then accumulated in the product-sum circuit;
A switched capacitor type transversal filter characterized in that the output from the product-sum circuit at each period T_1 is used as a filter output.