JPS6119286A - Correction circuit of semiconductor linear image sensor - Google Patents

Correction circuit of semiconductor linear image sensor

Info

Publication number
JPS6119286A
JPS6119286A JP59139029A JP13902984A JPS6119286A JP S6119286 A JPS6119286 A JP S6119286A JP 59139029 A JP59139029 A JP 59139029A JP 13902984 A JP13902984 A JP 13902984A JP S6119286 A JPS6119286 A JP S6119286A
Authority
JP
Japan
Prior art keywords
memory
image sensor
pixels
linear image
odd
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59139029A
Other languages
Japanese (ja)
Inventor
Akira Inagaki
晃 稲垣
Yukio Kenbo
行雄 見坊
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP59139029A priority Critical patent/JPS6119286A/en
Publication of JPS6119286A publication Critical patent/JPS6119286A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To correct a drift and to detect a subject with high accuracy by fetching odd or even pixel signals whichever is larger, from the 1st memory, then fetching a signal corresponding to the smaller pixel from the 2nd memory. CONSTITUTION:A detection signal V from a linear image sensor part 6 is A/D converted 11 and stored in a medmory 14, while an average Voffset of adjacent pixel is calculated in a CPU15 as shown in an expression I. The Voffset is obtained and added 16 at every line of (N+1) pixels, and stored in a memory 14A. Data B0-BN on (N+1) number of pixels are stored in the memory 14A in the same period as shown in an expression II. Assuming that the level difference between odd and even pixels among several frames is approximately constant delta and levels V0-V2 of even pixels are larger by delta than odd pixels V1, V3..., the even pixels V0, V1... from the memory 14 and B1, B2...=V1+delta, V2+delta... corresponding to the odd pixels from the memory 14A are transmitted to the CPU15, and their positions are detected. The higher levels of the detection signals are approximately equal, and the adverse influence caused by the drift can be eliminated.

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明は、半導体リニアイメージセンサの補正回路に係
り、特に半導体露光装置等の高精度な位置決めに用いる
のに好適な半導体リニアイメージセンサの補正回路に関
する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a correction circuit for a semiconductor linear image sensor, and in particular, a correction circuit for a semiconductor linear image sensor suitable for use in highly accurate positioning of semiconductor exposure equipment, etc. Regarding.

〔発明の背景〕[Background of the invention]

第1図に半導体リニアイメージセンサ部6とその周辺回
路を示す。ここでリニアイメージセンサ1は一絵素おき
にオド、イーブンと別れており出力も別々にとり出せる
ようになっている。
FIG. 1 shows the semiconductor linear image sensor section 6 and its peripheral circuits. Here, the linear image sensor 1 is arranged so that every other pixel is divided into odd and even pixels, so that the outputs can be taken out separately.

クロックパルスジェネレータ2はオド絵素及びイーブン
絵素に交互にクロックパルスの組ψ1゜為を与え、これ
によってセンサ1からイーブン絵素Vt 、オド絵素■
0が交互に出力され、各々バッファ51,52.アナロ
グスイッチl、42を介してバッファ5にて合成され、
1つのビデオ信号■として出力される。クロックパルス
ジェネレータ2からはこの他クロック7とスタート信号
8が出力され、信号Vの処理系へ供給される。このよう
な従来構成でバッファ51.52はむろんのこと、アナ
ログスイッチ41.42も実際は半導体素子で構成され
ているから、それらのゲインの変動やオフセットが生じ
た場合にはイーブン系とオド系の絵素出力に不均衡が生
じ、第2図(α)に示す如く出力差δが生じることがあ
る。
The clock pulse generator 2 alternately applies a set of clock pulses ψ1° to the odd picture element and the even picture element, whereby the even picture element Vt and the odd picture element ■ are transmitted from the sensor 1 to the even picture element Vt.
0 are output alternately to the buffers 51, 52 . Synthesized in buffer 5 via analog switch l, 42,
Output as one video signal ■. In addition, the clock pulse generator 2 outputs a clock 7 and a start signal 8, which are supplied to the signal V processing system. In such a conventional configuration, not only the buffers 51 and 52 but also the analog switches 41 and 42 are actually composed of semiconductor elements, so if fluctuations or offsets in their gains occur, the even system and odd system Imbalance may occur in the pixel outputs, resulting in an output difference δ as shown in FIG. 2 (α).

この時の検出波形は第2図Cb)の如く二重の信号に見
える。従来はこのような信号Vを第1図に示すようにク
ロック7とそれを遅延回路12で遅延させたクロック7
Dによって、サンプルホールド回路10でサンプルホー
ルドし、A/Dコンバータ11でディジタル化してメモ
り14に格納し、この格納データを処理装置(CPV 
) 15へ取り込んでIA埋していた。なおりウンタ1
5は、りpツクハル息ジェネレータ2からのスタートパ
ルス8で初期層ツトされ、A/Dコンバータカラのクロ
ック信号7Aを計数し、その計数値によりA/D変換出
力の格納すべきメモリ14のアドレスを指定するもので
ある。ところでこのようなリニアイメージセンサを、例
えば微細回路製作のだめの半導体製造装置アライナに於
る回路パターンの位置検出に用いると、オツドとイーブ
ン系のレベル差のために一絵素分の誤差が生じ、これ・
は上述のような精密な位置決めには大きなずれとなり、
半導体表運上の致命的な欠点となることがある。
The detected waveform at this time appears to be a double signal as shown in FIG. 2Cb). Conventionally, such a signal V is processed by a clock 7 and a clock 7 delayed by a delay circuit 12, as shown in FIG.
D, the sample and hold circuit 10 samples and holds the data, the A/D converter 11 digitizes it and stores it in the memory 14, and this stored data is sent to the processing device (CPV).
) I imported it into 15 and filled it in IA. Naori Unta 1
5 is initialized by the start pulse 8 from the converter generator 2, counts the clock signal 7A of the A/D converter, and uses the counted value to determine the address of the memory 14 where the A/D conversion output is to be stored. is specified. By the way, when such a linear image sensor is used, for example, to detect the position of a circuit pattern in an aligner for semiconductor manufacturing equipment used to manufacture fine circuits, an error of one pixel will occur due to the level difference between the odd and even systems. this·
is a large deviation for precise positioning as described above,
This can be a fatal flaw in semiconductor performance.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、リニアイメージセンサ回路内でのドリ
フトによるパターン位置検出誤差をなくし、高精度な位
置検出を行えるようにした半導体リニアイメージセンサ
の補正回路を提供することにある。
An object of the present invention is to provide a correction circuit for a semiconductor linear image sensor that eliminates pattern position detection errors due to drift within the linear image sensor circuit and enables highly accurate position detection.

〔発明の概要〕[Summary of the invention]

リニアイメージセンサの周辺回路を構成する素子は主に
温度などの影響で特性が変動し、回路出力信号にドリフ
トが生じ、この変動は時間的にはゆっくりしたものであ
る。そこ゛で本発明では隣接するオド絵素とイーブン絵
素の信号し   1へ/l/ f) 差の平均をある1
フレーム(リニ7セ/す1走査期間)間のデータから算
出して、次のフレームでこの平均値をオド、イーブンの
低レベルの信号に加算し、その結果と高レベルの方の信
号とを組合せて検出波形としてとり出すようにしたこと
を特徴とするものである。
The characteristics of the elements constituting the peripheral circuit of a linear image sensor fluctuate mainly due to the influence of temperature, etc., causing a drift in the circuit output signal, and this fluctuation is slow in terms of time. Therefore, in the present invention, the signals of adjacent odd picture elements and even picture elements are converted to 1/l/f), and the average of the differences is set to a certain 1.
It is calculated from the data between frames (7 cycles/1 scan period), and in the next frame, this average value is added to the odd and even low level signals, and the result is combined with the high level signal. This is characterized in that the combinations are extracted as detected waveforms.

〔発明の実施例〕[Embodiments of the invention]

以下、本発明を第5図の実施例を用いて説明する。同図
に於て、従来の第1図の構成と異なるのは、メそり14
の他にメモリ14Aと加算器16が付加されている点と
、処理装置15での処理内容が従来と異なることである
。即ち、リニアイメージセンナ部6からの検出信号Vは
サンプルホールドされたのちA/Dコンバータ11テテ
ィジタル化され、カウンタ16により指定されたメモリ
14のアドレスへ格納される。ここまでは従来と同じで
あるが、本発明ではこのメモリ14に格納されたデータ
Vo〜■Nをすぐに検出信号とし℃処理するのではなく
、まずメモリ14に格納されたデータを処理装置15へ
順次とり込み、隣接絵素間の差の平均値Voffsgt
を次式に従って算出する。
The present invention will be explained below using the embodiment shown in FIG. In the figure, the difference from the conventional configuration in Figure 1 is the mesori 14.
In addition, a memory 14A and an adder 16 are added, and the processing content of the processing device 15 is different from the conventional one. That is, the detection signal V from the linear image sensor section 6 is sampled and held, then digitalized by the A/D converter 11, and stored in the address of the memory 14 designated by the counter 16. Up to this point, the process is the same as the conventional one, but in the present invention, instead of immediately processing the data Vo to ■N stored in the memory 14 as a detection signal, the data stored in the memory 14 is first processed by the processing device 15. The average value of the difference between adjacent picture elements Voffsgt
is calculated according to the following formula.

但しN+1は1ライン分の絵素数であって、1ライン(
フレーム)毎11CVoffJ?gtを算出し、その結
果を加算器16にセットし、次のフレームでは加算器1
6はセットされた’Jofjxttを出力Vの各絵素に
加えてメモ114Aへ格納する。この間処理装置15は
その時点の大刀に対して式(1)の演算を同時に実行し
ている。従ってメモリ14へある1フレーム期間に格納
されるN−)1絵素のデータは菟4図に示すようにイメ
ージセンサ部6からのそのママの出力V(+ % VN
であるが、その同じフレーム期間にメモリ141に格納
されるN+1絵素のデータ(3o −(3Nは1フレー
ム前に式(11で求められたvoffεetに対しB)
’=A)   + Voffztt、)’=o  ++
 N      ・・・ f21となっている。ドリフ
トを生じる温度変動等はこの七/すの1フレーム期間に
比べればはるかKゆっくりした変化であるから、数フレ
ーム間にわたってオド絵素とイーブン絵素のレベル差δ
(第2図)はほぼ一定とみなせ、従って式fllのVo
ffzetはほぼδとみてよい。即ちVoffget 
 N =−Σ (δ、1刊δ21+・・・・・・)となる。従
って今N t′L=1 イーブン絵素のレベル”’ m 等m・・・がオド絵素
のレベルス、〜′3.・・・よりδだげ犬とすると、第
4図のようにメモリ14からはイーブン絵素篤、鳩、・
・・を、メモリ14Aからはオド絵素対応のへ、賜、・
・・=に+δ、v3+δ、・・・ な処理装置(CPV
)15へ取込み、位置検出等の処理を行う。また逆にオ
ド絵素のレベル’I IVs+・・・の方が高い場合に
は、処理装置15へは残*Vl *Bll y■8 s
・・・を順次メ七り14A、14からとり込む。そうす
ると検出信号は第2図(α)の高い方のレベルにほぼ揃
い、第2図(h)のような2重の波形とはならず、対象
物体の形状位置を高い精度で検出できる。
However, N+1 is the number of picture elements for one line, and one line (
frame) every 11CVoffJ? gt is calculated, the result is set in adder 16, and in the next frame, adder 1
6 adds the set 'Jofjxtt to each picture element of the output V and stores it in the memo 114A. During this time, the processing device 15 simultaneously executes the calculation of equation (1) for the long sword at that time. Therefore, the data of N-) 1 pixel stored in the memory 14 in one frame period is the output V(+% VN) from the image sensor unit 6 as shown in Figure 4.
However, the data of N+1 pixels stored in the memory 141 during the same frame period (3o - (3N is B for voffεet calculated by formula (11) one frame before)
'=A) + Voffztt,)'=o ++
N... f21. Temperature fluctuations that cause drift change much more slowly than this one-frame period, so the level difference δ between odd picture elements and even picture elements over several frames is
(Fig. 2) can be regarded as almost constant, so Vo of the formula fll
ffzet can be considered to be approximately δ. That is, Voffget
N = -Σ (δ, 1st edition δ21+...). Therefore, now N t'L = 1 Level of even picture element "' m etc. is the level of odd picture element, ~'3....If we assume δ Dogedogu, then the memory is as shown in Figure 4. From 14 onwards, Even Emoto Atsushi, Hato,...
..., from memory 14A to the Odo-picture compatible one,...
... = +δ, v3+δ, ... processing device (CPV
) 15 and performs processing such as position detection. Conversely, if the level 'I IVs+... of the odd picture element is higher, the remaining *Vl *Bll y■8 s to the processing device 15
... are taken in sequentially from menus 14A and 14. In this case, the detection signal becomes almost equal to the higher level shown in FIG. 2 (α), and does not have a double waveform as shown in FIG. 2 (h), so that the shape position of the target object can be detected with high accuracy.

〔発明の効果〕〔Effect of the invention〕

以上の説明で明らかの如く、本発明によれば検出信号に
よるパターン検出位置誤差をなくすことができ、半導体
製造装置アライナに適用すれば、その整合精度を向上さ
せ、製品の歩留りを向上できるという効果がある。
As is clear from the above explanation, according to the present invention, pattern detection position errors caused by detection signals can be eliminated, and when applied to semiconductor manufacturing equipment aligners, the alignment accuracy can be improved and the yield of products can be improved. There is.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のリニアイメージセンサ及びその周辺回路
を示す図、第2図(α)はアナログ回路のドリフトによ
りオド、イーブンのビデオ信号に差を生じた状態を示す
図、第2図(z)は第2図(α)の状態でのパターン検
出信号を示す図、第5図は本発明の一実施例を示す回路
図、第4図はメモリ内データの処理装置への取り込み順
序例を示した図である。 6・・・リニアイメージセンサ部 + 4 、14A・・・メモリ 15・・・処理装置 16・・・加算器
Figure 1 is a diagram showing a conventional linear image sensor and its peripheral circuit, Figure 2 (α) is a diagram showing a state in which a difference occurs between odd and even video signals due to analog circuit drift, and Figure 2 (z ) is a diagram showing the pattern detection signal in the state of FIG. 2 (α), FIG. 5 is a circuit diagram showing an embodiment of the present invention, and FIG. 4 is an example of the order in which data in the memory is taken into the processing device. FIG. 6...Linear image sensor section +4, 14A...Memory 15...Processing device 16...Adder

Claims (1)

【特許請求の範囲】[Claims] リニアイメージセンサの隣接するオド絵素信号とイーブ
ン絵素信号との差の平均値をリニアセンサの1フレーム
分にわたって算出する平均値算出手段と、リニアイメー
ジセンサの1フレーム分の出力絵素信号を格納する第1
のメモリと、リニヤイメージセンサの1フレーム分の出
力絵素信号の各々に当該フレームより1フレーム前に上
記平均値算出手段により算出された平均値を加算した結
果を格納する第2のメモリとを有せしめるとともに、オ
ド絵素信号とイーブン絵素信号の大きい方を上記第1の
メモリからとり出しかつ小さい方に対応する信号を上記
第2のメモリからとり出すことによって、オド絵素信号
とイーブン絵素信号の出力径路に生じるドリフトを補正
する機能を有せしめたことを特徴とするリニヤイメージ
センサの補正回路。
an average value calculation means for calculating the average value of the difference between adjacent odd pixel signals and even pixel signals of the linear image sensor over one frame of the linear image sensor; 1st to store
and a second memory that stores the result of adding the average value calculated by the average value calculating means one frame before the current frame to each of the output pixel signals of one frame of the linear image sensor. At the same time, the larger one of the odd picture element signal and the even picture element signal is taken out from the first memory, and the signal corresponding to the smaller one is taken out from the second memory. A correction circuit for a linear image sensor, characterized by having a function of correcting a drift occurring in an output path of a pixel signal.
JP59139029A 1984-07-06 1984-07-06 Correction circuit of semiconductor linear image sensor Pending JPS6119286A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59139029A JPS6119286A (en) 1984-07-06 1984-07-06 Correction circuit of semiconductor linear image sensor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59139029A JPS6119286A (en) 1984-07-06 1984-07-06 Correction circuit of semiconductor linear image sensor

Publications (1)

Publication Number Publication Date
JPS6119286A true JPS6119286A (en) 1986-01-28

Family

ID=15235800

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59139029A Pending JPS6119286A (en) 1984-07-06 1984-07-06 Correction circuit of semiconductor linear image sensor

Country Status (1)

Country Link
JP (1) JPS6119286A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007141884A1 (en) 2006-06-06 2007-12-13 Mitsubishi Heavy Industries, Ltd. Absorbent liquid, and apparatus and method for removing co2 or h2s from gas with use of absorbent liquid

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007141884A1 (en) 2006-06-06 2007-12-13 Mitsubishi Heavy Industries, Ltd. Absorbent liquid, and apparatus and method for removing co2 or h2s from gas with use of absorbent liquid
US8231719B2 (en) 2006-06-06 2012-07-31 Mitsubishi Heavy Industries, Ltd. Absorbent liquid, and apparatus and method for removing CO2 or H2S from gas with use of absorbent liquid
US8506683B2 (en) 2006-06-06 2013-08-13 Mitsubishi Heavy Industries, Ltd. Absorbent liquid, and apparatus and method for removing CO2 or H2S from gas with use of absorbent liquid

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