JPS62186671A - Defect compensation device for solid-state image pickup device - Google Patents

Abstract

PURPOSE:To surely and precisely compensate for the defect to any object by subtracting a noise component corresponding to the defect in a crystal from an output signal when there is the defect in the crystal in a solid-state image pickup device. CONSTITUTION:When a defect position memory output SM, a position output SL and a field signal SF coincide, the output of a coincidence circuit 31 goes to SQ=1 and in a gate circuit 41, the noise value output stored in a noise value memory 40, namely, the noise value of the picture element corresponding to the output SM appears. This noise value is converted into the quantity of analog through a D/A converter 42 and only the noise value is subtracted from the output including the noise. The coincidence output SQ is also supplied to an address counter 33, the net output SM is supplied and at the same time, the next noise value is supplied to the input of the circuit 41. If the circuit 41 is not turned on, the output of the converter 42 goes to '0' and the output of a subtraction circuit 3 remains an original CCD output.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a defect compensation device for a solid-state imaging device.

[Prior Art] Solid-state imaging devices using semiconductors, such as CCDs, have been proposed.

In the case of COD, the structure is such that a 5i02 layer is formed on one side of a silicon semiconductor substrate, electrodes are formed on it at regular intervals, and an image is optically captured from the side where the electrodes are attached or from the opposite side. Charges are accumulated under each electrode of the semiconductor element by projection, and the accumulated signals are sequentially transferred and read out using clock pulses applied to the electrodes.

In solid-state imaging devices using such semiconductors, it is difficult to uniformly form semiconductor crystals over a certain area, resulting in localized crystal defects. 2 is likely to occur, so the dark current tends to be abnormally large compared to this area. For this reason, when an image is projected and a signal is read out as described above, noise occurs in areas where the dark current is abnormally large.

Therefore, as shown in FIG. 5, for example, noise N larger than the white level is mixed into the video signal So, and this noise N is easily noticeable when displayed on a playback screen.

Therefore, one method for removing such noise N is to use a memory circuit. That is, noise removal can be achieved by storing the crystal defect portion of the semiconductor substrate in advance in a memory circuit and controlling the imaging output obtained from the solid-state imaging body using the memory output.

The memory circuit stores contents corresponding to the presence or absence of crystal defects, and this memory content is usually information indicating the presence or absence of crystal defects for each picture element.

Therefore, in a COD that has NH picture elements in the horizontal direction and N picture elements in the vertical direction, NH*
It requires a memory capacity of N bits. Therefore, in order to obtain the same image as a normal TV image, NH
Since approximately 300 to 500 and 200 to 300 Nma are required, storing crystal defects using the method described above requires a large capacity memory circuit. The memory circuit becomes expensive,
This type of solid-state imaging device has the disadvantage that it cannot be provided at a low price.

One method for reducing the memory capacity is to encode and store the position of a crystal defect, instead of storing the presence or absence of a crystal defect for each picture element. To encode the position where a crystal defect exists, it is sufficient to encode the respective positions of the X and Y coordinates on the plane coordinate of the semiconductor element.Here, if the number of picture elements NH in the horizontal scanning direction is about 500, the horizontal scanning The entire position of a picture element in a direction can be expressed with a 9-bit capacity. Similarly, if the number N of picture elements existing in the vertical direction is 30θ, 8 bits is sufficient when using an interlaced scanning method, and whether crystal defects exist in picture element areas of odd fields or not, One bit is required for field discrimination to determine whether the field exists in the area.

In this way, including the crystal defect position 1 (xy coordinates) and field discrimination, all of this information can be expressed with a total of 18 bits. In addition, for one COD, the maximum allowable crystal defect location as a product is assumed to be 20.
It can be seen that the capacity of the memory element is only about 400 bits if the memory element is made into individual pieces, and that a small-capacity memory element is sufficient for practical use.

FIG. 6 shows an example of a conventional defect compensation device using such a memory element. The CCD transfer method used is an interline transfer method as shown in FIG.

The structure is well known, so to outline it, as shown in FIG. Vertical shift registers 3 are provided, and the charges transferred to the vertical shift registers 3 are sequentially transferred l picture elements at a time to the horizontal shift register 4, and signals are read out through the terminal f5.

P, is the imaging pulse supplied to each picture element 2, Pv
is a transfer pulse supplied to register 3, and P is one read pulse supplied to horizontal register 4.

The CCUIO has a subject 11 to be imaged as shown in Fig. 6.
is projected through the optical system 12, and the imaging output obtained at the terminal 5 is led to the output terminal T-14 via the sample hold circuit 13. The sampling state of the sample hold circuit 13 is controlled by a sampling pulse Ps synchronized with the read pulse P, but here, the sampling pulse p
g is controlled by the output of the memory element.

20 is I? which encodes and stores crystal defect positions. 30 indicates a memory element (defective position memory circuit) such as ON, CC
Address color for D is composed of an H counter 30H that counts the water level t and a V counter 30V that similarly counts the vertical position δ, and a read pulse PH is supplied to the H counter 30H. Reset] and end f are supplied with water mole cycle No. 7 HD through reset 2I and the signal.

(2) The counter 30V is similarly supplied with the transfer pulse Pv and the superposition synchronization signal VD as a reset signal.

T at counter 30! The position signal S1- is supplied to the matching circuit 31 together with a field signal SF indicating whether it is a tone number field or an even number field. This coincidence circuit 31 is supplied with the memory output S of the defective position memory circuit 20, and when the contents of the defective position memory output SM, the position signal S, and the field signal SF match, a coincidence output S is generated. are supplied to the gate circuit 32 at sampling pulses PS and NO(.
”, at that point the gate output F”so
Since this cannot be obtained, the operation of the sample and hold circuit 13 is stopped, and the state of l picture elements before is held as it is.

Therefore, the defective noise N mixed into the image pickup output during this period is removed by the operation of the sample-and-hold circuit 13, and the period is compensated for by the signal from the previous l picture element.

Incidentally, the coincidence output SQ is also supplied to the address counter 33, so that the next defective position memory output SM is output. 33a is a reset terminal to which a frame period signal is supplied.

[Problems to be Solved by the Invention] However, in such conventional defect compensation devices, the information of the picture element corresponding to the defect is replaced with the information of the previous picture element, so the correlation in the horizontal direction is There is a problem in that when an image of an object that has no character is captured, a false signal is generated, and the quality of the image is degraded without proper defect compensation.

SUMMARY OF THE INVENTION An object of the present invention is to solve such conventional problems and to provide a defect compensation device for a solid-state imaging device that can obtain a complete defect compensation effect even when an object having no horizontal correlation is imaged.

Means for Solving Problem F] Therefore, in the present invention, solid-state imaging! a first memory means storing the defect position of the crystal at position A, a second memory f stage storing a noise value due to the crystal defect corresponding to the defect position t, and a memory in the first memory stage r at the time of imaging. a subtraction control means for detecting the position of the crystal defect by referring to the content and reading out the noise value corresponding to the detected crystal defect position from the second storage means to generate subtraction data; and in response to the supply of the subtraction data. The solid! ! and a subtraction means for subtracting the subtraction data from the output of the imager.

[Effect L] In other words, according to J that is not emitted, if a solid-state imaging device has a crystal defect, the noise component corresponding to the crystal defect is subtracted from the output signal, so the defect can be detected reliably and accurately for any subject. Compensation will be available.

[Example] Hereinafter, a detailed description of the present invention will be given with reference to the drawings.

FIG. 1 shows an example of an unreleased 151, in which corresponding parts are given the same reference numerals for parts that can be constructed in the same way as before. A noise value memory 40 that stores the value of the dark voltage value of the pixel that stands out from the average dark voltage, and a gate circuit 41 that allows the output from the noise value memory 40 to pass according to the coincidence output SQ. D/A converter 42) D that converts the output from the gate circuit 41 into D/A
A subtraction circuit 43 is added to subtract the output of the /A converter 42 from the output of CGDIO. Note that the noise value memory 40 stores in advance noise values measured corresponding to each defect.

The operation of this embodiment will be explained using FIG. Defect position memory output SN, position output SL and field signal SF
When both match, the output of the matching circuit is SQ = “
1'', and the output of the gate circuit has a noise value memory 4
The noise value output stored as 0, that is, the noise value of the picture element corresponding to the defective position memory output sM appears. This noise value is converted into an analog quantity via the D/A converter 42, and only the noise value is subtracted from the noisy output.

On the other hand, the coincidence output Sg is also supplied to the address counter 33, the next defective position memory output SM is supplied, and the next noise value is supplied to the gate circuit 41. If the gate circuit 41 is not turned on, the output of the D/A converter 42 is "O", and the output of the subtraction circuit 43 is the original CCD.
The output remains the same.

FIG. 2 shows an embodiment in which the configuration shown in FIG. 1 is improved and the same effect can be achieved at a lower cost. In FIG. 2, the gate circuit 41 is removed from the gate circuit in FIG. 1, and the output of the noise value memory 40 is directly supplied to the D/A converter 42. Further, the output of the D/A converter 42 is supplied to a newly provided high-speed switching circuit 44. This switching circuit 44 is normally set on the ground GND side, and is switched in response to the supply of the output SO of the minus number circuit 31 to guide the output of the D/A converter 42 to the subtracter 43.

As a result, since the switching circuit 44 is normally set to the GND side, "O" is supplied to the subtraction circuit 43, but when the output So of the - number circuit 31 becomes "L", the switching circuit 44 converts the D/A. According to this embodiment, the noise value output that has already been D/A converted is supplied to the subtracter 43, and the output containing the noise of cco to is corrected. The output of the defect compensation device is only required to output an appropriate value corresponding to the position from one defect position to the next defect position, so it is very fast and does not require an A converter. can be constructed at low cost.

In the embodiments shown in FIGS. 1 and 2, the noise value to be compensated is kept constant without considering temperature, but in reality, the dark current noise value is
It has a temperature dependence that doubles when the temperature increases by 8°C. Therefore, more complete compensation can be achieved by making the amount of compensation variable according to the temperature during use.

FIG. 3 shows an embodiment in which the amount of compensation is adjusted according to temperature changes. Here, 50 is a temperature sensor that detects the temperature of the CCD 10, and 51 is a temperature sensor that detects the temperature of the CCD 10 according to the output of the temperature sensor 50. An arithmetic circuit 52 is a variable gain amplifier that can amplify the output of the D/A converter 42 with a gain determined according to the output of the arithmetic circuit 51.

To explain the operation of this embodiment, the temperature of cco io is constantly monitored by the temperature detector 50, and the temperature of the cco io is constantly monitored by the arithmetic circuit 51.
Then, the amount of compensation at that temperature is calculated based on the information from the temperature detector 50, and the gain of the variable gain amplifier 52 is determined. On the other hand, the output of the output/A converter 42 is supplied to a variable gain amplifier 52, and the switching circuit 44 is supplied with a noise value whose compensation amount is adjusted in accordance with the temperature. Therefore, even if there is a temperature change, proper defect compensation of cco io can be performed.

Next, in Fig. 4, instead of detecting the temperature and performing defect compensation, the embodiment according to Fig. 3 is implemented without performing complicated calculations by looking at the proportional relationship between the dark voltage of COD to and the noise. An example will be shown in which similar effects can be obtained.

In the figure, 61 is a sample and hold circuit that samples and holds the output level of the dark voltage output section formed by shielding the black level section of the CCD 10, that is, a part of the picture element section of the GCD to, and 62 is a ccnt.

A sample-and-hold circuit 63 samples and holds the output level of the empty readout section, that is, the part that does not relate to the actual readout [7. This is a subtraction circuit for forming . Reference numeral 400 is a noise value memory, and in this example, the noise value memory 400 also stores the mean value of the voltage lll' when the defective noise value of the CCD 10 is measured, and the field is stored at the beginning of the field. The dark voltage value is read out.

Reference numeral 64 denotes a latch circuit for setting the dark voltage F; sent from the noise value memory 400 at the beginning of the field to half value for a period of one field, and 65 converts the output of the latch circuit 64 into a D/A converter. 1/A converter, 8B is El/A
A division circuit that divides the output of the subtraction circuit 63 by the converter 5, 67 is the output of the division circuit 66 and the D/A converter 4.
This is a multiplication circuit that multiplies the outputs of 2.

Next, the operation of this embodiment will be explained using FIG. When the dark market pressure value of the field is read from the noise value memory 400 at the beginning of reading of the l field, this Il'l is held in the latch circuit 64 for the l field period. The output of the latch circuit 64 is input to a D/A converter 65 for D/A conversion, and then supplied to a division circuit 66. On the other hand, at the beginning of the field, the outputs f#'f of the black level part and the blank reading part of the GCD 10 are held for one field period by sample and hold circuits 61 and 62, respectively. The subtraction circuit 63 calculates the difference between the output value of the black level section and the output value of the blank readout section, and supplies the dark voltage level during use to the division circuit 6B. The division circuit 6B calculates (dark voltage level during use) ÷ (dark voltage level during defect noise measurement), and uses this division a1 as a multiplication coefficient A to calculate the multiplication circuit 6B.
Supply to 7. Therefore, by the multiplication circuit 87, the D/A
The defect noise value outputted from the converter 42 during defect noise measurement is multiplied by the multiplication coefficient A, and the temperature-corrected noise value is manually input to the switching circuit 44, so correct defect compensation can be performed regardless of changes in temperature conditions. effect can be obtained.

As described above, according to the first to fourth embodiments of the present invention, instead of replacing the defective picture element with the output as in the conventional case, only the noise component due to the defect is replaced with the picture element output including the noise component. Since the noise component is subtracted from the noise component, it is possible to completely remove the noise component even when a subject with no correlation in the horizontal direction is imaged. In addition, especially according to the third and fourth embodiments, since the amount of noise is subtracted according to the temperature of the solid-state image sensor or the dark current value depending on the temperature, defects can be detected regardless of the temperature conditions during use. It is possible to obtain a good image by appropriately removing the noise caused by the IIF.

E Effects of the Invention] As described above, according to the present invention, it is possible to realize a defect compensation device for a solid-state imaging device that can perform reliable and accurate defect compensation.

[Brief explanation of drawings]

1 to 4 are block diagrams showing first to fourth embodiments of a defect compensation device for a solid-state imaging device according to the present invention. FIG. 5 is a theory 151 diagram for explaining the theory I11 of dark current noise due to crystal defects. FIG. 6 is a block diagram showing an example of a conventional defect compensation device. FIG. 7 is a diagram schematically showing an interline solid-state imaging device. 10...CCO. 13... Sample hold circuit, 20... Defect position memory circuit. 30... CCI] address counter circuit, 31...
- Matching circuit, 40.400...Noise value memory circuit. 41...Gate circuit, 42...D/A converter, 43...Subtraction circuit, 44...High speed switching circuit, 50...Temperature detector, 51... Arithmetic circuit. 52...Variable gain amplifier. 61.82...Sample hold circuit, 63...Subtraction circuit, 64...Latch circuit, 65...D/A converter, 66...Divide circuit. 67... Multiplication circuit.

Claims (1)

[Scope of Claims] 1) A first storage means that stores a position of a defect in a crystal of a solid-state imaging device; a second storage means that stores a noise value due to a crystal defect corresponding to the defect position; a subtraction control means for detecting the crystal defect position by referring to the storage contents of a first storage means, and reading out the noise value corresponding to the detected crystal defect position from a second storage means to generate subtraction data; A defect compensation device for a solid-state imaging device, comprising: subtraction means for subtracting the subtraction data from the output of the solid-state imaging device in accordance with data supply. 2) In the defect compensation device for a solid-state imaging device according to claim 1, the subtraction control means generates subtraction data by correcting the read noise value according to the temperature of the solid-state imaging device. A defect compensation device for solid-state imaging devices.