JPS61189779A - Video signal processor - Google Patents

Abstract

PURPOSE:To change the output frequency characteristics by using the same delay circuit or arithmetic circuit in response to the frequency band of the video signal supplied to a video signal processor in order switch the sampling frequency. CONSTITUTION:The video signals are supplied to a horizontal synchronizing signal separator 22 and separated into video information signals and the horizontal synchronizing signals. The horizontal synchronizing signal is supplied to a phase comparator 15. Then a 1/n dividing circuit 10 and a 1/m dividing circuit 13 (n<m) are connected to the comparator 15 when the frequency band of the video signal is small and large respectively. Thus a sampling frequency is selected in response to the frequency band of the video signal and the sampled video signal is supplied to a delay circuit 4 via a sampling circuit 3. Then both the video signal which is delayed with variation of the delay time and the sample video signal undergo the operation through an arithmetic circuit 5. Thus it is possible to obtain the prescribed frequency characteristics can be obtained according to the frequency band of the video signal.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a video signal processing device that samples, delays, and calculates a video signal to obtain predetermined frequency characteristics.

BACKGROUND OF THE INVENTION In recent years, there has been a tendency to digitally process video signals in video tape recorders (hereinafter referred to as VTRs).Digital signal processing equipment has at least a sampling system that samples analog video signals. a delay circuit consisting of a flip-flop circuit or the like that can delay a digital video signal with a signal to be sampled and change the delay time according to the frequency of the signal to be sampled;
It is composed of an arithmetic circuit that operates on a sampled digital video signal and a delayed video signal.

The video signal is sampled at a frequency of 2fw or more, where fw is the frequency band of the video signal, taking into consideration Nyquist's sampling theorem.

(Nikkei Electronics, 198, 1, 23P233~
F247, L that realizes next-generation digital television
SI) Problems to be Solved by the Invention FIG. 4A shows the frequency band of a video signal reproduced by a home VTR in the NTSC system. The maximum frequency of the reproduced video signal is approximately 3 MHz. Therefore, the color signal subcarrier frequency is set to fsc (3.58 MH in the NTSC system).
z ), the reproduced video signal can be sampled at a frequency near 2 fsc.

On the other hand, FIG. 4B shows the frequency band of a video signal reproduced by a home VTR in the PAL system. The maximum frequency of the reproduced video signal is approximately 4 MHz. Therefore, if sampling is performed at a frequency of 2 fsc, which is obtained by sampling the NTSC system, normal sampling cannot be performed because Nyquist's sampling theorem is not satisfied. Therefore, in order to sample a reproduced video signal of the PAL system, it is necessary to sample at a frequency near 'Jsc, where fSC is the color signal subcarrier of the PAL system.

On the other hand, it is possible to sample the reproduced video signal of the NTSC system at the same frequency using 2fsc (fsc is the color signal subcarrier frequency of the PAL system); When configuring a signal processing device, only the same frequency characteristics can be obtained. As shown in Figures 4A and 4B, the frequency bands of the reproduced video signals of the NTSC and FAI systems are different, so for example, when high frequency emphasis is applied, if the frequency bands of the video signals are different, , the frequencies to be emphasized also differ.

When trying to change the frequency to be emphasized, the frequency characteristics of the video signal processing device are determined by the hardware of the delay circuit and arithmetic circuit, and the sampling frequency. If you sample at the same sampling frequency and change the hardware of the delay circuit and arithmetic circuit in order to obtain and arithmetic circuits are required. As a result, the scale of the circuit increases, which poses a major problem especially when integrating the circuit.

Furthermore, in the PAL system, the color signal subcarrier frequency fsc is selected to be (284-7) fH, so if the sampling frequency is set to 2 fsc, it becomes (564-T) fH, and 1
It is not possible to configure a video signal processing device that includes H delay (H is the period before horizontal production).

Therefore, when selecting the sampling frequency from frequencies near 2fsc, there is a problem in that 2fsc cannot be selected.

Figure 2A shows the frequency characteristics sampled at the frequency nfH (n is a natural number, fH is the horizontal scanning frequency), and Figure 2B
is a frequency characteristic sampled at a frequency of m/a (m is a natural number, fH is a horizontal scanning frequency).

However, the relationship between n and m is n (selected as m).

If the sampling frequency is switched without changing the delay circuit or arithmetic circuit, the frequency characteristics of the video signal processing device will be as shown in Figure 2A,
As shown in FIG. 2B, similar frequency characteristics are obtained on the frequency axis.

The present invention is realized by switching the sampling frequency without changing the delay circuit or the arithmetic circuit so that a predetermined frequency characteristic can be obtained according to the frequency band of the video signal.

Means for Solving the Problems The video signal processing device of the present invention provides a first video signal processing device that outputs a first sampling frequency obtained by multiplying the horizontal scanning frequency of a first video signal.
a second oscillation circuit that outputs a second sampling frequency obtained by multiplying the horizontal scanning frequency of the second video signal;
a switch circuit that switches between the output of the first oscillation circuit and the output of the second oscillation circuit; and inputting the output of the switch circuit;
A sampling circuit that samples a video signal, a delay circuit that can delay the video signal with the signal to be sampled and change the delay time depending on the sampling frequency, and a sampling circuit that samples the video signal and the delayed video signal. The arithmetic circuit is configured to output a predetermined frequency characteristic according to the frequency band of the video signal.

Operation The present invention has the above-described configuration, and the output of the first oscillation circuit that outputs the first frequency obtained by multiplying the horizontal scanning frequency of the first video signal so as to correspond to the frequency band of the first video signal; A switch circuit switches the output of a second excavation circuit that outputs a second frequency obtained by multiplying the horizontal scanning frequency of the second video signal so as to correspond to the frequency band of the second video signal, and samples the output of the switch circuit. The sampling circuit samples the video signal using the signal output from the switch circuit and inputs it to the delay circuit.The delay circuit delays the signal according to the frequency of the signal output from the switch circuit. The video signal is delayed and input to the arithmetic circuit.

The arithmetic circuit calculates the sampled video signal and the delayed video signal, and can obtain predetermined frequency characteristics according to the frequency band of the video signal.

Embodiment FIG. 1 is a block diagram of an embodiment of the video signal processing apparatus of the present invention. In FIG. 1, 2 is a switch circuit, 3 is a sampling circuit, 4 is a delay circuit, 6 is an arithmetic circuit, 11 is a voltage controlled oscillation circuit, 12 is a one frequency divider circuit, 13 is a one frequency divider circuit, 1
4 is a low frequency door filter (hereinafter abbreviated as LPF), 16 is a phase comparison circuit, 21 is an input terminal, 22 is a horizontal synchronization separation circuit, and 23 is an output terminal. 24 is a control input terminal of the switch circuit 4.

Next, the operation of this embodiment will be explained. The video signal is
The signal is input to the horizontal synchronizing signal separation circuit 22 via the input terminal 21 . The horizontal synchronization signal separation circuit 22 separates the video information and the horizontal synchronization signal, and inputs the horizontal synchronization signal to the phase comparison circuit 16. Phase comparison circuit 16. LPF14. The voltage controlled oscillator circuit 1, - frequency divider circuit 12 and one frequency divider circuit 13 are PL
When the - frequency dividing circuit 12 and the phase comparator circuit 15 are connected, the voltage controlled oscillator circuit 11 outputs a signal with a frequency of nfH.

(However, n is a natural number fH is the horizontal scanning frequency). On the other hand, when the one frequency divider circuit 13 and the phase comparator circuit 15 are connected, the voltage controlled oscillation circuit 11 outputs a signal with a frequency of mfH. (However, m is a natural number and fH is the horizontal scanning frequency) n and m
If the relationship with n (m) is given, the horizontal scanning frequency fH is
Since it is almost the same regardless of the method, voltage controlled oscillation circuit 1
The output frequency of 1 has a frequency relationship of nfH<mfH. As shown in FIG. 4A, when the frequency band of the video signal is narrow, the - frequency divider circuit 12 is connected to the phase comparator circuit 15, and as shown in FIG. 4B, when the frequency band of the video signal is wide, the frequency is divided by one. By controlling the switch circuit 2 to connect the circuit 13 to the phase comparison circuit 15, a sampling frequency corresponding to the frequency band of the video signal can be selected, and the sampling frequency is inputted to the sampling circuit 3 to convert the video signal. The sampled video signal is input to the delay circuit 4, and the sampled video signal is input to the delay circuit 4.
The video signal is delayed by changing the delay time according to the sampling frequency, and when the delayed video signal and the sampled video signal are calculated by the arithmetic circuit 5, the output terminal 23 is as shown in FIG. 4A. When the frequency band of the video signal is narrow, the frequency characteristics shown in Figure 2A are obtained, and when the frequency band of the video signal is wide as shown in Figure 4B, the frequency characteristics shown in Figure 2B are obtained.
The frequency characteristics shown in are obtained.

FIGS. 2A and 2B show high frequency emphasis characteristics. The frequency to be emphasized can be easily changed depending on the frequency band of the input video signal.

As another embodiment, an example will be described in which the frequency to be trapped is changed depending on the video signal. For example, the color subcarrier frequency of the NTSC system is 3.58 MHz, and the color subcarrier frequency of the PAL system is 4.43 MHz. When we want to trap the color subcarrier frequency, we have to change the frequency to be trapped depending on the video signal.

When the frequency band of the video signal is narrow as shown in FIG. 4A, the delay circuit and arithmetic circuit are set so as to exhibit frequency characteristics as shown in FIG. 3A.

When the frequency band of the video signal is wide as shown in Figure 4B, the frequency characteristics shown in Figure 3B can be obtained by using the same delay circuit and arithmetic circuit and changing only the sampling frequency. It will be done.

Effects of the Invention As is clear from the above description, the video signal processing device of the present invention includes a first oscillation circuit that outputs a first frequency obtained by multiplying the horizontal scanning frequency of the first video signal, and a second oscillation circuit that outputs a first frequency that is multiplied by the horizontal scanning frequency of the first video signal. a second oscillation circuit that outputs a second frequency obtained by multiplying the horizontal scanning frequency of the video signal; and switching between the output of the first oscillation circuit and the output of the third oscillation circuit according to the frequency band of the video signal. A predetermined frequency according to the frequency band of the video signal is created by a switch circuit, a delay circuit that can change the image using the signal output from the switch circuit, and an arithmetic circuit that calculates the sampled video signal and the delayed video signal. By configuring to output the characteristics, when changing the frequency characteristics to be output according to the frequency band of the video signal input to the video signal processing device, the same delay circuit and arithmetic circuit can be used to change the frequency to be sampled. Since the output frequency characteristics are changed by switching according to the frequency band of the video signal, it is possible to change the frequency characteristics without changing the delay circuit or the arithmetic circuit.

Furthermore, since the sampling frequency is created by multiplying the horizontal scanning frequency of the video signal, the oscillation frequency can be easily changed by changing the frequency division ratio of the frequency dividing circuit.

In addition, since the target is a video signal reproduced by a VTR, the sampling frequency is around 2fsc (fsc is the color signal subcarrier frequency) and is an integral multiple of the horizontal scanning frequency, so the PAL video signal cannot be sampled. However, accurate IH
(H is the period of horizontal scanning) Delay time can be easily created.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a video signal processing device in a first embodiment of the present invention, FIG. 2 is a characteristic diagram showing frequency characteristics of the video signal processing device in the embodiment, and FIG. 3 is a block diagram of a video signal processing device in another embodiment. FIG. 4A is a characteristic diagram showing the frequency characteristics of the signal processing device, FIG. 4A is a characteristic diagram showing the frequency characteristics of the reproduced video signal of the NTSC system, and FIG. 4B is a characteristic diagram showing the frequency characteristics of the reproduced video signal of the PAL system. . 2...Switch circuit, 3...Sampling circuit, 4...Delay circuit, ε...Arithmetic circuit, 11...Voltage control Oscillator, 12...
- Frequency division circuit, 13... - Frequency division port n
m road, 14
...LPF, 15...phase comparison circuit. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
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Claims (2)

[Claims] (1) The first signal that is multiplied by the horizontal scanning frequency of the first video signal.
a first oscillation circuit that outputs a frequency of A switching circuit that switches the output of the circuit, a sampling circuit that samples the video signal, a delay circuit that delays the video signal with the signal to be sampled and can change the delay time according to the sampling frequency, an arithmetic circuit for calculating the converted video signal and the delayed video signal;
The output of the oscillation circuit and the output of the second oscillation circuit are input to the switch circuit, the switch circuit is controlled, and the output of the first oscillation circuit and the output of the second oscillation circuit are inputted to the switch circuit. The sampling circuit samples the video signal using the output of the switch circuit, the delay circuit delays the sampled video signal using the output of the switch circuit, and the sampling circuit samples the video signal using the output of the switch circuit. A video signal processing device characterized in that an arithmetic circuit calculates a sampled video signal and a delayed video signal to obtain frequency characteristics according to a frequency band of the video signal. (2) The first oscillation circuit and the second oscillation circuit include a voltage controlled oscillation circuit, a first frequency dividing circuit that divides the output of the voltage controlled oscillation circuit so as to output the first frequency, and a second frequency dividing circuit that divides the output of the voltage controlled oscillation circuit to output the first frequency. A second frequency divider circuit that divides the output of the voltage controlled oscillator circuit so as to output a frequency of A second switch circuit, a phase comparison circuit that inputs the output of the second switch circuit and compares the phase with a horizontal synchronization signal, and a low-pass filter that integrates the output of the phase comparison circuit. The output of the frequency dividing circuit and the output of the second frequency dividing circuit are input to the second switch circuit, and the switch circuit selects the output of the first frequency dividing circuit and the second frequency dividing circuit according to the frequency band of the video signal. The voltage controlled oscillation circuit is configured to output a first frequency obtained by multiplying the horizontal synchronization signal and a second frequency obtained by multiplying the horizontal synchronization signal by switching the output of the frequency circuit. The video signal processing device according to scope (1).