JPS6358437B2 - - Google Patents
Info
- Publication number
- JPS6358437B2 JPS6358437B2 JP55146614A JP14661480A JPS6358437B2 JP S6358437 B2 JPS6358437 B2 JP S6358437B2 JP 55146614 A JP55146614 A JP 55146614A JP 14661480 A JP14661480 A JP 14661480A JP S6358437 B2 JPS6358437 B2 JP S6358437B2
- Authority
- JP
- Japan
- Prior art keywords
- signal
- circuit
- chroma
- filter
- supplied
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000003111 delayed effect Effects 0.000 claims description 2
- 230000008030 elimination Effects 0.000 claims description 2
- 238000003379 elimination reaction Methods 0.000 claims description 2
- 239000000284 extract Substances 0.000 claims description 2
- 238000000926 separation method Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N9/00—Details of colour television systems
- H04N9/79—Processing of colour television signals in connection with recording
- H04N9/87—Regeneration of colour television signals
- H04N9/88—Signal drop-out compensation
- H04N9/882—Signal drop-out compensation the signal being a composite colour television signal
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
Description
【発明の詳細な説明】
本発明は例えばVTRからの再生映像信号にお
いて、ドロツプアウトの補償を行うと共に、変速
再生時のクロマ信号の搬送波位相の連続性の補正
を行えるようにしたものである。DETAILED DESCRIPTION OF THE INVENTION The present invention is capable of compensating for dropouts in a reproduced video signal from, for example, a VTR, and also correcting the continuity of the carrier phase of a chroma signal during variable speed reproduction.
すなわち、例えばVTRからの再生映像信号の
ドロツプアウトの補償を行うには従来は第1図の
ようにしていた。 That is, for example, in order to compensate for dropout of a reproduced video signal from a VTR, the conventional method is as shown in FIG.
図において、1はVTRからの再生映像信号が
供給される入力端子であつて、この入力端子1か
らの信号が3.58MHzの帯域除去フイルタ2と帯域
通過フイルタ3に供給されて輝度信号Syとクロ
マ信号Scとが分離される。これらの分離された
輝度信号Syとクロマ信号Scとがそれぞれ1水平
期間の遅延回路4,5に供給される。そして輝度
信号Sy系ではこの遅延回路4からの信号とフイ
ルタ2からの信号とが選択スイツチ6で選択され
る。またクロマ信号Sc系では遅延回路5からの
信号がインバータ7で位相反転され、このインバ
ータ7からの信号とフイルタ3からの信号とが選
択スイツチ8で選択される。これらのスイツチ
6,8からの信号が混合回路9で混合される。そ
してこの混合回路9からの信号と入力端子1から
の信号とが選択スイツチ10で選択され、出力端
子11に取り出される。 In the figure, 1 is an input terminal to which a reproduced video signal from a VTR is supplied, and the signal from this input terminal 1 is supplied to a 3.58 MHz band elimination filter 2 and a band pass filter 3, and the luminance signal Sy and chroma signal are The signal Sc is separated. These separated luminance signal Sy and chroma signal Sc are supplied to delay circuits 4 and 5 for one horizontal period, respectively. In the luminance signal Sy system, the signal from the delay circuit 4 and the signal from the filter 2 are selected by the selection switch 6. In the chroma signal Sc system, the phase of the signal from the delay circuit 5 is inverted by the inverter 7, and the signal from the inverter 7 and the signal from the filter 3 are selected by the selection switch 8. Signals from these switches 6 and 8 are mixed in a mixing circuit 9. The signal from the mixing circuit 9 and the signal from the input terminal 1 are selected by a selection switch 10 and taken out to an output terminal 11.
従つてこの回路においてドロツプアウトが発生
した場合には、スイツチ10が加算回路9側に切
換えられると共に、輝度信号系及びクロマ信号系
のスイツチ6,8の一方または両方が遅延回路
4,5側に切換えられて、輝度信号Sy及びクロ
マ信号Scの一方または両方が1水平期間前の信
号で補間される。なおクロマ信号Scは1水平期
間ごとに搬送波の位相が反転しているので、遅延
回路5の出力側にインバータ7を設けて位相補正
を行つている。 Therefore, when a dropout occurs in this circuit, the switch 10 is switched to the adder circuit 9 side, and one or both of the luminance signal system and chroma signal system switches 6 and 8 are switched to the delay circuits 4 and 5 side. Then, one or both of the luminance signal Sy and the chroma signal Sc is interpolated with a signal from one horizontal period earlier. Note that since the phase of the carrier wave of the chroma signal Sc is inverted every horizontal period, an inverter 7 is provided on the output side of the delay circuit 5 to perform phase correction.
また上述のようなVTRにおいて、スロー再生
や倍速再生などの変速再生を行うと、同じフイー
ルドが繰り返し再生されたり、飛び飛びのフイー
ルドが連続に再生されたりする。その場合に、ク
ロマ信号の搬送波の位相が連続したものになるよ
うに、クロマ信号の位相補正を行う。 Furthermore, when performing variable speed playback such as slow playback or double speed playback in the above-mentioned VTR, the same field may be played repeatedly or fields may be played back intermittently. In this case, the phase of the chroma signal is corrected so that the phase of the carrier wave of the chroma signal becomes continuous.
すなわち第2図において、上述のドロツプアウ
ト補償回路で補間が行われた信号が入力端子12
に供給される。この入力端子12からの信号がく
し形フイルタを構成する1水平期間の遅延回路1
3及び減算回路14に供給され、この遅延回路1
3を通じた信号が減算回路14に供給され、この
減算回路14からの信号が3.58MHzの帯域通過フ
イルタ15に供給されてクロマ信号Scのみが取
り出される。このクロマ信号Scが位相補正回路
16に供給されて、搬送波の位相が連続するよう
に位相反転等の位相補正処理が行われる。また入
力端子12からの信号がフイルタ15の時間遅延
に相当する遅延回路17を通じて減算回路18に
供給され、上述のフイルタ15からのクロマ信号
Scが減算回路18に供給されて映像信号中のク
ロマ信号Scが除去され、輝度信号Syのみが取り
出される。この輝度信号Syが補正回路16の時
間遅延に相当する遅延回路19に供給される。そ
して補正回路16からのクロマ信号Scと遅延回
路19からの輝度信号Syとが混合回路20で混
合され、この混合回路20からの信号と入力端子
12からの信号とが選択スイツチ21で選択され
て出力端子22に取り出される。 That is, in FIG. 2, the signal interpolated by the dropout compensation circuit described above is input to the input terminal 12.
supplied to A delay circuit 1 for one horizontal period in which the signal from this input terminal 12 constitutes a comb filter.
3 and the subtraction circuit 14, and this delay circuit 1
3 is supplied to a subtraction circuit 14, and the signal from this subtraction circuit 14 is supplied to a 3.58 MHz bandpass filter 15 to extract only the chroma signal Sc. This chroma signal Sc is supplied to the phase correction circuit 16, where phase correction processing such as phase inversion is performed so that the phase of the carrier wave is continuous. Further, the signal from the input terminal 12 is supplied to the subtraction circuit 18 through a delay circuit 17 corresponding to the time delay of the filter 15, and the chroma signal from the filter 15 is supplied to the subtraction circuit 18.
Sc is supplied to the subtraction circuit 18, the chroma signal Sc in the video signal is removed, and only the luminance signal Sy is extracted. This luminance signal Sy is supplied to a delay circuit 19 corresponding to the time delay of the correction circuit 16. Then, the chroma signal Sc from the correction circuit 16 and the luminance signal Sy from the delay circuit 19 are mixed in the mixing circuit 20, and the signal from the mixing circuit 20 and the signal from the input terminal 12 are selected by the selection switch 21. It is taken out to the output terminal 22.
従つてこの回路において、変速再生時にもクロ
マ信号Scの搬送位相が連続した信号が取り出さ
れ、常に良好な再生が行われる。 Therefore, in this circuit, even during variable speed reproduction, a signal with continuous carrier phases of the chroma signal Sc is extracted, and good reproduction is always performed.
そしてこれらの回路において、ドロツプアウト
補償回路(第1図)における輝度信号Syとクロ
マ信号Scの分離は、必ずしも正確である必要は
なく、通常の帯域除去フイルタ2と帯域通過フイ
ルタ3で足りる。これに対してクロマ信号の位相
補正回路(第2図)における輝度信号Syとクロ
マ信号Scの分離は、クロマ信号Scのみを正確に
取り出す必要があり、くし形フイルタが使用され
る。さらにドロツプアウト補償回路においては、
回路内に遅延要素を含むためにくし形フイルタの
ような遅延要素を含むフイルタを用いるのは好ま
しくない。 In these circuits, the separation of the luminance signal Sy and chroma signal Sc in the dropout compensation circuit (FIG. 1) does not necessarily have to be accurate, and a normal band-removal filter 2 and band-pass filter 3 are sufficient. On the other hand, in order to separate the luminance signal Sy and the chroma signal Sc in the chroma signal phase correction circuit (FIG. 2), it is necessary to accurately extract only the chroma signal Sc, and a comb filter is used. Furthermore, in the dropout compensation circuit,
It is undesirable to use a filter that includes a delay element, such as a comb filter, to include a delay element in the circuit.
このため従来は、上述の二つの回路を直列に接
続して使用していた。しかしながらそのような構
成の場合、それぞれの回路で繰り返し輝度信号
Syとクロマ信号Scの分離を行うために、信号の
劣化が激しく、また回路素子数も多くて価格の上
昇や装置が大型化するなどの不都合が多かつた。 For this reason, conventionally, the above-mentioned two circuits were connected in series. However, in such a configuration, each circuit repeats the luminance signal.
Separating the Sy and chroma signals Sc caused severe signal deterioration, and the large number of circuit elements required many inconveniences, such as an increase in price and an increase in the size of the device.
本発明はこのような点にかんがみ、上述の二つ
の回路を一体化し、簡単な構成で特性のよい信号
を得ようとするものである。以下図面を参照しな
がら本発明の一実施例について説明しよう。なお
図中で上述の第1図、第2図を対応する部分には
同一符号を付して示す。 In view of these points, the present invention aims to integrate the above-mentioned two circuits and obtain a signal with good characteristics with a simple configuration. An embodiment of the present invention will be described below with reference to the drawings. In the drawings, parts corresponding to those in FIGS. 1 and 2 described above are designated by the same reference numerals.
第3図において、遅延回路5からの信号とスイ
ツチ8からの信号とが減算回路14に供給され、
この減算回路14からの信号が位相補正回路16
に供給される。またスイツチ6からの信号が遅延
回路19に供給される。さらに入力端子1からの
信号と混合回路20からの信号とが選択スイツチ
21に供給される。 In FIG. 3, the signal from the delay circuit 5 and the signal from the switch 8 are supplied to the subtraction circuit 14,
The signal from this subtraction circuit 14 is transmitted to the phase correction circuit 16.
supplied to Further, a signal from the switch 6 is supplied to a delay circuit 19. Furthermore, the signal from the input terminal 1 and the signal from the mixing circuit 20 are supplied to a selection switch 21.
従つてこの回路において、通常時スイツチ8が
フイルタ3側に切換えられているときは、遅延回
路5及び減算回路14でくし形フイルタが構成さ
れる。そしてこのくし形フイルタと帯域通過フイ
ルタ3とでクロマ信号Scが正確に分離される。
すなわち遅延回路5とフイルタ3とで、遅延回路
13とフイルタ15とが代用されてクロマ信号
Scの分離が行われる。 Therefore, in this circuit, when the switch 8 is normally switched to the filter 3 side, the delay circuit 5 and the subtraction circuit 14 form a comb filter. The chroma signal Sc is separated accurately by this comb filter and the bandpass filter 3.
In other words, the delay circuit 5 and filter 3 replace the delay circuit 13 and filter 15, and the chroma signal
Separation of Sc is performed.
そしてクロマ信号Scにドロツプアウトが発生
したときは、スイツチ8がインバータ7側に切換
えられ、減算回路14からは1水平期間遅延され
た信号が取り出されて位相補正回路16に供給さ
れる。他は第1図、第2図と同様に動作される。 When a dropout occurs in the chroma signal Sc, the switch 8 is switched to the inverter 7 side, and a signal delayed by one horizontal period is taken out from the subtraction circuit 14 and supplied to the phase correction circuit 16. The other operations are the same as in FIGS. 1 and 2.
こうしてドロツプアウトの補償及びクロマ信号
の位相補正が行われるわけであるが、本発明によ
れば、輝度信号Syとクロマ信号Scの分離が一回
のみで済まさせると共に、通常時クロマ信号Sc
の位相補正回路16にはくし形フイルタで分離さ
れた信号が供給され、ドロツプアウト補償時には
くし形フイルタが除去されるので、常に良好な信
号を取り出すことができる。 In this way, dropout compensation and phase correction of the chroma signal are performed.According to the present invention, the luminance signal Sy and the chroma signal Sc can be separated only once, and the chroma signal Sc during normal operation can be separated.
A signal separated by a comb filter is supplied to the phase correction circuit 16, and since the comb filter is removed during dropout compensation, a good signal can always be taken out.
また遅延回路13、帯域通過フイルタ15等を
遅延回路5、帯域通過フイルタ3等で代用するよ
うにしたので、構成が極めて簡単になる。さらに
回路素子数が少なくなるので、価格が下げられる
と共に装置も小型にできる。 Furthermore, since the delay circuit 13, bandpass filter 15, etc. are replaced by the delay circuit 5, bandpass filter 3, etc., the configuration becomes extremely simple. Furthermore, since the number of circuit elements is reduced, the price can be lowered and the device can be made smaller.
なおドロツプアウト補償時のクロマ信号Scは
帯域通過フイルタ3のみで分離されることになる
ので、フイルタ3の特性は従来のものより多少厳
密にする必要がある。しかしながらドロツプアウ
トの補償期間は1水平期間のみなので、この間の
クロマ信号Scの分離が多少劣つていても問題は
無い。 Note that since the chroma signal Sc during dropout compensation is separated only by the bandpass filter 3, the characteristics of the filter 3 must be made somewhat stricter than those of the conventional filter. However, since the dropout compensation period is only one horizontal period, there is no problem even if the separation of the chroma signal Sc during this period is somewhat inferior.
第1図、第2図は従来の装置の系統図、第3図
は本発明の一例の系統図である。
1は入力端子、2は帯域除去フイルタ、3は帯
域通過フイルタ、4,5は1水平期間の遅延回
路、6,8,21はスイツチ、7はインバータ、
14は減算回路、16はクロマ信号の位相補正信
号、19は遅延回路、20は混合回路、22は出
力端子である。
1 and 2 are system diagrams of a conventional device, and FIG. 3 is a system diagram of an example of the present invention. 1 is an input terminal, 2 is a band rejection filter, 3 is a band pass filter, 4 and 5 are delay circuits for one horizontal period, 6, 8, and 21 are switches, 7 is an inverter,
14 is a subtraction circuit, 16 is a phase correction signal for a chroma signal, 19 is a delay circuit, 20 is a mixing circuit, and 22 is an output terminal.
Claims (1)
イルタに供給して輝度信号とクロマ信号とを分離
し、この分離した輝度信号とクロマ信号をそれぞ
れ1水平期間の遅延回路に供給し、上記輝度信号
系には上記1水平期間の遅延後の信号と元の信号
とを選択する第1のスイツチを設けると共に、上
記クロマ信号系には上記1水平期間の遅延後の信
号を位相反転した信号と元の信号とを選択する第
2のスイツチと、この第2のスイツチからの信号
と上記1水平期間の遅延後の信号との差信号を取
り出す減算回路とを設け、この減算回路からの信
号を所定の位相処理を行つた後上記第1のスイツ
チからの信号と混合して取り出すようにした映像
信号の処理回路。1. The video signal is supplied to a band elimination filter and a band pass filter to separate the luminance signal and chroma signal, and the separated luminance signal and chroma signal are each supplied to a delay circuit of one horizontal period, and the luminance signal system is is provided with a first switch for selecting the signal after the delay of one horizontal period and the original signal, and the chroma signal system has a signal obtained by inverting the phase of the signal after the delay of one horizontal period and the original signal. and a subtraction circuit for extracting a difference signal between the signal from the second switch and the signal delayed by one horizontal period, and the signal from the subtraction circuit is adjusted to a predetermined phase. A video signal processing circuit which, after processing, mixes it with the signal from the first switch and extracts it.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55146614A JPS5769988A (en) | 1980-10-20 | 1980-10-20 | Processing circuit for video signal |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55146614A JPS5769988A (en) | 1980-10-20 | 1980-10-20 | Processing circuit for video signal |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5769988A JPS5769988A (en) | 1982-04-30 |
JPS6358437B2 true JPS6358437B2 (en) | 1988-11-15 |
Family
ID=15411712
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55146614A Granted JPS5769988A (en) | 1980-10-20 | 1980-10-20 | Processing circuit for video signal |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5769988A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH032520U (en) * | 1989-05-26 | 1991-01-11 |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5861586U (en) * | 1981-10-20 | 1983-04-25 | 三洋電機株式会社 | video tape recorder |
JPS61208995A (en) * | 1985-03-13 | 1986-09-17 | Pioneer Electronic Corp | Dropout correcting circuit |
-
1980
- 1980-10-20 JP JP55146614A patent/JPS5769988A/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH032520U (en) * | 1989-05-26 | 1991-01-11 |
Also Published As
Publication number | Publication date |
---|---|
JPS5769988A (en) | 1982-04-30 |
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