JPS5861586U - video tape recorder - Google Patents
video tape recorderInfo
- Publication number
- JPS5861586U JPS5861586U JP15614781U JP15614781U JPS5861586U JP S5861586 U JPS5861586 U JP S5861586U JP 15614781 U JP15614781 U JP 15614781U JP 15614781 U JP15614781 U JP 15614781U JP S5861586 U JPS5861586 U JP S5861586U
- Authority
- JP
- Japan
- Prior art keywords
- mixed
- signal
- video signal
- section
- outputs
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来のビデオテープレコーダの一部のブロック
結線図、第2図はこの考案のビデオテープレコーダの1
実施例のブロック結線図である。
1・・・混合回路部、2.3・・・第1、第2フィルタ
部、4・・・リミッタ部、DLY・・・広帯域遅延線回
路、MIXE・・・第5混合回路、SWA・・・ドロッ
プアウト補償スイッチ回路、SWB、SWC・・・第1
、第2スキュー補正スイッチ回路、dlo・・・スキュ
ー出力端子。Figure 1 is a block diagram of a part of a conventional video tape recorder, and Figure 2 is a diagram of a part of the video tape recorder of this invention.
It is a block wiring diagram of an example. DESCRIPTION OF SYMBOLS 1... Mixing circuit section, 2.3... First and second filter sections, 4... Limiter section, DLY... Broadband delay line circuit, MIXE... Fifth mixing circuit, SWA...・Dropout compensation switch circuit, SWB, SWC...1st
, second skew correction switch circuit, dlo...skew output terminal.
Claims (1)
り混合輝度信号、混合カラー信号それぞれを出力すると
ともに再生時に入力された再生復調輝度信号および再生
カラー信号の演算処理によりクロストーク成分の除去さ
れた混合ビデオ信号、混合ノイズ信号それぞれを出力す
る混合回路部と、該混合回路部に設けられ所定の水平期
間遅延された遅延ビデオ信号を出力する広帯域遅延線回
路と、前記混合回路部の前記混合□輝度信号、混合カラ
ー信号゛力(入力され前記混合輝度信号の無相関成分を
補償するとともに前記混合回路部の前記混合ビデオ信号
、混合ノイズ信号が入力され前記混合ビデオ信号の無相
開成゛ 分の補償およびノイズ成分の除去を行なう第1
フィルタ部と、該フィルタ部を介した前記混合輝度信号
が入力され記録輝度信号を出力するとともに前記第1フ
ィルタ部を介した真性ノイズ成分を抽出して前記混合ビ
デオ信号から前記真性ノイズ成分を除去し再生ビデオ信
号を出力するリミッタ部と、前記混合回路部の前記混合
カラー信号が入力され記録カラー信号を出力する第2フ
ィルタ部と、再生時に前記遅延ビデオ信号を前記混合回
路部の入力側に帰還し前記混合ビデオ信号のドロップア
ウト補償を行なうドロップアウト補償スイッチ回路とを
備えたビデオテープレコーダ。 ■ 混合回路部の混合ノイズ信号を広帯域遅延線回路の
入力側に帰還する第1スキュー補正スイッチ回路と、前
記広帯域遅延線回路の入力ビデオ信号と前記混合ノイズ
信号とを演算処理し前記入力ビデオ信号のストローク成
分を除去するスキュー混合器と、前記広帯域遅延線回路
に設けられ所定の水平期間遅延されたスキュービデオ信
号を出力するスキュー出力端子と、リミッタ部の再生ビ
デオ信号、前記スキュービデオ信号が入力されスキュー
補正時に前記スキュービデオ信号を出力する第2スキュ
ー補正スイッチ回路とを備えた実用新案登録請求の範囲
第1項一に記載のビデオテープレコーダ。[Claims for Utility Model Registration] ■ Outputting a mixed luminance signal and a mixed color signal by arithmetic processing of a recording video signal inputted during recording, and by arithmetic processing of a reproduced demodulated luminance signal and a reproduced color signal inputted during playback. a mixing circuit unit that outputs a mixed video signal from which crosstalk components have been removed and a mixed noise signal; a broadband delay line circuit provided in the mixing circuit unit that outputs a delayed video signal delayed by a predetermined horizontal period; The mixed luminance signal and mixed color signal of the mixing circuit section are inputted to compensate for the uncorrelated components of the mixed luminance signal, and the mixed video signal and mixed noise signal of the mixing circuit section are inputted to the mixed video signal. The first one compensates for the phaseless component and removes the noise component.
a filter section, which receives the mixed luminance signal through the filter section and outputs a recording luminance signal, and extracts the intrinsic noise component through the first filter section to remove the intrinsic noise component from the mixed video signal; a limiter section that outputs a reproduced video signal; a second filter section that receives the mixed color signal of the mixing circuit section and outputs a recording color signal; and a second filter section that receives the mixed color signal of the mixing circuit section and outputs a recording color signal; a dropout compensation switch circuit that returns and performs dropout compensation of the mixed video signal. ■ A first skew correction switch circuit that feeds back the mixed noise signal of the mixing circuit section to the input side of the wideband delay line circuit, and a first skew correction switch circuit that processes the input video signal of the wideband delay line circuit and the mixed noise signal to generate the input video signal a skew mixer for removing a stroke component of the circuit; a skew output terminal provided in the broadband delay line circuit for outputting a skewed video signal delayed by a predetermined horizontal period; and a reproduced video signal of a limiter section, to which the skewed video signal is input. A video tape recorder according to claim 1, further comprising a second skew correction switch circuit that outputs the skew video signal during skew correction.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15614781U JPS5861586U (en) | 1981-10-20 | 1981-10-20 | video tape recorder |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15614781U JPS5861586U (en) | 1981-10-20 | 1981-10-20 | video tape recorder |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5861586U true JPS5861586U (en) | 1983-04-25 |
JPH0411435Y2 JPH0411435Y2 (en) | 1992-03-23 |
Family
ID=29948700
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15614781U Granted JPS5861586U (en) | 1981-10-20 | 1981-10-20 | video tape recorder |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5861586U (en) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54143021A (en) * | 1978-04-28 | 1979-11-07 | Sony Corp | Processing circuit of video signal |
JPS5582583A (en) * | 1978-12-18 | 1980-06-21 | Sony Corp | Recording and reproducing unit for video signal |
JPS5769988A (en) * | 1980-10-20 | 1982-04-30 | Sony Corp | Processing circuit for video signal |
JPS5813789U (en) * | 1981-07-16 | 1983-01-28 | ソニー株式会社 | Video signal processing device |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5813789B2 (en) * | 1979-01-31 | 1983-03-15 | いすゞ自動車株式会社 | How to connect flexible pipe and exhaust pipe |
-
1981
- 1981-10-20 JP JP15614781U patent/JPS5861586U/en active Granted
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54143021A (en) * | 1978-04-28 | 1979-11-07 | Sony Corp | Processing circuit of video signal |
JPS5582583A (en) * | 1978-12-18 | 1980-06-21 | Sony Corp | Recording and reproducing unit for video signal |
JPS5769988A (en) * | 1980-10-20 | 1982-04-30 | Sony Corp | Processing circuit for video signal |
JPS5813789U (en) * | 1981-07-16 | 1983-01-28 | ソニー株式会社 | Video signal processing device |
Also Published As
Publication number | Publication date |
---|---|
JPH0411435Y2 (en) | 1992-03-23 |
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