JPH0287781A - Contour emphasis circuit - Google Patents

Contour emphasis circuit

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Publication number
JPH0287781A
JPH0287781A JP63238811A JP23881188A JPH0287781A JP H0287781 A JPH0287781 A JP H0287781A JP 63238811 A JP63238811 A JP 63238811A JP 23881188 A JP23881188 A JP 23881188A JP H0287781 A JPH0287781 A JP H0287781A
Authority
JP
Japan
Prior art keywords
signal
circuit
adder
luminance signal
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63238811A
Other languages
Japanese (ja)
Inventor
Hiroaki Serita
芹田 洋昭
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP63238811A priority Critical patent/JPH0287781A/en
Publication of JPH0287781A publication Critical patent/JPH0287781A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To mount the circuit to a VTR circuit for a camera incorporating type VTR enhance the circuit utilizing efficiency by utilizing part of a Y comb- line circuit so as to constitute a contour emphasis circuit for a luminance signal. CONSTITUTION:A luminance signal 200 inputted to a contour emphasis circuit 1 is inputted to an adder 12 directly and via a 1H delay circuit 11. A noncorrelation signal and a crosstalk signal are outputted from the adder 12 to a limiter circuit 13, which outputs only the crosstalk signal to an adder 14. The adder 14 adds the crosstalk signal to the luminance signal 200 in an opposite phase to eliminate the crosstalk signal. On the other hand, a slice circuit 15 outputs a noncorrelation signal to a variable resistor 17 via a switch circuit 16. The adder 14 forms a luminance signal whose contour is emphasized and outputs the result. The switch 8 is opened at recording. The comb-line characteristic and the contour emphasis characteristic are provided by the delay circuit 11 only in this way to enhance the circuit utilizing efficiency.

Description

【発明の詳細な説明】 [発明の目的] (産業上の利用分野) 本発明はビデオテープレコーダ(VTR)等で処理され
る映像信号の輪郭強調回路に関する。
DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to an edge enhancement circuit for a video signal processed by a video tape recorder (VTR) or the like.

(従来の技術) 従来、カメラ一体形VTRにてカメラ回路側とVTR回
路側とを分割した場合、上記輪郭強調回路はカメラ回路
側に属しており、その回路構成は第4図に示す如くであ
る。即ち、1日(1水平期間)遅延回路10に第5図(
A>に示すような輝度信号100が入力されると、この
輝度信号100は1日期間遅延された第5図(B)に示
すような遅延信号200となって減痒器20へ入力され
る。この減算器20へは前記輝度信号100も直接入力
されるため、この減算器では第5図(C)に示すような
両信号の差信号300が得られ、これがスライス回路3
0に入力される。このスライス回路30は入力信号から
DCに近い信号及び差の少ない信号を除去した信号を作
出し、これを加算器40に出力する。
(Prior Art) Conventionally, when the camera circuit side and the VTR circuit side are divided in a camera-integrated VTR, the above-mentioned contour enhancement circuit belongs to the camera circuit side, and its circuit configuration is as shown in FIG. be. That is, the one-day (one horizontal period) delay circuit 10 shown in FIG.
When a luminance signal 100 as shown in A> is input, this luminance signal 100 is delayed for one day and becomes a delayed signal 200 as shown in FIG. . Since the luminance signal 100 is also directly input to this subtracter 20, this subtracter obtains a difference signal 300 between the two signals as shown in FIG.
It is input to 0. This slice circuit 30 creates a signal by removing signals close to DC and signals with little difference from the input signal, and outputs this to an adder 40.

この加算器40には輝度信号100も直接入力されるた
め、この輝度信号100に前記スライス回路30からの
信号が加算され、この加算信号である輝度信号400が
出力される。ところで、スライス回路30では前述した
如く入力信号のDCに近い信号及び差の少ない信号が除
去されているため、スライス回路30から出力される信
号は映像の輪郭部分の信号となる。従って、加締器40
から出力される輝度信号は輪郭が強調された信号となる
。ところが、前記VTR回路側にも上記した輪郭強調回
路に近い回路であるYくし形回路が設けられている。従
って、従来のカメラ一体形VTRでは略同様の回路がカ
メラ回路側とVTR回路側の両方に搭載されていること
になり、回路の利用効率が悪いという欠点があった。ま
たカメラ回路側で従来の如く輪郭強調を行うと、記録時
だけしか輪郭強調を行うことができないという欠点があ
った。
Since the brightness signal 100 is also directly input to this adder 40, the signal from the slice circuit 30 is added to this brightness signal 100, and the brightness signal 400 which is this added signal is output. By the way, since the slicing circuit 30 removes signals close to DC and signals with little difference from the input signal as described above, the signal output from the slicing circuit 30 becomes a signal of the outline portion of the image. Therefore, the tightening device 40
The luminance signal outputted from the is a signal with emphasized contours. However, the VTR circuit side is also provided with a Y-comb circuit, which is a circuit similar to the above-mentioned contour emphasizing circuit. Therefore, in the conventional camera-integrated VTR, substantially the same circuit is installed on both the camera circuit side and the VTR circuit side, which has the drawback of poor circuit utilization efficiency. Furthermore, when contour enhancement is conventionally performed on the camera circuit side, there is a drawback that contour enhancement can only be performed during recording.

(発明が解決しようとする課題) 従来のカメラ一体形VTRではカメラ回路側に輪郭強調
回路を持つと共に、VTR回路側にこれと似たY<L形
回路を持っているため、回路の利用効率が悪く、部品点
数が多くなるという欠点かあった。また輪郭強調を記録
時だけにしか行えないという欠点もあった。そこで本発
明は上記の欠点を除去するもので、Yくし形回路の一部
を利用して輝度信号の輪郭強調回路を構成して、これを
カメラ一体形VTRのVTR側回路に搭載して、回路利
用効率を著しく高めることができる輪郭強調回路を提供
することを目的としている。
(Problems to be Solved by the Invention) Conventional camera-integrated VTRs have an edge enhancement circuit on the camera circuit side and a similar Y<L-shaped circuit on the VTR circuit side, which improves circuit utilization efficiency. The problem was that it had poor performance and a large number of parts. Another drawback was that contour enhancement could only be performed during recording. Therefore, the present invention aims to eliminate the above-mentioned drawbacks by constructing a brightness signal contour enhancement circuit using a part of the Y-comb circuit, and installing this circuit in the VTR side circuit of a camera-integrated VTR. It is an object of the present invention to provide an edge enhancement circuit that can significantly improve circuit utilization efficiency.

[発明の構成] (課題を解決するための手段) 本発明の輪DIS強調回路は、人力される輝度信号を所
定期間遅延する信号遅延手段と、この信号遅延手段から
の出力信号と前記輝度信号を加算して差分信号を作出す
る第1の加算手段と、この第1の加算手段から出力され
る差分信号から相関信号を除去してノイズ成分を抽出す
る振幅制限手段と、前記第1の加算手段から出力される
前記差分信号からノイズ成分を除去して相関信号を抽出
する信号スライス手段と、前記輝度信号がビデオテープ
レコーダの再生信号の時のみ、前記振幅制限手段から出
力されるノイズ成分を通過させるスイッチ手段と、信号
スライス手段から出力される相関信号及び前記スイッチ
手段の出力信号とを前記輝度信号に加算する第2の加算
手段とを具備したこと構成を有している。
[Structure of the Invention] (Means for Solving the Problems) The ring DIS emphasizing circuit of the present invention includes a signal delaying means for delaying a manually input luminance signal for a predetermined period, and an output signal from the signal delaying means and the luminance signal. a first addition means for producing a difference signal by adding the first addition means; an amplitude limiting means for removing a correlation signal from the difference signal outputted from the first addition means to extract a noise component; signal slicing means for extracting a correlation signal by removing noise components from the difference signal output from the means; and signal slicing means for removing noise components output from the amplitude limiting means only when the luminance signal is a reproduction signal of a video tape recorder The luminance signal is configured to include a switch means for passing the luminance signal, and a second addition means for adding the correlation signal outputted from the signal slicing means and the output signal of the switch means to the luminance signal.

(作用) 本発明の輪郭強調回路において、信号遅延手段は入ツノ
される輝度信号を所定期間遅延し、この遅延信号を第1
の加算手段に出力する。第1の加算手段は前記信号遅延
手段からの出力信号と前記輝度信号を加算して差分信号
を作出し、これを振幅制限手段及び信号スライス手段に
出力する。振幅制限手段は前記第1の加算手段から出力
される差分信号から相関信号を除去してノイズ成分を抽
出し、これをスイッチ手段に出ツノする。信号スライス
手段は前記第1の加算手段から出力される前記差分信号
からノイズ成分を除去して相関信号を抽出し、これを第
2の加算手段に出力する。第2の加算手段は前記信号ス
ライス手段から出力される相関信号又はこの相関信号及
び前記振幅制限手段から出ツノされるノイズ成分を前記
輝度信号に加算する。前記スイッチ手段は前記輝度信号
がビデオテープレコーダの再生信号の時のみ、前記娠幅
イ11限手段から出力されるノイズ成分を前記第2の加
算手段に入力させる。
(Function) In the edge enhancement circuit of the present invention, the signal delay means delays the input luminance signal by a predetermined period, and transfers this delayed signal to the first
output to the adding means. The first adding means adds the output signal from the signal delaying means and the luminance signal to create a difference signal, and outputs this to the amplitude limiting means and the signal slicing means. The amplitude limiting means removes the correlation signal from the difference signal output from the first adding means, extracts a noise component, and outputs it to the switch means. The signal slicing means removes noise components from the difference signal output from the first addition means, extracts a correlation signal, and outputs this to the second addition means. The second adding means adds the correlation signal outputted from the signal slicing means or the correlation signal and the noise component outputted from the amplitude limiting means to the luminance signal. The switch means inputs the noise component output from the width limiting means to the second adding means only when the luminance signal is a reproduction signal of a video tape recorder.

(実施例) 以下、本発明の一実施例を図面を参照して説明する。第
1図は本発明の再生時の輪郭強調回路の一実施例を示し
たブロック図である。1はくし形特性を有する輪郭強調
回路である。2は再生FM信号を検波する検波回路、3
はベースバンドの輝度信号のみを抽出するローパスフィ
ルタ。4はデイエンファシス回路で、記録時のズリエン
ファシス回路と逆特性を右しているものとする。11は
入力信号を1H期間遅延する1日遅延回路、12゜14
は加算器、13は入力信号の振幅を制限するリミッタ回
路、15は入力信号をスライスするスライス回路、16
はスイッチ回路、17は可変抵抗器である。
(Example) Hereinafter, an example of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of the contour emphasizing circuit during reproduction according to the present invention. 1 is an edge enhancement circuit having comb-shaped characteristics. 2 is a detection circuit that detects the reproduced FM signal; 3
is a low-pass filter that extracts only the baseband luminance signal. 4 is a de-emphasis circuit, which has characteristics opposite to those of the de-emphasis circuit during recording. 11 is a one-day delay circuit that delays the input signal for 1H period, 12゜14
is an adder, 13 is a limiter circuit that limits the amplitude of the input signal, 15 is a slice circuit that slices the input signal, 16
1 is a switch circuit, and 17 is a variable resistor.

次に本実施例の動作について説明する。再生FM信号1
00は検波回路2にて検波された後、ローパスフィルり
3に入力されてベースバンドのN軍1迂信号となる。こ
の輝度信号はデイエンファシス回路4にて記録時の輝度
信号と同等の1!1性を持った信号となって、輪郭強調
回路1に人力される。この輪郭強調回路1に入力された
輝度信号200は加算器12に入力されると共に、1日
遅延回路11にて1日遅延された後、同加紳器12に入
力されるため、加算器12からは非相関信号とクロスト
ーク信号かリミッタ回路13に出力される。リミッタ回
路13は入力信号から非相関信号を取り除いた後、クロ
ス1−一り信号のみを)Jall器14器用4する。こ
の加算器1/Iには輝度信号200がn種入力されるた
め、hnn蒸器14この輝度信号200に+Tr記リミ
リミッタ回路13出力されるクロストーク信号を逆相加
瞳して、前記輝度信号200からクロス1−一り信号を
除く。
Next, the operation of this embodiment will be explained. Playback FM signal 1
After the signal 00 is detected by the detection circuit 2, it is input to the low-pass filter 3 and becomes a baseband N-group 1 detour signal. This luminance signal is converted into a signal having a 1:1 characteristic equivalent to the luminance signal at the time of recording by the de-emphasis circuit 4, and is inputted to the contour emphasizing circuit 1. The brightness signal 200 input to the edge enhancement circuit 1 is input to the adder 12, and is also input to the adder 12 after being delayed by one day in the one-day delay circuit 11. From there, a non-correlation signal and a crosstalk signal are output to the limiter circuit 13. After removing the uncorrelated signal from the input signal, the limiter circuit 13 converts only the cross 1 - 1 signal to the Jall circuit 14 . Since n types of luminance signals 200 are inputted to this adder 1/I, the hnn vaporizer 14 inversely adds the crosstalk signal outputted from the +Tr limiter circuit 13 to this luminance signal 200 to obtain the luminance signal 200. Remove the cross 1-1 signal from.

一方、前記加締器12から出力される非相関信号とクロ
ストーク信号はスライス回路15に入力され、ここで、
非相関信号のみか抽出され、この非相関信号がスイッチ
回路16を介して、可変抵抗器17に出力される。可変
抵抗器17にてレベルが調整された非相関信号は加算器
14に入力されるため、加算器14では前記クロストー
ク成分が除去された輝度信号に前記非相関信号を加ti
して輪郭が強調された輝度信号を作出して、これを出力
する。なお、等価パルス垂直同期時には輝度信号200
に非相関信号が生じるため、これをこのまま加算器14
にて輝度信号に加算すると、等価パルス垂直同期時に異
常が生じるため、等価パルス垂直同期ljには非相関信
号を加算器14に送らないようにしな(プればならない
。このため、スイッチ回路16は等価パルス垂直同期時
に開路されるような制御が行われる。
On the other hand, the uncorrelated signal and crosstalk signal output from the tightener 12 are input to the slice circuit 15, where:
Only the uncorrelated signal is extracted, and this uncorrelated signal is output to the variable resistor 17 via the switch circuit 16. Since the uncorrelated signal whose level has been adjusted by the variable resistor 17 is input to the adder 14, the adder 14 adds the uncorrelated signal to the luminance signal from which the crosstalk component has been removed.
This creates a brightness signal with enhanced contours and outputs it. In addition, during equivalent pulse vertical synchronization, the luminance signal is 200
Since a non-correlated signal is generated in
If it is added to the luminance signal in the equivalent pulse vertical synchronization lj, an abnormality will occur during the equivalent pulse vertical synchronization. is controlled so that it is opened at the time of equivalent pulse vertical synchronization.

本実施例によれば、」ニ記の如く本例の輪郭強調回路は
1個のI N遅延回路11のみにて、くし形特性と輪郭
強調特性を持たせているため、カメラ−体形VTRのV
TR側回路のくし形フィルタ部分に本例の輪郭強調回路
を塔載することかでき、部品点数を減らして回路の利用
効率を著しく向上させることができる。また、記録時(
後述する)のみならず、カメラ一体形V T Rの輪郭
強調を再生時にも行うことができる。
According to this embodiment, as described in ``D'', the contour emphasizing circuit of this example uses only one IN delay circuit 11 to provide the comb characteristic and the contour emphasizing characteristic. V
The contour emphasizing circuit of this embodiment can be mounted on the comb filter portion of the TR side circuit, thereby reducing the number of parts and significantly improving circuit usage efficiency. Also, when recording (
(described later), it is also possible to enhance the outline of a camera-integrated VTR during playback.

第2図は本発明の記録時の輪郭強調回路の一実施例を示
したブロック図である。この例の輪郭強調回路1はリミ
ッタ回路13と加算器14との間にス・インチ18か挿
入され、且つ、前実施例にあった可変抵抗器17が省略
された回路を有し、他の構成は前実施例と同一である。
FIG. 2 is a block diagram showing an embodiment of an edge enhancement circuit during recording according to the present invention. The contour emphasizing circuit 1 of this example has a circuit in which a switch 18 is inserted between the limiter circuit 13 and the adder 14, and the variable resistor 17 in the previous embodiment is omitted, and other circuits are used. The configuration is the same as the previous embodiment.

但し、この輪郭強調回路1の前段には輝度信号と色信号
とを分離づるY/C分離回路5とローパスフィルタ6が
配設されている。複合映像信号300はY/C分離回路
5に入力されて、ここで輝度信号と色信号成分に分離さ
れ、輝度信号のみがローパスフィルタ6に入力される。
However, a Y/C separation circuit 5 and a low-pass filter 6 for separating a luminance signal and a color signal are provided before the edge enhancement circuit 1. The composite video signal 300 is input to the Y/C separation circuit 5, where it is separated into a luminance signal and a color signal component, and only the luminance signal is input to the low-pass filter 6.

このローパスフィルタ6に入力された輝度信号はここで
高域成分が除去された後、輪郭強調回路1に入力される
。この輪郭強調回路1の加算器12では前実施例と同様
に入力輝度信号200の非相関信号とクロスl〜−り信
号とが抽出され、これがリミッタ回路13とスライス回
路15に入力される。
The luminance signal input to the low-pass filter 6 is input to the contour enhancement circuit 1 after high-frequency components are removed here. The adder 12 of the edge enhancement circuit 1 extracts the non-correlated signal and the cross signal of the input luminance signal 200, and inputs them to the limiter circuit 13 and the slice circuit 15, as in the previous embodiment.

リミッタ回路13は輝度信号200から非相関信号を除
去してクロストーク信号のみとし、これをスイッチ18
を介して加算器14に出力する。但し、スイッチ18は
記録時間路されていて、記録時にはリミッタ回路13か
ら出力されるクロス1〜−り信号は加算器14には入力
されないようになっている。一方、スライス回路15に
入力された非相関信号とクロスト−クイ5号はここで非
相関信号のみとなり、スイッチ回路16を介して加n器
14に入力される。従って、加算器14ではローパスフ
ィルタ6から出力される輝度信号200に非相関信号の
みが加算され、輪郭が強調された輝度信号か作成されて
、これが出力される。従って、記録時には輪郭強調機能
のみが働き、くし形フィルタ機能は動作しないようにな
っている。
The limiter circuit 13 removes the uncorrelated signal from the luminance signal 200, leaving only the crosstalk signal, and transfers this signal to the switch 18.
It is output to the adder 14 via. However, the switch 18 is set to the recording time path so that the cross 1 to - - signals output from the limiter circuit 13 are not input to the adder 14 during recording. On the other hand, the uncorrelated signal and crosstalk signal No. 5 inputted to the slice circuit 15 now become only uncorrelated signals, and are inputted to the adder 14 via the switch circuit 16. Therefore, the adder 14 adds only the non-correlated signal to the luminance signal 200 output from the low-pass filter 6 to create a luminance signal with enhanced contours, which is then output. Therefore, during recording, only the edge enhancement function works, and the comb filter function does not work.

本実施例によれば、記録時の輝度信号の輪郭を■1°R
側にて強調することができ、回路効率を向上させること
ができる。なお、スイッチ回路16は前実施例と同様に
等価パルス重直同期明間には回路される。
According to this embodiment, the contour of the luminance signal during recording is set to ■1°R.
It can be emphasized on the side and the circuit efficiency can be improved. It should be noted that the switch circuit 16 is circuited between the equivalent pulse duplex and direct synchronization and light periods as in the previous embodiment.

第3図は本発明の記録時の輪郭強調回路の他の実施例を
示したブロック図である。この例では1日遅延回路11
と加締器12どの間に故toomsの遅低回路19を挿
入した回路構成を有しているため、加締器12に入力す
る遅延信号の遅延期間を11−1よりも長く(又は短く
)することができ、加算器14にて水平輪郭強調も行う
ことができる。他の効果は前実施例と同様である。
FIG. 3 is a block diagram showing another embodiment of the edge enhancement circuit during recording according to the present invention. In this example, the one-day delay circuit 11
Since it has a circuit configuration in which the late Tooms delay/low circuit 19 is inserted between the crimping device 12 and the crimping device 12, the delay period of the delay signal input to the crimping device 12 can be made longer (or shorter) than 11-1. The adder 14 can also perform horizontal edge enhancement. Other effects are similar to those of the previous embodiment.

[発明の効果] 以上記述した如く本発明の輪郭強調回路によれば、Y<
L形回路の一部を利用して輝度信号の輪郭強調回路を構
成して、これをカメラ一体形VTRのVTR側回路に搭
載して、回路利用効率を著しく高めることができる。
[Effects of the Invention] As described above, according to the contour enhancement circuit of the present invention, Y<
A part of the L-shaped circuit is used to configure a brightness signal contour enhancement circuit, and this circuit is installed in the VTR side circuit of a camera-integrated VTR, thereby significantly increasing circuit usage efficiency.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の再生時の輪郭強調回路の一実施例を示
したブロック図、第2図は本発明の記録時の輪郭強調回
路の一実施例を示したブロック図、第3図は本発明の記
録時の輪郭強調回路の他の実施例を示したブロック図、
第4図は従来の輪郭強調回路の一例を示したブロック図
、第5図は第4図の回路の各信号の動作タイミングを示
した波形図である。 1・・・輪郭強調回路 11・・・1日遅延回路 12、14・・・加算器 13・・・リミッタ回路 15・・・スライス回路 19・・・遅延回路 代理人 弁理士 則 近 憲 佑 同  宇治 弘
FIG. 1 is a block diagram showing an embodiment of the contour emphasizing circuit during reproduction according to the present invention, FIG. 2 is a block diagram showing an embodiment of the contour emphasizing circuit during recording according to the present invention, and FIG. A block diagram showing another embodiment of the edge enhancement circuit during recording of the present invention,
FIG. 4 is a block diagram showing an example of a conventional edge enhancement circuit, and FIG. 5 is a waveform diagram showing the operation timing of each signal in the circuit shown in FIG. 1... Contour enhancement circuit 11... 1 day delay circuit 12, 14... Adder 13... Limiter circuit 15... Slice circuit 19... Delay circuit Agent Patent attorney Noriyuki Chika Yudo Hiroshi Uji

Claims (1)

【特許請求の範囲】[Claims] 入力される輝度信号を所定期間遅延する信号遅延手段と
、この信号遅延手段からの出力信号と前記輝度信号を加
算して差分信号を作出する第1の加算手段と、この第1
の加算手段から出力される差分信号から相関信号を除去
してノイズ成分を抽出する振幅制限手段と、前記第1の
加算手段から出力される前記差分信号からノイズ成分を
除去して相関信号を抽出する信号スライス手段と、前記
輝度信号がビデオテープレコーダの再生信号の時のみ、
前記振幅制限手段から出力されるノイズ成分を通過させ
るスイッチ手段と、信号スライス手段から出力される相
関信号及び前記スイッチ手段の出力信号とを前記輝度信
号に加算する第2の加算手段とを具備したことを特徴と
する輪郭強調回路。
a signal delay means for delaying an input luminance signal for a predetermined period; a first addition means for adding the output signal from the signal delay means and the luminance signal to produce a difference signal;
amplitude limiting means for removing a correlation signal from the difference signal output from the addition means to extract a noise component; and extracting a correlation signal by removing the noise component from the difference signal output from the first addition means. a signal slicing means for
A switch means for passing a noise component output from the amplitude limiting means, and a second addition means for adding a correlation signal output from the signal slice means and an output signal of the switch means to the luminance signal. A contour enhancement circuit characterized by:
JP63238811A 1988-09-26 1988-09-26 Contour emphasis circuit Pending JPH0287781A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63238811A JPH0287781A (en) 1988-09-26 1988-09-26 Contour emphasis circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63238811A JPH0287781A (en) 1988-09-26 1988-09-26 Contour emphasis circuit

Publications (1)

Publication Number Publication Date
JPH0287781A true JPH0287781A (en) 1990-03-28

Family

ID=17035640

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63238811A Pending JPH0287781A (en) 1988-09-26 1988-09-26 Contour emphasis circuit

Country Status (1)

Country Link
JP (1) JPH0287781A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0418823U (en) * 1990-06-05 1992-02-17

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0418823U (en) * 1990-06-05 1992-02-17

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