JPS61189012A - Pulse output device - Google Patents

Abstract

PURPOSE:To eliminate an influence of temperature drift by providing a duty ratio adjusting circuit for comparing a set value of a setting circuit and a counter value of a counting circuit for counting a clock pulse, and varying a duty ratio of an output pulse by the time required before both the values coincide with each other. CONSTITUTION:A clock pulse generated by a clock generating circuit 1 is frequency-divided by a clock frequency dividing circuit 2, and only in a period in which an output signal PLS waveform of a inverter circuit 6 is low, an output signal (C) of the same waveform as the clock pulse is outputted from an AND circuit 7, and inputted to a counter circuit 8. When a numerical value '3' is inputted in advance in an input terminal B of a comparing circuit 9, a coincidence signal is outputted at the time point of the third time of arise of the output pulse from the AND circuit 7. A flip-flop 12 in a flip-flop circuit 11 is set, when the PLS waveform becomes high, and reset, when a flip-flop 13 is set by the coincidence signal, therefore, the output signal of the flip-flop circuit 11 becomes a waveform (E) whose duty ratio is varied.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a pulse output device, and particularly to a pulse output device that can change the duty ratio of pulses.

[Conventional technology]

FIG. 4 is a block diagram showing the circuit configuration of a conventional pulse output device, including a clock frequency divider circuit 2 for dividing the frequency of the Glock pulse from the system clock generation circuit 1, an output control circuit 3. Isolation circuit 4 using photo coupler
and a pulse duty ratio adjustment circuit 5 made up of C and R.

The operation will be briefly explained. The clock pulses generated by the system clock generation circuit 1 are divided into desired pulse widths by the clock frequency dividing circuit 2, and the output control circuit 3 provides isolation using a photocoupler for a period specified by the number of pulses. Output via circuit 4. At this time, the pulse duty ratio can be adjusted in advance using fixed C and R1111 of the pulse duty ratio adjustment circuit 5.

[Problems that the invention is supposed to solve]

Since the conventional pulse output device is configured as described above, the rise time and fall time of the photocoupler in the isolation circuit are different, and the duty ratio changes before and after the rise time and fall time. Therefore, in order to correct this, it is connected to appropriate fixed C and R1 to obtain the desired pulse output. However, the duty ratio is not constant due to factors such as the fact that the power supply voltage of the connected load is not the same type or variations in circuit elements, so there may be cases where the desired pulse width is not satisfied. . As a result, there are loads that cannot be connected. Further, there is a problem that there is a temperature drift in C and R, which adjust the duty ratio, and that the duty ratio is affected by temperature.

This invention was made to solve the above problems.
7t, the power supply voltage of the pulse input circuit that serves as the load changes, and there are variations in the circuit elements, and the duty ratio of the output pulse changes.
It is an object of the present invention to provide a pulse output device in which the ratio can be adjusted and the duty ratio is not affected by temperature drift.

[Means for solving problems]

The pulse output device according to the present invention includes a digital pulse duty ratio adjustment circuit that can freely adjust the pulse duty ratio according to the setting value of the setting circuit.

[Effect]

The pulse duty ratio adjustment circuit in this invention is as follows:
By giving data in advance, the desired duty ratio can be obtained, so the duty ratio can be adjusted freely depending on the various power supply voltages of the pulse input circuit that serves as the load, as well as variations in circuit elements. can be adjusted to Furthermore, since the duty ratio is digitally adjusted, it is not affected by temperature changes.

〔Example〕

An embodiment of the present invention will be described below with reference to FIG. 1, in which the same parts as in FIG. 4 are denoted by the same reference numerals.

6 is an inverter circuit, %T is an AND circuit, 8 is a counter circuit, 9 is a comparison circuit, 10 is a duty ratio setting circuit,
Reference numeral 11 denotes a 7-lip, 70-tube circuit, and these circuits constitute a digital N@pulse duty ratio adjustment circuit 14.

The flip-flop circuit 11 is composed of two 7-lip 70 tubes 12 and 13, as shown in FIG.

FIG. 3 shows signal waveform diagrams of each part of the circuit shown in FIG. 1. One is the rL7t clock pulse generated by the system clock generation circuit 1, B is the output signal of the clock frequency divider circuit 2, and C is the A
The output signal of the ND circuit, D is the match signal output from the comparison circuit 9, and E is the output signal of the flip-flop circuit 10.

The operation of the embodiment of the present invention will be briefly described with reference to FIG. 1.2 with reference to the signal waveform diagram of FIG.

The clock pulse (FIG. 3A) generated by the system clock generation circuit 1 is frequency-divided by the clock frequency dividing circuit 2 and defined by the output control circuit 3. TL72: Specifies the number of pulses rl
, is output for a period of time (Fig. 3B).

Now, enter the value “3” in the setting circuit 10 as the duty adjustment value.
”, the value “3” will be input to the input terminal B of the comparator circuit 8 until it is reset due to the operation of the setting circuit 9.

Also, the output signal from the clock frequency dividing circuit 2 is as follows.

It is inverted by the inverter circuit 6 and input to the AND circuit 7.
Ru. A control signal from the output control circuit 3 and a clock pulse from the system clock generation circuit 1 are input to the AND circuit 7. These three human forces are ANDed, and the output signal PLS waveform of the inverter circuit 6 is A only during the LOW period.
The ND circuit 7 outputs an output signal (FIG. 3C) having the same waveform as the clock pulse, and this output signal is input to the counter circuit 8.

The counter circuit 8 counts by 1 every time the human cover y rises, and outputs the count result as a numerical value. The next count value output from this counter circuit is input to input terminal A of comparison circuit 9. When the input value at the input terminal B matches the input value at the input terminal B, the comparator circuit 9 outputs a match signal (FIG. 3D) t- from the output terminal A=B. In other words, the comparison circuit 9
The numerical value "3" is input to the 0 input terminal BVc as described above.
As a result, a coincidence signal is output when the output pulse from the AND circuit 7 rises for the third time.

The 7 flip-flop 12 in the flip-flop circuit 11 receives the clock output from the clock divider circuit 2 and the inverter circuit 6.
The output signal PLS passed through is input, and this PLS
It is set when the waveform becomes HIGH. Then, when the above coincidence signal is input to the flip-flop 70 block 13 and the clock pulse rises, this flip-flop 13 is set lrL, and in order to reset the flip-flop 7 block 12, the output of the flip-flop is set lrL. The output signal of the flip-flop circuit 11 has the waveform shown in FIG. 3E. This output signal is outputted via the isolation circuit 4.

Comparing the waveforms in FIG. 3B and FIG. 3E, it can be seen that the duty ratio has changed by three clock pulses. As a result, the duty ratio can be adjusted using the width of the clock pulse as the minimum unit according to the numerical value set in the setting circuit 10.

Although the above-mentioned embodiment shows an example in a pulse output circuit, it goes without saying that the present invention can also be used to adjust the pulse width in other circuits than the output circuit.

〔Effect of the invention〕

As explained above, in this invention, by adding a circuit that can digitally adjust the duty ratio of pulses using software, the duty ratio of pulses can be adjusted in accordance with variations in one circuit element and the load power supply voltage. As a result, there are fewer restrictions on the load that can be connected, versatility is increased, and the pulse duty ratio is not affected by temperature changes, resulting in increased stability.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing an embodiment of the present invention, Fig. 2 is a block diagram showing an example of the configuration of a flip-flop circuit that is a component of the embodiment, and Fig. 3 shows the operation of each part of the above embodiment. Signal waveform diagram FIG. 4 is a block diagram showing a conventional pulse output device. 8 is a counter circuit, 10 is a duty ratio setting circuit 21
4 is a duty ratio adjustment circuit. Note that in FIG. 1, the same reference numerals are the same, and 17+: indicates corresponding parts.

Claims (1)

[Claims] A pulse output device equipped with a duty ratio adjustment circuit that compares a set value of a duty ratio setting circuit with a counter value of a counter circuit that counts clock pulses and changes the duty ratio of an output pulse depending on the time until the two match.