JPS61188932A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To form wirings of Al including Si by forming an intermetallic compound of Al and metal through reaction of Al metal silicide by the heat processing after formation of Al film mixing a metal silicide and simultaneously dispersing Si in the metal silicide into Al. CONSTITUTION:After an impurity diffused layer 12 is formed into a semiconductor substrate Si 11, an insulation film 13 is covered, an insulation film 13 on the impurity diffused layer 12 is removed and then a contact hole 14 is provided. Thereafter, Al wiring layer 15 is formed. In this case, paradium silicide 16 is mixed to the Al film 15. After forming a wring layer of Al and paradium silicide, the heat processing is carried out for certainly defining the contact hole and thereby an intermetallic compound 17 of paradium and Al is produced and Si 19 is released. In this case, since the intermetallic compound 17 is formed along the crystal grain boundary 18, it becomes a barrier for diffusion in the Al film of Si and prevents growth of gigantic Si grain due to precipitation of Si. Thereby, defect by increase of contact resistance and wiring resistance can be prevented and simultaneously reaction can be generated sufficiently in the sintering process at 450 deg.C.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a method for manufacturing a semiconductor device using a Si-containing comb At wiring which has low contact resistance and is resistant to electromigration.

[Technical background of the invention and its problems]

The Si-containing At wiring is used as a wiring material to prevent junction breakdown due to the reaction between the At wiring and the substrate St at the contact part.
Wide (used in LSI process).

Si dissolves in At at 450°C up to about 0.5%. Therefore, in general ~1. A containing about 0% Si
It is used as an lt-wiring, and electrode reliability is maintained by preventing reaction between A/ and the substrate Si even during heat treatment at around 450°C.

The element size of LSI is being reduced year by year, and recently a design rule of around 1.0 μm has been implemented. A
The contact dimension between the t wiring and the substrate 8i is also around 1.0 μm, but Si-containing A
When gold is used for the t-wiring, a defect occurs in which the contact resistance increases due to heat treatment. The cause of this defect will be explained using FIG. 3.

After forming an impurity diffusion layer in the substrate 5i (31),
Insulating film c13t-cover. Thereafter, the insulating film 03t on the impurity diffusion layer r33 is removed by etching to form a contact hole 34).

Next, Si is formed on the contact hole (b) and the insulating film (to).
Input t) Atp (to) is coated by a method such as sputtering or vapor deposition to form a wiring. In this state, KSi(to) in At is almost uniformly dispersed (as shown in FIG. 3(a)). Thereafter, heat treatment at about 450'C is performed to ensure contact between the At wiring and the impurity diffusion layer in the substrate 84. At this time, Si in the At film.

Since the solid solubility at 450°C is ~0.5%.

In a typical 1-Si-containing At film, ~0.5% of D is dissolved in At, but the remaining D is precipitated. Furthermore, during the cooling process after heat treatment, the solid solubility decreases and excess Si
further precipitates, and since the solid solubility is close to ~0 at room temperature, almost all of the Si in At will precipitate.

As shown in FIG. 3(b), this precipitated Si takes the form of precipitation (G7) on the contact portion and in the wiring. Since these precipitated Si have high resistance, they cause an increase in contact resistance and wiring resistance.

Such precipitation S1 occurs because the diffusion coefficient of Si in At is large, for example, at ~300°C.

It travels a total distance of ~3 μm in 3 minutes.

Therefore, even if 8i is initially uniformly dispersed in the film, Si will easily precipitate after a short heat treatment.

[Purpose of the invention]

The present invention is intended to improve the problems of the conventional Si and 9At interconnects as described above, and to manufacture a semiconductor device having highly reliable Si and At interconnects that can prevent the precipitation of Sl in contact areas and interconnections. The purpose is to provide a method.

[Summary of the invention]

In this invention, after forming an At film mixed with metal silicide, heat treatment is performed to cause the At metal silicide to react.
At the same time, Si in the metal silicide is dispersed in A/, to form an intermetallic compound with the metal.
Distribution a! It is something that forms.

〔Effect of the invention〕

According to the present invention, since an alloy of At and the metal constituting the metal silicide is precipitated in the At film and at the grain boundaries in the At film, the At of Si released from the metal silicide is
Diffusion in the membrane is suppressed. As a result, the precipitation of Si is minimized and no increase in contact resistance or wiring resistance occurs. At the same time, since 81 is present in At, the substrate 8 and A
Destruction failure of the impurity diffusion layer due to reaction with t can also be prevented. Furthermore, intermetallic compounds of At and metals.

Since it has the effect of suppressing the diffusion of At itself, it has the advantage that electromigration silicon failures in wiring are less likely to occur.

[Embodiments of the invention]

Embodiments of the present invention will be described below with reference to all the drawings.

(Example 1) FIG. 1 is a process sectional view for explaining an example of the present invention. The present invention will be explained below in terms of manufacturing and processing.

As shown in FIG. 1(a), after an impurity diffusion layer (13) is formed in a semiconductor substrate 5i (11), an insulating film (a3) is covered, and then an insulating film (11) on the impurity diffusion layer Q3 is removed to form a contact hole. As shown in FIG. 1(b), an At wiring layer a9 is formed.At this time, palladium silicide Ql19 is mixed into the At film 9.As a method of mixing, kt and There are several methods, such as a method of mixed target latte sputtering of palladium silicide, and a method of evaporating At and palladium silicide from separate evaporation sources.After forming such a wiring layer of At and palladium silicide, it is necessary to ensure contact. When heat treated at 450℃ to remove
As shown in Figure 3(C), palladium silicide αe and ht
aa reacts to generate intermetallic αη between palladium and At, and S#σ■ is released. At this time, since the intermetallic compound ση of At and palladium is mainly formed along the grain boundary α mark of Atp, it acts as a diffusion barrier for Si in the At film, resulting in the growth of giant Si grains due to the precipitation of St. prevent.

As a result, defects due to increased contact resistance and wiring resistance do not occur, and at the same time, since there is Si in the film,
It has the same properties as the conventional 8i At. In the case of palladium silicide, the reaction with At starts at 300℃, so 1
One step of ordinary sintering at 450° C. is enough to cause the above reaction. or.

If the amount of palladium silicide mixed is between 1 and 1Qwt%, the resistance of At wiring will not increase significantly and
5 it can be sufficiently supplied in A.

(Embodiment 2) FIG. 2 shows another embodiment of the present invention. Second
As shown in Figure (a), after forming an impurity diffusion layer (A) in the semiconductor substrate Qυ, a contact hole (4) is formed in the insulating film (C).
Membrane layer 12!9. ! - Palladium silicide layers are alternately provided to form a laminated film structure (as shown in FIG. 2(b)).

After that, by performing heat treatment, as shown in FIG. 2(C), the Si-containing At film layer (c), palladium and
t and intermetallic compound layers are formed alternately. In this wiring layer, as in Example 1, diffusion of Si is blocked by the At-palladium intermetallic compound layer, so that wiring defects due to precipitation S1 do not occur.

The case where palladium silicide is used as the metal silicide has been described above, but a metal silicide such as platinum silicide or hafnium silicide that reacts with At to form an intermetallic compound with At can have the same effect.

As explained above, according to the present invention, the conventional Si-containing t
) As with the At wiring, destruction of the impurity diffusion layer due to the reaction between the substrate St and At can be prevented, and at the same time, the intermetallic compound of At and the metal constituting the metal silicide blocks the diffusion of 81 and prevents Sl precipitation. Since this can be prevented, an increase in contact resistance and wiring resistance can be prevented, and a highly reliable At wiring that is resistant to electromigration can be obtained.

[Brief explanation of drawings]

FIG. 1 is a process cross-sectional view showing the formation of an At wiring according to an embodiment of the present invention, FIG. 2 is a process cross-sectional view showing another example of the present invention, and FIG. 3 is a diagram explaining a conventional At wiring defect. FIG. In the figure. 11.21.31...Semiconductor substrate. 12.22,32... Impurity diffusion layer. 13.23.33...Insulator layer. 14.24.34...Hung Takt Hall, 15.25
, 35...AA membrane layer. 16.26...Metal silicide. 17.27...Intermetallic compound of metal and At in metal silicide. (7317) Patent attorney Kensuke Norichika (and 1 other person) No.
1 Figure 2 Figure 3

Claims (1)

[Claims] A drilling step of forming a window for contacting the semiconductor region in an insulating film formed on the surface of the substrate in which a semiconductor region containing impurities is formed, and a drilling step on the insulating film from within the formed window. A semiconductor device comprising a step of forming a metal wiring layer containing a mixture of aluminum and metal silicide, and a step of diffusing silicon into aluminum by heat treatment and simultaneously forming an intermetallic compound of metal silicide and aluminum. manufacturing method.