JPS61187335A - Plasma processing device - Google Patents

Plasma processing device

Info

Publication number
JPS61187335A
JPS61187335A JP2871285A JP2871285A JPS61187335A JP S61187335 A JPS61187335 A JP S61187335A JP 2871285 A JP2871285 A JP 2871285A JP 2871285 A JP2871285 A JP 2871285A JP S61187335 A JPS61187335 A JP S61187335A
Authority
JP
Japan
Prior art keywords
electrode
substrate
semiconductor substrate
plasma processing
light
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2871285A
Other languages
Japanese (ja)
Inventor
Hiroyuki Okada
裕幸 岡田
Toru Okuma
徹 大熊
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP2871285A priority Critical patent/JPS61187335A/en
Publication of JPS61187335A publication Critical patent/JPS61187335A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE:To find the installation of a substrate to be defective by a method wherein one or more openings are provided in a second electrode opposing to a first electrode of the parallel plane type, whereon the Si substrate is placed, and a light emission source and a photodetector are provided on a line normal to the surface of the first electrode, which passes through the openings. CONSTITUTION:An Si substrate 1 is placed on an electrode 2. A part of the surface of the substrate 1, which is located right under the opening 4 of an electrode 3, is irradiated with the light of an LED5, which has an infrared wavelength with a larger reflection coefficient to that of the photoresist film. When the substrate 1 is not parallel to the surface of the electrode 2 due to foreign substances and so forth on the electrode 2, the reflected light does not pass through the opening 4 or the reflected light can not be detected by a photodetector 6 as being a feeble light. Moreover, when a laser element with a single wavelength is used as the light emission source 5, the state that the substrate 1 is floating from the electrode 2 can be also discriminated as the distance can be measured by means of the laser element. According to this device, the failure of installation of the substrate can be prevented by detecting the defective installation of the substrate before the plasma processing.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、プラズマを用いて半導体基板の蝕刻(エツチ
ング)、洗浄もしくは同基板上への薄膜の形成を行うプ
ラズマ処理装置、特に電極上に設置された半導体基板の
傾きを検出することができ、さらに半導体基板の浮き上
りを検出することも可能なプラズマ処理装置に関するも
のである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a plasma processing apparatus that uses plasma to etch or clean a semiconductor substrate or to form a thin film on the substrate. The present invention relates to a plasma processing apparatus that can detect the inclination of a semiconductor substrate and can also detect the lifting of a semiconductor substrate.

従来の技術 2つの板状電極が対向する平行平板型のプラズマエツチ
ング装置あるいはプラズマデポジション装置では、片側
の電極上に半導体基板を設置し、チェンバ内を真空排気
しつつ、所望のガスを導入し、両電極に高周波電圧を印
加してガスをプラズマ状態とし、このプラズマ放電によ
りエツチングやデポジション等を行っている。(例えば
小林高洋他著「ドライプロセス応用技術−超微細素子の
製作−」(昭、59.7.20)、日刊工業新聞社、P
79) 発明が解決しようとする問題点 しかし、このようなプラズマ処理装置では、半導体基板
を設置する電極上に例えば残留物等が存在し、半導体基
板に傾きが生じると、半導体基板がプラズマ中に設置さ
れているため、プラズマの電界分布やプラズマ密度に影
響が及ぶ。この結果、エツチングやデポジションの均一
性が損われるおそれがある。
Conventional technology In a parallel plate type plasma etching apparatus or plasma deposition apparatus in which two plate-shaped electrodes face each other, a semiconductor substrate is placed on one electrode, and a desired gas is introduced while the chamber is evacuated. A high frequency voltage is applied to both electrodes to turn the gas into a plasma state, and etching, deposition, etc. are performed by this plasma discharge. (For example, Takahiro Kobayashi et al., “Dry Process Application Technology - Fabrication of Ultrafine Elements” (Sho, 59.7.20), Nikkan Kogyo Shimbun, P.
79) Problems to be Solved by the Invention However, in such a plasma processing apparatus, if there is residue, etc. on the electrode on which the semiconductor substrate is placed, and the semiconductor substrate is tilted, the semiconductor substrate may not be placed in the plasma. Because it is installed, it affects the plasma electric field distribution and plasma density. As a result, the uniformity of etching and deposition may be impaired.

また、半導体基板の自動送り機構で、半導体基板を電極
上に移送させるピンが、半導体基板を電極上に設置する
際に下がりきらず、半導体基板が電極より浮き上がった
状態となることもある。この場合にも、プラズマ処理を
行うと上記のような均一性が損われるおそれがある。
In addition, in an automatic semiconductor substrate feeding mechanism, the pins for transferring the semiconductor substrate onto the electrode may not come down completely when the semiconductor substrate is placed on the electrode, resulting in the semiconductor substrate floating above the electrode. In this case as well, if plasma treatment is performed, the above-mentioned uniformity may be impaired.

エツチングやデポジションの処理を行う前に、半導体基
板の傾きや浮き上がシの検出がなされず、傾きや浮き上
がりがあるままプラズマ処理を施した場合、半導体基板
が正しく設置された場合とは処理の状態が大きく異なっ
てしまう。したがって、所望のエツチングやデポジショ
ンが行なえず、処理した半導体基板が不良となる問題点
がある。
If the tilting or lifting of the semiconductor substrate is not detected before etching or deposition processing, and plasma processing is performed while the semiconductor substrate is tilted or raised, the processing will be different from the case where the semiconductor substrate is placed correctly. The situation will be very different. Therefore, there is a problem that desired etching and deposition cannot be performed, and the processed semiconductor substrate becomes defective.

また、近年は装置の処理能力を高める取り組みがなされ
、一度に多数枚の半導体基板を処理できるプラズマ処理
装置や半導体基板の自動送り機構により半導体基板を一
枚づつ連続に自動処理を行なうプラズマ処理装置が実現
されている。このようなプラズマ処理装置で上記のよう
に半導体基板に傾きあるいは浮き上がりのあるままで処
理を行ってしまうと大量の不良品を出すことにもなる。
In addition, in recent years, efforts have been made to improve the processing capacity of equipment, such as plasma processing equipment that can process multiple semiconductor substrates at once, and plasma processing equipment that automatically processes semiconductor substrates one by one using an automatic semiconductor substrate feeding mechanism. has been realized. If such a plasma processing apparatus were to process the semiconductor substrate with the semiconductor substrate tilted or raised as described above, a large number of defective products would be produced.

問題点を解決するための手段 上記の問題を解決する本発明のプラズマ処理装置は、高
周波電圧が印加される平行平板型の第1と第2の電極を
備え、半導体基板が設置される前記第1の電極に対向す
る第2の電極に1個以上の開口を設け、さらに同第2の
電極の前記第1の電極と対向する側とは反対側で、前記
開口を通り前記第1の電極面と直角に交わる法線上に位
置する所に、発光源と光検出器を設置した構造のもので
ある。
Means for Solving the Problems A plasma processing apparatus of the present invention that solves the above problems is provided with parallel plate type first and second electrodes to which a high frequency voltage is applied, and the first and second electrodes on which a semiconductor substrate is placed. A second electrode facing the first electrode is provided with one or more openings, and further, on a side of the second electrode opposite to the first electrode, the first electrode passes through the opening. This structure has a light emitting source and a photodetector installed on a normal line that intersects the surface at right angles.

作用 発光源より第2の電極の開口を通り第1の電極上に設置
された半導体基板に平行光線を照射すると、半導体基板
面で光が反射され、第2の電極の開口を通過した反射光
を光検出器で検出することができる。
When a parallel beam of light is irradiated from the active light source through the aperture of the second electrode and onto the semiconductor substrate placed on the first electrode, the light is reflected by the surface of the semiconductor substrate, and the reflected light passes through the aperture of the second electrode. can be detected with a photodetector.

実施例 図に本発明のプラズマ処理装置の実施例の模式図を示す
。本発明のプラズマ処理装置は、半導体基板1が設置さ
れた第1の電極2に平行でこれと対向する第2の電極3
に開口4が形成され、さらにこの開口4の上方で、開口
4を通り第1の電極2の面と直角に交わる法線上に位置
する所に発光源5と光検出器6を並置した構造とされて
いる。
Embodiment Figures show schematic diagrams of embodiments of the plasma processing apparatus of the present invention. The plasma processing apparatus of the present invention includes a second electrode 3 parallel to and facing the first electrode 2 on which the semiconductor substrate 1 is placed.
An opening 4 is formed in the opening 4, and a light emitting source 5 and a photodetector 6 are juxtaposed above the opening 4 and located on a normal line that passes through the opening 4 and intersects at right angles with the surface of the first electrode 2. has been done.

なお、開口4はプラズマ状態にあまり影響を与えない程
度の小さな孔径とされている。
Note that the opening 4 has a small hole diameter that does not significantly affect the plasma state.

次に、操作方法および原理を説明する。Next, the operating method and principle will be explained.

まず、半導体基板1を第1の電極2の上に設置する。フ
ォトレジスト膜に対して光反射係数の大きい赤外波長の
LED等の発光源5で発生させた光で第2の電極3の開
口4直下の半導体基板1面を照射する。半導体基板1が
第1の電極2の面と平行で傾いていない場合は、反射光
は再び開口4を通って光検出器に達し反射光が検出され
る。一方、半導体基板1が第1の電極2の上の残留物等
によりこの電極面と平行でなく傾いている場合は、反射
光は開口4を通過しないか、通過しても微弱であるため
光検出器6ではほとんど反射光を検出できない。
First, the semiconductor substrate 1 is placed on the first electrode 2. The surface of the semiconductor substrate 1 directly below the opening 4 of the second electrode 3 is irradiated with light generated by a light emitting source 5 such as an infrared wavelength LED having a large light reflection coefficient against the photoresist film. When the semiconductor substrate 1 is parallel to the surface of the first electrode 2 and is not tilted, the reflected light passes through the aperture 4 again and reaches the photodetector, where the reflected light is detected. On the other hand, if the semiconductor substrate 1 is tilted rather than parallel to the first electrode surface due to residue on the first electrode 2, the reflected light will not pass through the aperture 4, or even if it does, it will be weak and the light The detector 6 can hardly detect reflected light.

さらに、発光源6として単一波長のレーザー素子を使用
した場合、距離測定が可能であるため、半導体基板1が
電極から平行に浮き上がった状態も、反射光を光検出器
6で測定することにより検出することができる。
Furthermore, when a single-wavelength laser element is used as the light emitting source 6, distance measurement is possible, so even when the semiconductor substrate 1 is lifted parallel to the electrode, it can be measured by measuring the reflected light with the photodetector 6. can be detected.

このように開口4を通過して来た反射光を光検出器6で
検出することにより、半導体基板1が傾いていたり、さ
らに浮き上がっている状態も判別することができる。
By detecting the reflected light that has passed through the aperture 4 with the photodetector 6, it is possible to determine whether the semiconductor substrate 1 is tilted or even floating.

この光検出器6の出力をプラズマ処理装置の制御回路に
接続しておき、半導体基板1の傾き、さらに浮き上りを
検出した場合、直ちにインターロックを作動させ、装置
のシーケンスを止め、半導体基板1を設置し直せる状態
にする。半導体基板1を正常に設置し直した後、装置を
復帰させて正常な処理を進行させる。
The output of this photodetector 6 is connected to the control circuit of the plasma processing apparatus, and when tilting or even lifting of the semiconductor substrate 1 is detected, an interlock is immediately activated to stop the sequence of the apparatus, and the semiconductor substrate 1 is to a state where it can be reinstalled. After the semiconductor substrate 1 is normally reinstalled, the device is returned to normal processing.

なお、上記の実施例では、開口を1個の場合で説明した
が、これに限られるわけでなく開口とこれに対応する発
光源と光検出器を増やせば増やす程、半導体基板の異常
な設置状態の検出精度を向上させることができる。
Note that in the above embodiment, the case where there is one aperture has been explained, but the invention is not limited to this, and the more the number of apertures and corresponding light emitting sources and photodetectors increases, the more likely it is that abnormal placement of the semiconductor substrate will occur. The state detection accuracy can be improved.

発明の効果 エツチングやデポジションのプラズマ処理を、半導体基
板が傾いたり、浮き上がった異常な状態で行った場合半
導体基板は致命的な損傷を受けたり、損傷を受けなくて
も処理にばらつきが生じ不良が多く発生する。
Effects of the invention If plasma processing for etching or deposition is performed in an abnormal state where the semiconductor substrate is tilted or lifted up, the semiconductor substrate may be fatally damaged, or even if it is not damaged, the processing may be uneven and defective. occurs frequently.

本発明のプラズマ処理装置によれば、半導体基板の設置
の異常をプラズマ処理する前に発見することができ、不
良の発生を未然に防ぐことができる効果が奏される。
According to the plasma processing apparatus of the present invention, an abnormality in the placement of a semiconductor substrate can be discovered before plasma processing is performed, and it is possible to prevent the occurrence of defects.

特に、多量処理にともなう多量の不良品の発生を未然に
防ぐことができる。
In particular, it is possible to prevent a large number of defective products from being produced due to large-volume processing.

【図面の簡単な説明】[Brief explanation of the drawing]

図は本発明のプラズマ装置に関する模式図である0 1・・・・・・半導体基板、2・・・・・・第1の電極
、3・・・・・・第2の電極、4・・・・・・開口、6
・・・・・・発光源、6・・・・・・光検出器。
The figure is a schematic diagram regarding the plasma device of the present invention. 0 1... Semiconductor substrate, 2... First electrode, 3... Second electrode, 4... ...Aperture, 6
...... light source, 6... photodetector.

Claims (3)

【特許請求の範囲】[Claims] (1)高周波電圧が印加される平行平板型の第1と第2
の電極を備え、半導体基板が設置される前記第1の電極
に対向する第2の電極に1個以上の開口を設け、さらに
同第2の電極の前記第1の電極と対向する側とは反対側
で、前記開口を通り前記第1の電極面と直角に交わる法
線上に位置する所に、発光源と光検出器を設置したこと
を特徴とするプラズマ処理装置。
(1) First and second parallel plate type to which high frequency voltage is applied
a second electrode opposite to the first electrode on which the semiconductor substrate is disposed, and one or more openings are provided in the second electrode opposite to the first electrode, and a side of the second electrode opposite to the first electrode is A plasma processing apparatus characterized in that a light emitting source and a photodetector are installed on the opposite side, on a normal line that passes through the opening and intersects at right angles with the first electrode surface.
(2)発光源が赤外発光素子であることを特徴とする特
許請求の範囲第1項に記載のプラズマ処理装置。
(2) The plasma processing apparatus according to claim 1, wherein the light emitting source is an infrared light emitting element.
(3)発光源が単一波長のレーザー素子であることを特
徴とする特許請求の範囲第1項に記載のプラズマ処理装
置。
(3) The plasma processing apparatus according to claim 1, wherein the light emitting source is a single wavelength laser element.
JP2871285A 1985-02-15 1985-02-15 Plasma processing device Pending JPS61187335A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2871285A JPS61187335A (en) 1985-02-15 1985-02-15 Plasma processing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2871285A JPS61187335A (en) 1985-02-15 1985-02-15 Plasma processing device

Publications (1)

Publication Number Publication Date
JPS61187335A true JPS61187335A (en) 1986-08-21

Family

ID=12256063

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2871285A Pending JPS61187335A (en) 1985-02-15 1985-02-15 Plasma processing device

Country Status (1)

Country Link
JP (1) JPS61187335A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6104774A (en) * 1996-10-30 2000-08-15 Yokomizo; Akira Digital wave shaping circuit, frequency multiplying circuit, and external synchronizing method, and external synchronizing circuit
US6758941B1 (en) 1999-06-02 2004-07-06 Tokyo Electron Limited Plasma processing unit, window member for plasma processing unit and electrode plate for plasma processing unit

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5941841A (en) * 1982-07-26 1984-03-08 エイ・ティ・アンド・ティ・コーポレーション Method of producing device
JPS59175123A (en) * 1983-03-25 1984-10-03 Hitachi Ltd Wafer detecting device
JPS59186325A (en) * 1983-04-01 1984-10-23 コンパニ−・アンデユストリエル・デ・テレコミユニカシオン・セイテ−アルカテル Dry etching device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5941841A (en) * 1982-07-26 1984-03-08 エイ・ティ・アンド・ティ・コーポレーション Method of producing device
JPS59175123A (en) * 1983-03-25 1984-10-03 Hitachi Ltd Wafer detecting device
JPS59186325A (en) * 1983-04-01 1984-10-23 コンパニ−・アンデユストリエル・デ・テレコミユニカシオン・セイテ−アルカテル Dry etching device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6104774A (en) * 1996-10-30 2000-08-15 Yokomizo; Akira Digital wave shaping circuit, frequency multiplying circuit, and external synchronizing method, and external synchronizing circuit
US6758941B1 (en) 1999-06-02 2004-07-06 Tokyo Electron Limited Plasma processing unit, window member for plasma processing unit and electrode plate for plasma processing unit

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