JPS6118339B2 - - Google Patents

Info

Publication number
JPS6118339B2
JPS6118339B2 JP17850580A JP17850580A JPS6118339B2 JP S6118339 B2 JPS6118339 B2 JP S6118339B2 JP 17850580 A JP17850580 A JP 17850580A JP 17850580 A JP17850580 A JP 17850580A JP S6118339 B2 JPS6118339 B2 JP S6118339B2
Authority
JP
Japan
Prior art keywords
semiconductor device
semiconductor devices
resin
semiconductor
rods
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP17850580A
Other languages
Japanese (ja)
Other versions
JPS57102039A (en
Inventor
Kazuo Endo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP17850580A priority Critical patent/JPS57102039A/en
Publication of JPS57102039A publication Critical patent/JPS57102039A/en
Publication of JPS6118339B2 publication Critical patent/JPS6118339B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Description

【発明の詳細な説明】 本発明は封止完了後の半導体装置の特性試験を
行なう方法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for testing the characteristics of a semiconductor device after completion of sealing.

従来、例えば樹脂封止型半導体装置の特性試験
は、樹脂封止後に個々の半導体装置に分離して行
なわれていた。この場合、分離された半導体装置
は自動配列調整装置に送られて各半導体装置の配
列方向が定められ、そして測定装置により試験さ
れている。しかしながら、かかる方法では次のよ
うな欠点があつた。すなわち、半導体装置のリー
ドが変形して曲がつているものがあると、自動配
列調整装置の送り機構にその半導体装置が引つ掛
かり、装置の流れに支障をきたすことになる。さ
らに、他の品種の半導体装置を試験する場合、自
動配列調整装置の中に前の品種の半導体装置が残
つていると、それらが混入してしまうことにな
る。さらにまた、自動配列調整装置は、同じ方向
に半導体装置が向くように、たくさんの送り機構
が備えられ、このためにそれが発生する騒音が問
題となつている。
Conventionally, for example, characteristic tests of resin-sealed semiconductor devices have been conducted by separating the semiconductor devices into individual semiconductor devices after resin-sealing. In this case, the separated semiconductor devices are sent to an automatic alignment device to determine the alignment direction of each semiconductor device, and then tested by a measuring device. However, this method has the following drawbacks. That is, if the leads of a semiconductor device are deformed and bent, the semiconductor device will get caught in the feed mechanism of the automatic alignment device, which will impede the flow of the device. Furthermore, when testing semiconductor devices of other types, if semiconductor devices of the previous type remain in the automatic array adjustment device, they will be mixed in. Furthermore, the automatic alignment apparatus is equipped with many feeding mechanisms so that the semiconductor devices are oriented in the same direction, and the noise generated by these mechanisms is a problem.

本発明の目的は、かかる欠点を解消してより自
動化に適した半導体装置の試験方法を提供するこ
とにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor device testing method that overcomes these drawbacks and is more suitable for automation.

本発明によれば、複数の半導体装置を絶縁材で
連結させ、その連結した状態で個々の半導体装置
の特性試験を行ない、しかる後各半導体装置に分
離することを特徴とする試験方法を得る。
According to the present invention, there is obtained a testing method characterized in that a plurality of semiconductor devices are connected with an insulating material, a characteristic test is performed on each semiconductor device in the connected state, and then the semiconductor devices are separated into individual semiconductor devices.

以下、図面を参照しながら本発明を詳細に説明
する。
Hereinafter, the present invention will be explained in detail with reference to the drawings.

第1図は本発明の試験方法のために用意された
複数の半導体装置が絶縁材で連絡されている斜視
図である。この例では樹脂封止型半導体装置1―
1〜1―5を示し、そしてこれらを連結する絶縁
材は、封止樹脂と同じ部材2―1〜2―4により
構成されている。この連結材2―1〜2―4は、
樹脂封止のための金型の一部に、各半導体装置の
樹脂封止部3―1〜3―5を結ぶように溝を形成
しておけばよい。また連結材2―1〜2―4は樹
脂封止部3―1〜3―5の上下に形成されて中間
部が自開孔されたようになつている。この開孔4
―1〜4―4により、連結されたものを動送りで
きるような送り穴を形成している。
FIG. 1 is a perspective view in which a plurality of semiconductor devices prepared for the test method of the present invention are connected by an insulating material. In this example, resin-sealed semiconductor device 1-
1 to 1-5, and the insulating material connecting them is made of the same members 2-1 to 2-4 as the sealing resin. These connecting materials 2-1 to 2-4 are
Grooves may be formed in a part of the mold for resin sealing so as to connect the resin sealing parts 3-1 to 3-5 of each semiconductor device. Further, the connecting members 2-1 to 2-4 are formed above and below the resin sealing portions 3-1 to 3-5, and the intermediate portions are self-opening holes. This opening 4
-1 to 4-4 form feed holes that allow dynamic feeding of connected items.

特性試験に際しては、まずこの連結状態で自動
送り装置に配置する。その後、例えば半導体装置
1―1を試験する。しかる後、上述したように開
孔4―1〜4―4を利用して全体を移動させ、次
の半導体装置1―2の試験を行なう。尚、試験が
終了した半導体装置1―1は、半導体装置1―2
の試験開始前に分離される。
When testing the characteristics, first place it in this connected state on an automatic feeder. After that, for example, the semiconductor device 1-1 is tested. Thereafter, as described above, the entire semiconductor device 1-2 is moved using the openings 4-1 to 4-4, and the next semiconductor device 1-2 is tested. Note that the semiconductor device 1-1 for which the test has been completed is the semiconductor device 1-2.
separated before the start of the test.

半導体装置1―2を試験した結果、これが不良
品であると判定された場合は、測定装置が次の分
離工程にそれを知らせる。これによつて半導体装
置1―2は分離され、前の半導体装置1―1が収
納されている場所と異なる場合に収納される。
As a result of testing the semiconductor device 1-2, if it is determined that it is a defective product, the measuring device notifies the next separation process. As a result, the semiconductor device 1-2 is separated and stored in a location different from the location where the previous semiconductor device 1-1 is stored.

また、別の方法としては不良品である半導体装
置1―2の樹脂封止部3―2にインキ等で色付け
て判定することもできる。さらにまた、通常特性
測定と共にそれらの型名を現わすマークが施れる
ので、これを利用して不良品のものにはそのマー
クを施さない方法も用いることができる。
Alternatively, the defective semiconductor device 1-2 may be determined by coloring the resin-sealed portion 3-2 of the semiconductor device 1-2 with ink or the like. Furthermore, since a mark indicating the type name of the product can be usually applied along with characteristic measurements, it is also possible to use this method to avoid placing the mark on defective products.

以上の方法によれば、従来から用いられていた
自動方向調整装置による様々な欠点を解消でき、
より自動化に適したものとなる。
According to the above method, various drawbacks of conventionally used automatic direction adjustment devices can be overcome,
It becomes more suitable for automation.

尚、上記の方法で連結している半導体装置の分
離は、その連結する数を10個とし、そしてこれら
の試験がすべて完了した後に一括して分離しても
よい。勿論、樹脂封止型のトランジスタに限らず
集積回路等すべての半導体装置に適用できる。
Note that the semiconductor devices connected by the above method may be separated by setting the number of connected devices to 10, and separating them all at once after all these tests are completed. Of course, the present invention is applicable not only to resin-sealed transistors but also to all semiconductor devices such as integrated circuits.

尚、周知のごとく各半導体装置のリードは、も
ともとは互いに連結しているが、これらは電気的
にも通電状態にあるので、そのまま連結して試験
を行なうことができない。よつて、本発明で使う
連結した半導体装置の他の例として、各リードを
樹脂等の絶縁材で連結したものも可能である。
As is well known, the leads of each semiconductor device are originally connected to each other, but since these are electrically energized, it is not possible to conduct a test by connecting them as they are. Therefore, as another example of the connected semiconductor device used in the present invention, it is also possible to connect each lead with an insulating material such as resin.

以上のように、本発明によればより自動化に適
した半導体装置の試験方法を提供できる。
As described above, according to the present invention, it is possible to provide a semiconductor device testing method that is more suitable for automation.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例で用いられた連結す
る半導体装置を示す斜視図である。 1―1〜1―5……半導体装置、2―1〜2―
4……連結材、3―1〜3―5……樹脂封止部、
4―1〜4―5……開孔部。
FIG. 1 is a perspective view showing connected semiconductor devices used in an embodiment of the present invention. 1-1 to 1-5...Semiconductor device, 2-1 to 2-
4... Connecting material, 3-1 to 3-5... Resin sealing part,
4-1 to 4-5...Opening portion.

Claims (1)

【特許請求の範囲】[Claims] 1 隣り合う半導体装置の樹脂封止部を封止材と
しての樹脂でなる二本の棒で連結させることによ
り複数の半導体装置を連ね、前記二本の棒と隣り
合う半導体装置の樹脂封止部とでなる空間を送り
穴として利用することにより複数の半導体装置が
連なつた状態で各半導体装置の特性試験を行な
い、その後、前記二本の棒を切断することにより
各半導体装置に分離することを特徴とする半導体
装置の試験方法。
1 A plurality of semiconductor devices are connected by connecting the resin-sealed parts of adjacent semiconductor devices with two rods made of resin as a sealing material, and the resin-sealed parts of the semiconductor devices adjacent to the two rods are connected. A characteristic test is performed on each semiconductor device in a state in which a plurality of semiconductor devices are connected by using the space formed by the two rods as a feed hole, and then the semiconductor devices are separated into each semiconductor device by cutting the two rods. A method for testing a semiconductor device, characterized by:
JP17850580A 1980-12-17 1980-12-17 Inspection of semiconductor device Granted JPS57102039A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17850580A JPS57102039A (en) 1980-12-17 1980-12-17 Inspection of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17850580A JPS57102039A (en) 1980-12-17 1980-12-17 Inspection of semiconductor device

Publications (2)

Publication Number Publication Date
JPS57102039A JPS57102039A (en) 1982-06-24
JPS6118339B2 true JPS6118339B2 (en) 1986-05-12

Family

ID=16049630

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17850580A Granted JPS57102039A (en) 1980-12-17 1980-12-17 Inspection of semiconductor device

Country Status (1)

Country Link
JP (1) JPS57102039A (en)

Also Published As

Publication number Publication date
JPS57102039A (en) 1982-06-24

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