JPS61182039U - - Google Patents

Info

Publication number
JPS61182039U
JPS61182039U JP1985065541U JP6554185U JPS61182039U JP S61182039 U JPS61182039 U JP S61182039U JP 1985065541 U JP1985065541 U JP 1985065541U JP 6554185 U JP6554185 U JP 6554185U JP S61182039 U JPS61182039 U JP S61182039U
Authority
JP
Japan
Prior art keywords
package substrate
conductor pin
printed wiring
flat
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1985065541U
Other languages
English (en)
Japanese (ja)
Other versions
JPH0331086Y2 (https=
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1985065541U priority Critical patent/JPH0331086Y2/ja
Publication of JPS61182039U publication Critical patent/JPS61182039U/ja
Application granted granted Critical
Publication of JPH0331086Y2 publication Critical patent/JPH0331086Y2/ja
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP1985065541U 1985-04-30 1985-04-30 Expired JPH0331086Y2 (https=)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1985065541U JPH0331086Y2 (https=) 1985-04-30 1985-04-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1985065541U JPH0331086Y2 (https=) 1985-04-30 1985-04-30

Publications (2)

Publication Number Publication Date
JPS61182039U true JPS61182039U (https=) 1986-11-13
JPH0331086Y2 JPH0331086Y2 (https=) 1991-07-01

Family

ID=30597629

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1985065541U Expired JPH0331086Y2 (https=) 1985-04-30 1985-04-30

Country Status (1)

Country Link
JP (1) JPH0331086Y2 (https=)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63285961A (ja) * 1987-05-18 1988-11-22 Ibiden Co Ltd 半導体搭載用基板
JP2010041053A (ja) * 2008-07-31 2010-02-18 Ibiden Co Ltd 半導体装置及びその製造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63285961A (ja) * 1987-05-18 1988-11-22 Ibiden Co Ltd 半導体搭載用基板
JP2010041053A (ja) * 2008-07-31 2010-02-18 Ibiden Co Ltd 半導体装置及びその製造方法

Also Published As

Publication number Publication date
JPH0331086Y2 (https=) 1991-07-01

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