JPS61182039U - - Google Patents
Info
- Publication number
- JPS61182039U JPS61182039U JP1985065541U JP6554185U JPS61182039U JP S61182039 U JPS61182039 U JP S61182039U JP 1985065541 U JP1985065541 U JP 1985065541U JP 6554185 U JP6554185 U JP 6554185U JP S61182039 U JPS61182039 U JP S61182039U
- Authority
- JP
- Japan
- Prior art keywords
- package substrate
- conductor pin
- printed wiring
- flat
- wiring board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004020 conductor Substances 0.000 claims description 16
- 239000004065 semiconductor Substances 0.000 claims description 15
- 239000000758 substrate Substances 0.000 claims description 12
- 239000011347 resin Substances 0.000 claims description 3
- 229920005989 resin Polymers 0.000 claims description 3
- 239000002184 metal Substances 0.000 claims 8
- 239000003365 glass fiber Substances 0.000 claims 1
- 239000000463 material Substances 0.000 claims 1
- 238000007789 sealing Methods 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Lead Frames For Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985065541U JPH0331086Y2 (cs) | 1985-04-30 | 1985-04-30 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985065541U JPH0331086Y2 (cs) | 1985-04-30 | 1985-04-30 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61182039U true JPS61182039U (cs) | 1986-11-13 |
| JPH0331086Y2 JPH0331086Y2 (cs) | 1991-07-01 |
Family
ID=30597629
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1985065541U Expired JPH0331086Y2 (cs) | 1985-04-30 | 1985-04-30 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0331086Y2 (cs) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63285961A (ja) * | 1987-05-18 | 1988-11-22 | Ibiden Co Ltd | 半導体搭載用基板 |
| JP2010041053A (ja) * | 2008-07-31 | 2010-02-18 | Ibiden Co Ltd | 半導体装置及びその製造方法 |
-
1985
- 1985-04-30 JP JP1985065541U patent/JPH0331086Y2/ja not_active Expired
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63285961A (ja) * | 1987-05-18 | 1988-11-22 | Ibiden Co Ltd | 半導体搭載用基板 |
| JP2010041053A (ja) * | 2008-07-31 | 2010-02-18 | Ibiden Co Ltd | 半導体装置及びその製造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0331086Y2 (cs) | 1991-07-01 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7439612B2 (en) | Integrated circuit package structure with gap through lead bar between a die edge and an attachment point corresponding to a conductive connector | |
| US5406119A (en) | Lead frame | |
| JPH05291467A (ja) | リードフレームおよび半導体装置 | |
| JPH02260450A (ja) | 半導体装置およびその実装方法 | |
| JPS61182039U (cs) | ||
| JPS614456U (ja) | プラグインパツケ−ジ基板 | |
| JPH03177055A (ja) | 半導体素子搭載用基体 | |
| JPS60109337U (ja) | 集積回路パツケージ | |
| JPH0377459U (cs) | ||
| US7504713B2 (en) | Plastic semiconductor packages having improved metal land-locking features | |
| JP3617264B2 (ja) | プラスチック回路基板の電解めっき方法 | |
| KR200154509Y1 (ko) | 열방출형 반도체 패키지 | |
| JPS6113938U (ja) | プラグインパツケ−ジ基板 | |
| KR0125197Y1 (ko) | 반도체 장치 | |
| JPH0751787Y2 (ja) | 面実装電子部品 | |
| JPH0510366Y2 (cs) | ||
| KR100427541B1 (ko) | 패턴 필름 제조 방법 및 이를 이용한 칩 모듈 | |
| JPH0121629B2 (cs) | ||
| JPH01153648U (cs) | ||
| JPH05291487A (ja) | 半導体リードフレーム | |
| JPH0429586Y2 (cs) | ||
| JPS6336077U (cs) | ||
| JPS62193771U (cs) | ||
| JPS61189695A (ja) | 多層プリント板の配線パタ−ン構造 | |
| JPH0268452U (cs) |